re PR target/46153 (ICE: in extract_insn, at recog.c:2110 (unrecognizable insn) with -ffloat-store and __builtin_ia32_movlhps)
PR target/46153 * config/i386/sse.md (sse_movhlps_exp): Use destination returned from ix86_fixup_binary_operands to expand insn. (sse_movlhps_exp): Ditto. (sse_loadhps_exp): Ditto. (sse_loadlps_exp): Ditto. (sse2_loadhpd_exp): Ditto. (sse2_loadlpd_exp): Ditto. (*avx_movhlps): Use ix86_binary_operator_ok in insn predicate. (sse_movhlps): Ditto. (*avx_movlhps): Ditto. (sse_movlhps): Ditto. (*avx_loadhps): Ditto. (sse_loadhps): Ditto. (*avx_loadhpd): Ditto. (sse_loadhpd): Ditto. (*avx_storelps): Prevent both operands in memory. (sse_storelps): Ditto. testsuite/ChangeLog: PR target/46153 * gcc.target/i386/pr46153.c: New test. From-SVN: r166031
This commit is contained in:
Uros Bizjak
parent
fb7342fd6f
commit
f17aa4adf8
4 changed files with 148 additions and 61 deletions
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@ -1,3 +1,24 @@
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2010-10-28 Uros Bizjak <ubizjak@gmail.com>
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PR target/46153
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* config/i386/sse.md (sse_movhlps_exp): Use destination
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returned from ix86_fixup_binary_operands to expand insn.
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(sse_movlhps_exp): Ditto.
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(sse_loadhps_exp): Ditto.
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(sse_loadlps_exp): Ditto.
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(sse2_loadhpd_exp): Ditto.
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(sse2_loadlpd_exp): Ditto.
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(*avx_movhlps): Use ix86_binary_operator_ok in insn predicate.
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(sse_movhlps): Ditto.
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(*avx_movlhps): Ditto.
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(sse_movlhps): Ditto.
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(*avx_loadhps): Ditto.
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(sse_loadhps): Ditto.
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(*avx_loadhpd): Ditto.
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(sse_loadhpd): Ditto.
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(*avx_storelps): Prevent both operands in memory.
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(sse_storelps): Ditto.
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2010-10-28 Andrew Stubbs <ams@codesourcery.com>
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* config/arm/arm.c (const_ok_for_arm): Support 0xXY00XY00 pattern
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@ -104,8 +125,7 @@
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caller_pass_avx256_p based on argument type.
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(ix86_expand_epilogue): Emit vzeroupper if 256bit AVX register
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is used, but not returned by caller.
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(ix86_expand_call): Emit vzeroupper if 256bit AVX register is
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used.
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(ix86_expand_call): Emit vzeroupper if 256bit AVX register is used.
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(ix86_local_alignment): Set use_avx256_p if 256bit AVX register
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is used.
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(ix86_minimum_alignment): Likewise.
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@ -136,7 +156,7 @@
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* config/i386/t-mingw-w64 (SHLIB_LC): Likewise.
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2010-10-27 Eric Botcazou <ebotcazou@adacore.com>
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Olivier Hainque <hainque@adacore.com>
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Olivier Hainque <hainque@adacore.com>
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* config/i386/w32-unwind.h (i386_w32_fallback_frame_state): Fix regnum
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of EBP. Do not restore reg #9. Remove +1 adjustment to EIP and set
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@ -165,11 +185,10 @@
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c_parser_objc_at_property, now
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c_parser_objc_at_property_declaration.
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(c_parser_objc_methodprotolist): Same change.
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2010-10-26 H.J. Lu <hongjiu.lu@intel.com>
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* config/i386/i386.md (split_stack_return): Put back
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unspec_volatile.
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* config/i386/i386.md (split_stack_return): Put back unspec_volatile.
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2010-10-26 Jan Hubicka <jh@suse.cz>
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@ -180,7 +199,8 @@
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2010-10-26 Jan Hubicka <jh@suse.cz>
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* cgraphbuild.c (build_cgraph_edges): Use ipa-reference to represent OMP.
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* cgraphbuild.c (build_cgraph_edges): Use ipa-reference
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to represent OMP.
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2010-10-26 H.J. Lu <hongjiu.lu@intel.com>
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@ -213,31 +233,33 @@
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(cgraph_can_remove_if_no_direct_calls_and_refs): Do not try
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to optimize away static ctors/dtors; it does not work on inline clones;
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external functions can always be rmeoved.
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(cgraph_will_be_removed_from_program_if_no_direct_calls): Assert on inline
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clones; in LTO external functions always can go.
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(cgraph_will_be_removed_from_program_if_no_direct_calls): Assert on
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inline clones; in LTO external functions always can go.
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(cgraph_used_from_object_file_p): Handle EXTERNAL functions correctly.
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(cgraph_mark_address_taken_node): Assert that we are not taking address of
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inline clone.
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(cgraph_mark_address_taken_node): Assert that we are not taking
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address of inline clone.
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(cgraph_can_remove_if_no_direct_calls_p): We always eventually remove
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external functions.
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* ipa-cp.c (ipcp_cloning_candidate_p): Do not clone functions with address taken.
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(ipcp_initialize_node_lattices): Only local functions can be handled without cloning.
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* ipa-cp.c (ipcp_cloning_candidate_p): Do not clone functions with
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address taken.
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(ipcp_initialize_node_lattices): Only local functions can be
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handled without cloning.
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* cgraph.h (cgraph_set_readonly_flag,
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cgraph_set_looping_const_or_pure_flag): Remove.
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(cgraph_set_const_flag): Declare.
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(cgraph_set_pure_flag): Update.
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* ipa-pure-const (propagate_pure_const, local_pure_const): Update
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flags setting code.
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* ipa.c (cgraph_remove_unreachable_nodes): Fix formating; do not look at inline
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clones; fix handling of external definitions.
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* ipa.c (cgraph_remove_unreachable_nodes): Fix formating; do not
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look at inline clones; fix handling of external definitions.
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(cgraph_postorder): Do not look at inline clones in the first pass.
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(function_and_variable_visibility): Drop constructors/destructor
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flags at pure and const functions.
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* tree-profile.c (tree_profiling): Update.
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* ipa-inline.c (cgraph_clone_inlined_nodes): Always clone functions with
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address taken; external functions do not account to whole program size.
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(cgraph_decide_inlining): Likewise; do not try to inline functions already
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inlined.
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(cgraph_decide_inlining): Likewise; do not try to inline
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functions already inlined.
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2010-10-26 Jie Zhang <jie@codesourcery.com>
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@ -260,7 +282,7 @@
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PR target/44948
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* config/i386/i386.c (ix86_old_function_arg_boundary): New.
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(ix86_function_arg_boundary): Always align parameters on stack
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in 64bit and align parameters with alignment >= 16byte on stack
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in 64bit and align parameters with alignment >= 16byte on stack
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in 32bit. Warn alignment change.
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2010-10-26 Ian Lance Taylor <iant@google.com>
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@ -269,7 +291,7 @@
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* ipa-prop.c (ipa_modify_call_arguments): Correct type of MEM_REF
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offset.
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2010-10-25 Rodrigo Rivas Costa <rodrigorivascosta@gmail.com>
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2010-10-25 Rodrigo Rivas Costa <rodrigorivascosta@gmail.com>
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Implement opaque-enum-specifiesr for C++0x
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* tree.h (ENUM_IS_OPAQUE): New.
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@ -278,8 +300,7 @@
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2010-10-26 Jie Zhang <jie@codesourcery.com>
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* stor-layout.c (layout_decl): Use the field's type to
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determine the mode and keep DECL_BIT_FIELD for a volatile
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bit-field.
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determine the mode and keep DECL_BIT_FIELD for a volatile bit-field.
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* config/arm/arm.c (arm_override_options): Default to
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-fstrict-volatile-bitfields.
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@ -290,10 +311,6 @@
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* config/pdp11/pdp11.c: Use named constants instead of numbers.
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* config/pdp11.pdp11.h: Ditto.
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2010-10-25 Changpeng Fang <changpeng.fang@amd.com>
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* Changelog (2010-10-22 Changpeng Fang): Correct the Changelog entries.
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2010-10-25 Eric Botcazou <ebotcazou@adacore.com>
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* configure.ac: Use $cpu_type instead of $target to define the nop.
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@ -323,8 +340,7 @@
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2010-10-24 Ian Lance Taylor <iant@google.com>
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* config/i386/i386.c (ix86_va_start): Remove extraneous blank
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line.
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* config/i386/i386.c (ix86_va_start): Remove extraneous blank line.
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2010-10-24 Eric Botcazou <ebotcazou@adacore.com>
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@ -338,8 +354,7 @@
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* gcc.c (n_switches_alloc_debug_check): New.
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(set_option_handlers): New.
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(process_command): Use set_option_handlers.
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(do_self_spec): Pass spec-generated options through option
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handlers.
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(do_self_spec): Pass spec-generated options through option handlers.
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(main): Also save and restore n_switches_alloc when swapping
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switch arrays.
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@ -399,7 +414,7 @@
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(TARGET_SCHED_REORDER2): Define to mips_sched_reorder2
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instead of mips_sched_reorder.
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Revert
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Revert:
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2008-09-09 Andrey Belevantsev <abel@ispras.ru>
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PR rtl-optimization/37360
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* haifa-sched.c (max_issue): Do not assert that we never issue more
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@ -432,8 +447,7 @@
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(m32c_addr_space_subset_p): New.
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(m32c_addr_space_convert): New.
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(conversions): Add __far operand patterns.
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(m32c_prepare_move): Force constants into registers for __far
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moves.
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(m32c_prepare_move): Force constants into registers for __far moves.
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(m32c_split_move): __far moves are always split.
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* config/m32c/addsub.md (addsi3_1): Support SImode symbols.
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* config/m32c/mov.md (mov<mode>_far_op1): New.
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@ -442,8 +456,8 @@
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(movhi_op): Likewise.
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(movsi_splittable): Split A1A0 also.
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2010-10-22 Artjoms Sinkarovs <artyom.shinakroff@gmail.com>
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Andrew Pinski <pinskia@gmail.com>
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2010-10-22 Artjoms Sinkarovs <artyom.shinakroff@gmail.com>
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Andrew Pinski <pinskia@gmail.com>
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* c-typeck.c (build_array_ref): Handle subscripting of vectors.
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* doc/extend.texi: New paragraph
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@ -476,8 +490,7 @@
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* gcc.c (DEFAULT_SWITCH_CURTAILS_COMPILATION,
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SWITCH_CURTAILS_COMPILATION): Remove.
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* doc/tm.texi.in (SWITCH_CURTAILS_COMPILATION): Remove
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documentation.
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* doc/tm.texi.in (SWITCH_CURTAILS_COMPILATION): Remove documentation.
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* doc/tm.texi: Regenerate.
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* system.h (SWITCH_CURTAILS_COMPILATION): Poison.
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@ -3244,7 +3244,17 @@
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(const_int 2)
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(const_int 3)])))]
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"TARGET_SSE"
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"ix86_fixup_binary_operands (UNKNOWN, V4SFmode, operands);")
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{
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rtx dst = ix86_fixup_binary_operands (UNKNOWN, V4SFmode, operands);
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emit_insn (gen_sse_movhlps (dst, operands[1], operands[2]));
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/* Fix up the destination if needed. */
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if (dst != operands[0])
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emit_move_insn (operands[0], dst);
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DONE;
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})
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(define_insn "*avx_movhlps"
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[(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,x,m")
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@ -3256,7 +3266,7 @@
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(const_int 7)
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(const_int 2)
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(const_int 3)])))]
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"TARGET_AVX && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
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"TARGET_AVX && ix86_binary_operator_ok (UNKNOWN, V4SFmode, operands)"
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"@
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vmovhlps\t{%2, %1, %0|%0, %1, %2}
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vmovlps\t{%H2, %1, %0|%0, %1, %H2}
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@ -3275,7 +3285,7 @@
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(const_int 7)
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(const_int 2)
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(const_int 3)])))]
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"TARGET_SSE && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
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"TARGET_SSE && ix86_binary_operator_ok (UNKNOWN, V4SFmode, operands)"
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"@
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movhlps\t{%2, %0|%0, %2}
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movlps\t{%H2, %0|%0, %H2}
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@ -3294,7 +3304,17 @@
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(const_int 4)
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(const_int 5)])))]
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"TARGET_SSE"
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"ix86_fixup_binary_operands (UNKNOWN, V4SFmode, operands);")
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{
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rtx dst = ix86_fixup_binary_operands (UNKNOWN, V4SFmode, operands);
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emit_insn (gen_sse_movlhps (dst, operands[1], operands[2]));
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/* Fix up the destination if needed. */
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if (dst != operands[0])
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emit_move_insn (operands[0], dst);
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DONE;
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})
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(define_insn "*avx_movlhps"
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[(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,x,o")
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@ -3701,7 +3721,17 @@
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(parallel [(const_int 0) (const_int 1)]))
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(match_operand:V2SF 2 "nonimmediate_operand" "")))]
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"TARGET_SSE"
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"ix86_fixup_binary_operands (UNKNOWN, V4SFmode, operands);")
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{
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rtx dst = ix86_fixup_binary_operands (UNKNOWN, V4SFmode, operands);
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emit_insn (gen_sse_loadhps (dst, operands[1], operands[2]));
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/* Fix up the destination if needed. */
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if (dst != operands[0])
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emit_move_insn (operands[0], dst);
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DONE;
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})
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(define_insn "*avx_loadhps"
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[(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,x,o")
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@ -3710,7 +3740,7 @@
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(match_operand:V4SF 1 "nonimmediate_operand" "x,x,0")
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(parallel [(const_int 0) (const_int 1)]))
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(match_operand:V2SF 2 "nonimmediate_operand" "m,x,x")))]
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"TARGET_AVX"
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"TARGET_AVX && ix86_binary_operator_ok (UNKNOWN, V4SFmode, operands)"
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"@
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vmovhps\t{%2, %1, %0|%0, %1, %2}
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vmovlhps\t{%2, %1, %0|%0, %1, %2}
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@ -3726,7 +3756,7 @@
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(match_operand:V4SF 1 "nonimmediate_operand" "0,0,0")
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(parallel [(const_int 0) (const_int 1)]))
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(match_operand:V2SF 2 "nonimmediate_operand" "m,x,x")))]
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"TARGET_SSE"
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"TARGET_SSE && ix86_binary_operator_ok (UNKNOWN, V4SFmode, operands)"
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"@
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movhps\t{%2, %0|%0, %2}
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movlhps\t{%2, %0|%0, %2}
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@ -3739,7 +3769,7 @@
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(vec_select:V2SF
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(match_operand:V4SF 1 "nonimmediate_operand" "x,x,m")
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(parallel [(const_int 0) (const_int 1)])))]
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"TARGET_AVX"
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"TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
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"@
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vmovlps\t{%1, %0|%0, %1}
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vmovaps\t{%1, %0|%0, %1}
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@ -3753,7 +3783,7 @@
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(vec_select:V2SF
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(match_operand:V4SF 1 "nonimmediate_operand" "x,x,m")
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(parallel [(const_int 0) (const_int 1)])))]
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"TARGET_SSE"
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"TARGET_SSE && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
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"@
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movlps\t{%1, %0|%0, %1}
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movaps\t{%1, %0|%0, %1}
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@ -3769,7 +3799,17 @@
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(match_operand:V4SF 1 "nonimmediate_operand" "")
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(parallel [(const_int 2) (const_int 3)]))))]
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"TARGET_SSE"
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"ix86_fixup_binary_operands (UNKNOWN, V4SFmode, operands);")
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{
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rtx dst = ix86_fixup_binary_operands (UNKNOWN, V4SFmode, operands);
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emit_insn (gen_sse_loadlps (dst, operands[1], operands[2]));
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/* Fix up the destination if needed. */
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if (dst != operands[0])
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emit_move_insn (operands[0], dst);
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DONE;
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})
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(define_insn "*avx_loadlps"
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[(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,x,m")
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@ -3778,7 +3818,7 @@
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(vec_select:V2SF
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(match_operand:V4SF 1 "nonimmediate_operand" "x,x,0")
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(parallel [(const_int 2) (const_int 3)]))))]
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"TARGET_AVX"
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"TARGET_AVX && ix86_binary_operator_ok (UNKNOWN, V4SFmode, operands)"
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"@
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shufps\t{$0xe4, %1, %2, %0|%0, %2, %1, 0xe4}
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vmovlps\t{%2, %1, %0|%0, %1, %2}
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|
|
@ -3795,7 +3835,7 @@
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(vec_select:V2SF
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(match_operand:V4SF 1 "nonimmediate_operand" "x,0,0")
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(parallel [(const_int 2) (const_int 3)]))))]
|
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"TARGET_SSE"
|
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"TARGET_SSE && ix86_binary_operator_ok (UNKNOWN, V4SFmode, operands)"
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"@
|
||||
shufps\t{$0xe4, %1, %0|%0, %1, 0xe4}
|
||||
movlps\t{%2, %0|%0, %2}
|
||||
|
|
@ -4898,7 +4938,17 @@
|
|||
(parallel [(const_int 0)]))
|
||||
(match_operand:DF 2 "nonimmediate_operand" "")))]
|
||||
"TARGET_SSE2"
|
||||
"ix86_fixup_binary_operands (UNKNOWN, V2DFmode, operands);")
|
||||
{
|
||||
rtx dst = ix86_fixup_binary_operands (UNKNOWN, V2DFmode, operands);
|
||||
|
||||
emit_insn (gen_sse2_loadhpd (dst, operands[1], operands[2]));
|
||||
|
||||
/* Fix up the destination if needed. */
|
||||
if (dst != operands[0])
|
||||
emit_move_insn (operands[0], dst);
|
||||
|
||||
DONE;
|
||||
})
|
||||
|
||||
;; Avoid combining registers from different units in a single alternative,
|
||||
;; see comment above inline_secondary_memory_needed function in i386.c
|
||||
|
|
@ -4909,7 +4959,7 @@
|
|||
(match_operand:V2DF 1 "nonimmediate_operand" " x,x,0,0,0")
|
||||
(parallel [(const_int 0)]))
|
||||
(match_operand:DF 2 "nonimmediate_operand" " m,x,x,*f,r")))]
|
||||
"TARGET_AVX && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
|
||||
"TARGET_AVX && ix86_binary_operator_ok (UNKNOWN, V2DFmode, operands)"
|
||||
"@
|
||||
vmovhpd\t{%2, %1, %0|%0, %1, %2}
|
||||
vunpcklpd\t{%2, %1, %0|%0, %1, %2}
|
||||
|
|
@ -4927,7 +4977,7 @@
|
|||
(match_operand:V2DF 1 "nonimmediate_operand" " 0,0,x,0,0,0")
|
||||
(parallel [(const_int 0)]))
|
||||
(match_operand:DF 2 "nonimmediate_operand" " m,x,0,x,*f,r")))]
|
||||
"TARGET_SSE2 && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
|
||||
"TARGET_SSE2 && ix86_binary_operator_ok (UNKNOWN, V2DFmode, operands)"
|
||||
"@
|
||||
movhpd\t{%2, %0|%0, %2}
|
||||
unpcklpd\t{%2, %0|%0, %2}
|
||||
|
|
@ -4957,7 +5007,17 @@
|
|||
(match_operand:V2DF 1 "nonimmediate_operand" "")
|
||||
(parallel [(const_int 1)]))))]
|
||||
"TARGET_SSE2"
|
||||
"ix86_fixup_binary_operands (UNKNOWN, V2DFmode, operands);")
|
||||
{
|
||||
rtx dst = ix86_fixup_binary_operands (UNKNOWN, V2DFmode, operands);
|
||||
|
||||
emit_insn (gen_sse2_loadlpd (dst, operands[1], operands[2]));
|
||||
|
||||
/* Fix up the destination if needed. */
|
||||
if (dst != operands[0])
|
||||
emit_move_insn (operands[0], dst);
|
||||
|
||||
DONE;
|
||||
})
|
||||
|
||||
;; Avoid combining registers from different units in a single alternative,
|
||||
;; see comment above inline_secondary_memory_needed function in i386.c
|
||||
|
|
|
|||
|
|
@ -1,3 +1,8 @@
|
|||
2010-10-28 Uros Bizjak <ubizjak@gmail.com>
|
||||
|
||||
PR target/46153
|
||||
* gcc.target/i386/pr46153.c: New test.
|
||||
|
||||
2010-10-27 Jason Merrill <jason@redhat.com>
|
||||
|
||||
* g++.dg/cpp0x/constexpr-is_literal.C: New.
|
||||
|
|
@ -33,16 +38,16 @@
|
|||
updates in warning.
|
||||
* obj-c++.dg/property/property-neg-5.mm: Updated testcase for
|
||||
updates in warning.
|
||||
|
||||
|
||||
2010-10-27 Nicola Pero <nicola.pero@meta-innovation.com>
|
||||
|
||||
* objc.dg/property/at-property-1.m: New.
|
||||
* objc.dg/property/at-property-1.m: New.
|
||||
* objc.dg/property/at-property-2.m: New.
|
||||
* objc.dg/property/at-property-3.m: New.
|
||||
* objc.dg/ivar-invalid-type-1.m: New.
|
||||
* obj-c++.dg/property/at-property-1.mm: New.
|
||||
* obj-c++.dg/property/at-property-2.mm: New.
|
||||
* obj-c++.dg/property/at-property-3.mm: New.
|
||||
* obj-c++.dg/property/at-property-3.mm: New.
|
||||
* obj-c++.dg/ivar-invalid-type-1.mm: New.
|
||||
* objc.dg/property/property-neg-6.m: Updated testcase for updates
|
||||
in error reporting.
|
||||
|
|
@ -172,8 +177,8 @@
|
|||
|
||||
2010-10-24 Nicola Pero <nicola.pero@meta-innovation.com>
|
||||
|
||||
PR objc/45735
|
||||
* obj-c.dg/pr45735.mm: New.
|
||||
PR objc/45735
|
||||
* obj-c.dg/pr45735.mm: New.
|
||||
* obj-c++.dg/pr45735.mm: New.
|
||||
|
||||
2010-10-24 Nicola Pero <nicola.pero@meta-innovation.com>
|
||||
|
|
@ -194,10 +199,10 @@
|
|||
parameter attributes are now supported.
|
||||
* obj-c++.dg/attributes/method-attribute-2.m: Same change.
|
||||
* objc.dg/attributes/parameter-attribute-1.m: New test.
|
||||
* objc.dg/attributes/parameter-attribute-2.m: New test.
|
||||
* objc.dg/attributes/parameter-attribute-2.m: New test.
|
||||
* obj-c++.dg/attributes/parameter-attribute-1.m: New test.
|
||||
* obj-c++.dg/attributes/parameter-attribute-2.m: New test.
|
||||
|
||||
* obj-c++.dg/attributes/parameter-attribute-2.m: New test.
|
||||
|
||||
2010-10-23 Iain Sandoe <iains@gcc.gnu.org>
|
||||
|
||||
Based on the CFString implementation in FSF apple/trunk branch.
|
||||
|
|
@ -213,7 +218,7 @@
|
|||
* objc.dg/demangle-1.m: New test.
|
||||
* obj-c++.dg/demangle-1.mm: New test.
|
||||
* obj-c++.dg/demangle-2.mm: New test.
|
||||
* obj-c++.dg/demangle-3.mm: New test.
|
||||
* obj-c++.dg/demangle-3.mm: New test.
|
||||
|
||||
2010-10-23 Ian Lance Taylor <iant@google.com>
|
||||
|
||||
|
|
|
|||
9
gcc/testsuite/gcc.target/i386/pr46153.c
Normal file
9
gcc/testsuite/gcc.target/i386/pr46153.c
Normal file
|
|
@ -0,0 +1,9 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-msse -ffloat-store" } */
|
||||
|
||||
typedef float v4sf __attribute__ ((__vector_size__ (16)));
|
||||
|
||||
v4sf foo (v4sf a)
|
||||
{
|
||||
return __builtin_ia32_movlhps (a, a);
|
||||
}
|
||||
Loading…
Add table
Reference in a new issue