Adjust the symbol for SECTION_LINK_ORDER linked_to section [PR99889]
As discussed in PR98125, -fpatchable-function-entry with SECTION_LINK_ORDER support doesn't work well on powerpc64 ELFv1 because the filled "Symbol" in .section name,"flags"o,@type,Symbol sits in .opd section instead of in the function_section like .text or named .text*. Since we already generates one label LPFE* which sits in function_section of current_function_decl, this patch is to reuse it as the symbol for the linked_to section. It avoids the above ABI specific issue when using the symbol concluded from current_function_decl. Besides, with this support some previous workarounds can be reverted. PR target/99889 gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_print_patchable_function_entry): Adjust to call function default_print_patchable_function_entry. * targhooks.cc (default_print_patchable_function_entry_1): Remove and move the flags preparation ... (default_print_patchable_function_entry): ... here, adjust to use current_function_funcdef_no for label no. * targhooks.h (default_print_patchable_function_entry_1): Remove. * varasm.cc (default_elf_asm_named_section): Adjust code for __patchable_function_entries section support with LPFE label. gcc/testsuite/ChangeLog: * g++.dg/pr93195a.C: Remove the skip on powerpc*-*-* 64-bit. * gcc.target/aarch64/pr92424-2.c: Adjust LPFE1 with LPFE0. * gcc.target/aarch64/pr92424-3.c: Likewise. * gcc.target/i386/pr93492-2.c: Likewise. * gcc.target/i386/pr93492-3.c: Likewise. * gcc.target/i386/pr93492-4.c: Likewise. * gcc.target/i386/pr93492-5.c: Likewise.
This commit is contained in:
Kewen.Lin
Kewen Lin
parent
4581328022
commit
f120196382
11 changed files with 39 additions and 60 deletions
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@ -14925,22 +14925,13 @@ rs6000_print_patchable_function_entry (FILE *file,
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unsigned HOST_WIDE_INT patch_area_size,
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bool record_p)
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{
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unsigned int flags = SECTION_WRITE | SECTION_RELRO;
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/* When .opd section is emitted, the function symbol
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default_print_patchable_function_entry_1 is emitted into the .opd section
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while the patchable area is emitted into the function section.
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Don't use SECTION_LINK_ORDER in that case. */
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if (!(TARGET_64BIT && DEFAULT_ABI != ABI_ELFv2)
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&& HAVE_GAS_SECTION_LINK_ORDER)
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flags |= SECTION_LINK_ORDER;
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bool global_entry_needed_p = rs6000_global_entry_point_prologue_needed_p ();
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/* For a function which needs global entry point, we will emit the
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patchable area before and after local entry point under the control of
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cfun->machine->global_entry_emitted, see the handling in function
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rs6000_output_function_prologue. */
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if (!global_entry_needed_p || cfun->machine->global_entry_emitted)
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default_print_patchable_function_entry_1 (file, patch_area_size, record_p,
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flags);
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default_print_patchable_function_entry (file, patch_area_size, record_p);
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}
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enum rtx_code
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@ -2020,15 +2020,17 @@ default_compare_by_pieces_branch_ratio (machine_mode)
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return 1;
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}
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/* Helper for default_print_patchable_function_entry and other
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print_patchable_function_entry hook implementations. */
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/* Write PATCH_AREA_SIZE NOPs into the asm outfile FILE around a function
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entry. If RECORD_P is true and the target supports named sections,
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the location of the NOPs will be recorded in a special object section
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called "__patchable_function_entries". This routine may be called
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twice per function to put NOPs before and after the function
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entry. */
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void
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default_print_patchable_function_entry_1 (FILE *file,
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unsigned HOST_WIDE_INT
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patch_area_size,
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bool record_p,
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unsigned int flags)
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default_print_patchable_function_entry (FILE *file,
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unsigned HOST_WIDE_INT patch_area_size,
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bool record_p)
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{
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const char *nop_templ = 0;
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int code_num;
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@ -2042,13 +2044,17 @@ default_print_patchable_function_entry_1 (FILE *file,
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if (record_p && targetm_common.have_named_sections)
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{
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char buf[256];
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static int patch_area_number;
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section *previous_section = in_section;
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const char *asm_op = integer_asm_op (POINTER_SIZE_UNITS, false);
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gcc_assert (asm_op != NULL);
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patch_area_number++;
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ASM_GENERATE_INTERNAL_LABEL (buf, "LPFE", patch_area_number);
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/* If SECTION_LINK_ORDER is supported, this internal label will
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be filled as the symbol for linked_to section. */
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ASM_GENERATE_INTERNAL_LABEL (buf, "LPFE", current_function_funcdef_no);
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unsigned int flags = SECTION_WRITE | SECTION_RELRO;
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if (HAVE_GAS_SECTION_LINK_ORDER)
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flags |= SECTION_LINK_ORDER;
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section *sect = get_section ("__patchable_function_entries",
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flags, current_function_decl);
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@ -2070,25 +2076,6 @@ default_print_patchable_function_entry_1 (FILE *file,
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output_asm_insn (nop_templ, NULL);
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}
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/* Write PATCH_AREA_SIZE NOPs into the asm outfile FILE around a function
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entry. If RECORD_P is true and the target supports named sections,
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the location of the NOPs will be recorded in a special object section
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called "__patchable_function_entries". This routine may be called
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twice per function to put NOPs before and after the function
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entry. */
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void
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default_print_patchable_function_entry (FILE *file,
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unsigned HOST_WIDE_INT patch_area_size,
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bool record_p)
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{
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unsigned int flags = SECTION_WRITE | SECTION_RELRO;
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if (HAVE_GAS_SECTION_LINK_ORDER)
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flags |= SECTION_LINK_ORDER;
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default_print_patchable_function_entry_1 (file, patch_area_size, record_p,
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flags);
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}
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bool
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default_profile_before_prologue (void)
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{
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@ -233,9 +233,6 @@ extern bool default_use_by_pieces_infrastructure_p (unsigned HOST_WIDE_INT,
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bool);
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extern int default_compare_by_pieces_branch_ratio (machine_mode);
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extern void default_print_patchable_function_entry_1 (FILE *,
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unsigned HOST_WIDE_INT,
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bool, unsigned int);
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extern void default_print_patchable_function_entry (FILE *,
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unsigned HOST_WIDE_INT,
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bool);
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@ -1,5 +1,4 @@
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/* { dg-do link { target { ! { nvptx*-*-* visium-*-* } } } } */
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/* { dg-skip-if "not supported" { { powerpc*-*-* } && lp64 } } */
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// { dg-require-effective-target o_flag_in_section }
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/* { dg-options "-O0 -fpatchable-function-entry=1" } */
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/* { dg-additional-options "-fno-pie" { target sparc*-*-* } } */
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@ -1,7 +1,7 @@
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/* { dg-do "compile" } */
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/* { dg-options "-O1" } */
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/* Test the placement of the .LPFE1 label. */
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/* Test the placement of the .LPFE0 label. */
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void
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__attribute__ ((target("branch-protection=bti"),
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@ -9,4 +9,4 @@ __attribute__ ((target("branch-protection=bti"),
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f10_bti ()
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{
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}
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/* { dg-final { scan-assembler "f10_bti:\n\thint\t34 // bti c\n.*\.LPFE1:\n\tnop\n.*\tret\n" } } */
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/* { dg-final { scan-assembler "f10_bti:\n\thint\t34 // bti c\n.*\.LPFE0:\n\tnop\n.*\tret\n" } } */
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@ -1,7 +1,7 @@
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/* { dg-do "compile" } */
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/* { dg-options "-O1" } */
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/* Test the placement of the .LPFE1 label. */
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/* Test the placement of the .LPFE0 label. */
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void
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__attribute__ ((target("branch-protection=bti+pac-ret+leaf"),
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@ -9,4 +9,4 @@ __attribute__ ((target("branch-protection=bti+pac-ret+leaf"),
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f10_pac ()
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{
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}
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/* { dg-final { scan-assembler "f10_pac:\n\thint\t34 // bti c\n.*\.LPFE1:\n\tnop\n.*\thint\t25 // paciasp\n.*\thint\t29 // autiasp\n.*\tret\n" } } */
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/* { dg-final { scan-assembler "f10_pac:\n\thint\t34 // bti c\n.*\.LPFE0:\n\tnop\n.*\thint\t25 // paciasp\n.*\thint\t29 // autiasp\n.*\tret\n" } } */
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@ -1,7 +1,7 @@
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/* { dg-do "compile" { target *-*-linux* } } */
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/* { dg-options "-O1 -fcf-protection -mmanual-endbr -fasynchronous-unwind-tables" } */
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/* Test the placement of the .LPFE1 label. */
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/* Test the placement of the .LPFE0 label. */
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void
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__attribute__ ((cf_check,patchable_function_entry (1, 0)))
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@ -9,4 +9,4 @@ f10_endbr (void)
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{
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}
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/* { dg-final { scan-assembler "\t\.cfi_startproc\n\tendbr(32|64)\n.*\.LPFE1:\n\tnop\n\tret\n" } } */
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/* { dg-final { scan-assembler "\t\.cfi_startproc\n\tendbr(32|64)\n.*\.LPFE0:\n\tnop\n\tret\n" } } */
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@ -2,7 +2,7 @@
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/* { dg-require-effective-target mfentry } */
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/* { dg-options "-O1 -fcf-protection -mmanual-endbr -mfentry -pg -fasynchronous-unwind-tables" } */
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/* Test the placement of the .LPFE1 label. */
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/* Test the placement of the .LPFE0 label. */
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void
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__attribute__ ((cf_check,patchable_function_entry (1, 0)))
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@ -10,4 +10,4 @@ f10_endbr (void)
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{
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}
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/* { dg-final { scan-assembler "\t\.cfi_startproc\n\tendbr(32|64)\n.*\.LPFE1:\n\tnop\n1:\tcall\t\[^\n\]*__fentry__\[^\n\]*\n\tret\n" } } */
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/* { dg-final { scan-assembler "\t\.cfi_startproc\n\tendbr(32|64)\n.*\.LPFE0:\n\tnop\n1:\tcall\t\[^\n\]*__fentry__\[^\n\]*\n\tret\n" } } */
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@ -1,11 +1,11 @@
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/* { dg-do "compile" { target *-*-linux* } } */
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/* { dg-options "-O1 -fpatchable-function-entry=1 -fasynchronous-unwind-tables" } */
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/* Test the placement of the .LPFE1 label. */
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/* Test the placement of the .LPFE0 label. */
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void
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foo (void)
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{
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}
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/* { dg-final { scan-assembler "\t\.cfi_startproc\n.*\.LPFE1:\n\tnop\n\tret\n" } } */
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/* { dg-final { scan-assembler "\t\.cfi_startproc\n.*\.LPFE0:\n\tnop\n\tret\n" } } */
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@ -2,11 +2,11 @@
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/* { dg-options "-O1 -fpatchable-function-entry=1 -mfentry -pg -fasynchronous-unwind-tables" } */
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/* { dg-additional-options "-fno-PIE" { target ia32 } } */
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/* Test the placement of the .LPFE1 label. */
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/* Test the placement of the .LPFE0 label. */
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void
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foo (void)
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{
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}
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/* { dg-final { scan-assembler "\t\.cfi_startproc\n.*\.LPFE1:\n\tnop\n1:\tcall\t\[^\n\]*__fentry__\[^\n\]*\n\tret\n" } } */
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/* { dg-final { scan-assembler "\t\.cfi_startproc\n.*\.LPFE0:\n\tnop\n1:\tcall\t\[^\n\]*__fentry__\[^\n\]*\n\tret\n" } } */
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@ -6915,11 +6915,16 @@ default_elf_asm_named_section (const char *name, unsigned int flags,
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fprintf (asm_out_file, ",%d", flags & SECTION_ENTSIZE);
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if (flags & SECTION_LINK_ORDER)
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{
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tree id = DECL_ASSEMBLER_NAME (decl);
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ultimate_transparent_alias_target (&id);
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const char *name = IDENTIFIER_POINTER (id);
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name = targetm.strip_name_encoding (name);
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fprintf (asm_out_file, ",%s", name);
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/* For now, only section "__patchable_function_entries"
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adopts flag SECTION_LINK_ORDER, internal label LPFE*
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was emitted in default_print_patchable_function_entry,
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just place it here for linked_to section. */
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gcc_assert (!strcmp (name, "__patchable_function_entries"));
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fprintf (asm_out_file, ",");
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char buf[256];
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ASM_GENERATE_INTERNAL_LABEL (buf, "LPFE",
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current_function_funcdef_no);
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assemble_name_raw (asm_out_file, buf);
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}
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if (HAVE_COMDAT_GROUP && (flags & SECTION_LINKONCE))
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{
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