rs6000: Add vcfuged instruction
Add the new vector centrifuge-doubleword instruction and built-in function access. [gcc] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * config/rs6000/altivec.h (vec_cfuge): New #define. * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant. (vcfuged): New insn. * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged): New built-in function. * config/rs6000/rs6000-call.c (builtin_function_type): Add handling for FUTURE_BUILTIN_VCFUGED case. * doc/extend.texi (PowerPC AltiVec Built-in Functions Available for a Future Architecture): Add description of vec_cfuge built-in function. [gcc/testsuite] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * gcc.target/powerpc/vec-cfuged-0.c: New test. * gcc.target/powerpc/vec-cfuged-1.c: New test.
This commit is contained in:
Kelvin Nilsen
Bill Schmidt
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2403d3d7a5
commit
ed07d68141
9 changed files with 161 additions and 0 deletions
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@ -1,3 +1,16 @@
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2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
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* config/rs6000/altivec.h (vec_cfuge): New #define.
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* config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
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(vcfuged): New insn.
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* config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
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New built-in function.
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* config/rs6000/rs6000-call.c (builtin_function_type): Add
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handling for FUTURE_BUILTIN_VCFUGED case.
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* doc/extend.texi (PowerPC AltiVec Built-in Functions Available
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for a Future Architecture): Add description of vec_cfuge built-in
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function.
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2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
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* config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
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@ -693,6 +693,7 @@ __altivec_scalar_pred(vec_any_nle,
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#define vec_ctzm(a, b) __builtin_altivec_vctzdm (a, b)
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#define vec_pdep(a, b) __builtin_altivec_vpdepd (a, b)
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#define vec_pext(a, b) __builtin_altivec_vpextd (a, b)
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#define vec_cfuge(a, b) __builtin_altivec_vcfuged (a, b)
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/* Overloaded built-in functions for future architecture. */
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#define vec_gnb(a, b) __builtin_vec_gnb (a, b)
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@ -160,6 +160,7 @@
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UNSPEC_BCD_OVERFLOW
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UNSPEC_VRLMI
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UNSPEC_VRLNM
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UNSPEC_VCFUGED
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UNSPEC_VCLZDM
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UNSPEC_VCTZDM
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UNSPEC_VGNB
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@ -4101,6 +4102,15 @@
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"bcd<bcd_add_sub>. %0,%1,%2,%3"
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[(set_attr "type" "vecsimple")])
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(define_insn "vcfuged"
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[(set (match_operand:V2DI 0 "altivec_register_operand" "=v")
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(unspec:V2DI [(match_operand:V2DI 1 "altivec_register_operand" "v")
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(match_operand:V2DI 2 "altivec_register_operand" "v")]
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UNSPEC_VCFUGED))]
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"TARGET_FUTURE"
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"vcfuged %0,%1,%2"
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[(set_attr "type" "vecsimple")])
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(define_insn "vclzdm"
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[(set (match_operand:V2DI 0 "altivec_register_operand" "=v")
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(unspec:V2DI [(match_operand:V2DI 1 "altivec_register_operand" "v")
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@ -2577,6 +2577,7 @@ BU_P9_OVERLOAD_2 (CMPEQB, "byte_in_set")
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BU_FUTURE_MISC_2 (CFUGED, "cfuged", CONST, cfuged)
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/* Future architecture vector built-ins. */
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BU_FUTURE_V_2 (VCFUGED, "vcfuged", CONST, vcfuged)
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BU_FUTURE_V_2 (VCLZDM, "vclzdm", CONST, vclzdm)
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BU_FUTURE_V_2 (VCTZDM, "vctzdm", CONST, vctzdm)
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BU_FUTURE_V_2 (VPDEPD, "vpdepd", CONST, vpdepd)
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@ -12951,6 +12951,7 @@ builtin_function_type (machine_mode mode_ret, machine_mode mode_arg0,
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case P8V_BUILTIN_ORC_V4SI_UNS:
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case P8V_BUILTIN_ORC_V2DI_UNS:
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case P8V_BUILTIN_ORC_V1TI_UNS:
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case FUTURE_BUILTIN_VCFUGED:
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case FUTURE_BUILTIN_VCLZDM:
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case FUTURE_BUILTIN_VCTZDM:
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case FUTURE_BUILTIN_VGNB:
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@ -20719,6 +20719,15 @@ PowerPC family of processors, starting with a hypothetical CPU
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which may or may not be available in the future
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(@option{-mcpu=future}) or later:
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@smallexample
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@exdent vector unsigned long long int
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@exdent vec_cfuge (vector unsigned long long int, vector unsigned long long int)
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@end smallexample
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Perform a vector centrifuge operation, as if implemented by the Future
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@code{vcfuged} instruction.
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@findex vec_cfuge
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@smallexample
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@exdent vector unsigned long long int
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@exdent vec_clzm (vector unsigned long long int, vector unsigned long long int)
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@ -1,3 +1,8 @@
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2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
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* gcc.target/powerpc/vec-cfuged-0.c: New test.
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* gcc.target/powerpc/vec-cfuged-1.c: New test.
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2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
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* gcc.target.powerpc/cfuged-0.c: New test.
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61
gcc/testsuite/gcc.target/powerpc/vec-cfuged-0.c
Normal file
61
gcc/testsuite/gcc.target/powerpc/vec-cfuged-0.c
Normal file
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@ -0,0 +1,61 @@
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/* { dg-do compile } */
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/* { dg-options "-mdejagnu-cpu=future" } */
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#include <altivec.h>
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extern void abort (void);
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vector unsigned long long int
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do_vec_cfuge (vector unsigned long long int source,
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vector unsigned long long int mask)
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{
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return vec_cfuge (source, mask);
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}
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int
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vectors_equal (vector unsigned long long int a,
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vector unsigned long long int b)
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{
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return (a[0] == b[0]) && (a[1] == b[1]);
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}
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int main (int argc, char *argv [])
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{
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vector unsigned long long int source_a = { 0xa5f07e3cull, 0x7e3ca5f0ull };
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vector unsigned long long int source_b = { 0x3ca5f07eull, 0x5a0fe7c3ull };
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vector unsigned long long int mask_a = { 0xffff0000ull, 0x0000ffffull };
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vector unsigned long long int mask_b = { 0x0f0f0f0full, 0xf0f0f0f0ull };
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/* See cfuged-0.c for derivation of expected results.
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result_aa [0] is compute (source [0], mask [0];
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result_aa [1] is compute (source [1], mask [1].
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result_ab [0] is compute (source [0], mask [2];
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result_ab [1] is compute (source [1], mask [3].
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result_ba [0] is compute (source [2], mask [0];
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result_ba [1] is compute (source [3], mask [1].
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result_bb [0] is compute (source [2], mask [2];
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result_bb [1] is compute (source [3], mask [3]. */
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vector unsigned long long int result_aa = { 0x7e3ca5f0ull, 0x7e3ca5f0ull };
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vector unsigned long long int result_ab = { 0xaf7350ecull, 0xec5073afull };
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vector unsigned long long int result_ba = { 0xf07e3ca5ull, 0x5a0fe7c3ull };
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vector unsigned long long int result_bb = { 0x3af7c50eull, 0xaf7350ecull };
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if (!vectors_equal (do_vec_cfuge (source_a, mask_a), result_aa))
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abort ();
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if (!vectors_equal (do_vec_cfuge (source_a, mask_b), result_ab))
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abort ();
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if (!vectors_equal (do_vec_cfuge (source_b, mask_a), result_ba))
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abort ();
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if (!vectors_equal (do_vec_cfuge (source_b, mask_b), result_bb))
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abort ();
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return 0;
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}
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/* { dg-final { scan-assembler {\mvcfuged\M} } } */
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60
gcc/testsuite/gcc.target/powerpc/vec-cfuged-1.c
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60
gcc/testsuite/gcc.target/powerpc/vec-cfuged-1.c
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@ -0,0 +1,60 @@
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/* { dg-do run } */
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/* { dg-require-effective-target powerpc_future_hw } */
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/* { dg-options "-mdejagnu-cpu=future" } */
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#include <altivec.h>
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extern void abort (void);
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vector unsigned long long int
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do_vec_cfuge (vector unsigned long long int source,
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vector unsigned long long int mask)
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{
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return vec_cfuge (source, mask);
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}
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int
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vectors_equal (vector unsigned long long int a,
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vector unsigned long long int b)
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{
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return (a[0] == b[0]) && (a[1] == b[1]);
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}
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int main (int argc, char *argv [])
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{
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vector unsigned long long int source_a = { 0xa5f07e3cull, 0x7e3ca5f0ull };
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vector unsigned long long int source_b = { 0x3ca5f07eull, 0x5a0fe7c3ull };
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vector unsigned long long int mask_a = { 0xffff0000ull, 0x0000ffffull };
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vector unsigned long long int mask_b = { 0x0f0f0f0full, 0xf0f0f0f0ull };
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/* See cfuged-0.c for derivation of expected results.
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result_aa [0] is compute (source [0], mask [0];
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result_aa [1] is compute (source [1], mask [1].
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result_ab [0] is compute (source [0], mask [2];
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result_ab [1] is compute (source [1], mask [3].
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result_ba [0] is compute (source [2], mask [0];
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result_ba [1] is compute (source [3], mask [1].
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result_bb [0] is compute (source [2], mask [2];
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result_bb [1] is compute (source [3], mask [3]. */
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vector unsigned long long int result_aa = { 0x7e3ca5f0ull, 0x7e3ca5f0ull };
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vector unsigned long long int result_ab = { 0xaf7350ecull, 0xec5073afull };
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vector unsigned long long int result_ba = { 0xf07e3ca5ull, 0x5a0fe7c3ull };
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vector unsigned long long int result_bb = { 0x3af7c50eull, 0xaf7350ecull };
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if (!vectors_equal (do_vec_cfuge (source_a, mask_a), result_aa))
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abort ();
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if (!vectors_equal (do_vec_cfuge (source_a, mask_b), result_ab))
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abort ();
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if (!vectors_equal (do_vec_cfuge (source_b, mask_a), result_ba))
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abort ();
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if (!vectors_equal (do_vec_cfuge (source_b, mask_b), result_bb))
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abort ();
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return 0;
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}
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