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re PR target/70341 (cost model for addresses is incorrect, slsr is using reg + reg + CST for arm)

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PR target/70341
	* config/aarch64/aarch64.md (casesi): Create the casesi_dispatch
	MEM manually here, set MEM_READONLY_P and MEM_NOTRAP_P on it.

From-SVN: r269260
This commit is contained in:
Jakub Jelinek 2019-02-27 19:11:26 +01:00 • committed by Jakub Jelinek
parent b91dfdcc68
commit ec30291038
2 changed files with 20 additions and 4 deletions
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2
gcc/ChangeLog
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@ -10,6 +10,8 @@
(thumb2_casesi_internal_pic): New define_expand. Rename old
define_insn to ...
(*thumb2_casesi_internal_pic): ... this. Add mode to LABEL_REFs.
* config/aarch64/aarch64.md (casesi): Create the casesi_dispatch
MEM manually here, set MEM_READONLY_P and MEM_NOTRAP_P on it.
2019-02-27 Richard Biener <rguenther@suse.de>

22
gcc/config/aarch64/aarch64.md
View file

@ -622,13 +622,27 @@
operands[0], operands[2], operands[4]));
operands[2] = force_reg (DImode, gen_rtx_LABEL_REF (DImode, operands[3]));
emit_jump_insn (gen_casesi_dispatch (operands[2], operands[0],
operands[3]));
operands[2]
= gen_rtx_UNSPEC (Pmode, gen_rtvec (2, operands[2], operands[0]),
UNSPEC_CASESI);
operands[2] = gen_rtx_MEM (DImode, operands[2]);
MEM_READONLY_P (operands[2]) = 1;
MEM_NOTRAP_P (operands[2]) = 1;
emit_jump_insn (gen_casesi_dispatch (operands[2], operands[3]));
DONE;
}
)
(define_insn "casesi_dispatch"
(define_expand "casesi_dispatch"
[(parallel
[(set (pc) (match_operand:DI 0 ""))
(clobber (reg:CC CC_REGNUM))
(clobber (match_scratch:DI 2))
(clobber (match_scratch:DI 3))
(use (label_ref:DI (match_operand 1 "")))])]
"")
(define_insn "*casesi_dispatch"
[(parallel
[(set (pc)
(mem:DI (unspec [(match_operand:DI 0 "register_operand" "r")
@ -637,7 +651,7 @@
(clobber (reg:CC CC_REGNUM))
(clobber (match_scratch:DI 3 "=r"))
(clobber (match_scratch:DI 4 "=r"))
(use (label_ref (match_operand 2 "" "")))])]
(use (label_ref:DI (match_operand 2 "" "")))])]
""
"*
return aarch64_output_casesi (operands);