PR target/86951 arm - Handle speculation barriers on pre-armv7 CPUs
The AArch32 instruction sets prior to Armv7 do not define the ISB and DSB instructions that are needed to form a speculation barrier. While I do not know of any instances of cores based on those instruction sets being vulnerable to speculative side channel attacks it is possible to run code built for those ISAs on more recent hardware where they would become vulnerable. This patch works around this by using a library call added to libgcc. That code can then take any platform-specific actions necessary to ensure safety. For the moment I've only handled two cases: the library code being built for armv7 or later anyway and running on Linux. On Linux we can handle this by calling the kernel function that will flush a small amount of cache. Such a sequence ends with a ISB+DSB sequence if running on an Armv7 or later CPU. gcc: PR target/86951 * config/arm/arm-protos.h (arm_emit_speculation_barrier): New prototype. * config/arm/arm.c (speculation_barrier_libfunc): New static variable. (arm_init_libfuncs): Initialize it. (arm_emit_speculation_barrier): New function. * config/arm/arm.md (speculation_barrier): Call arm_emit_speculation_barrier for architectures that do not have DSB or ISB. (speculation_barrier_insn): Only match on Armv7 or later. libgcc: PR target/86951 * config/arm/lib1funcs.asm (speculation_barrier): New function. * config/arm/t-arm (LIB1ASMFUNCS): Add it to list of functions to build. From-SVN: r263806
This commit is contained in:
Richard Earnshaw
Richard Earnshaw
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60d91c7fae
commit
ebdb6f2377
7 changed files with 93 additions and 7 deletions
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@ -1,3 +1,17 @@
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2018-08-23 Richard Earnshaw <rearnsha@arm.com>
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PR target/86951
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* config/arm/arm-protos.h (arm_emit_speculation_barrier): New
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prototype.
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* config/arm/arm.c (speculation_barrier_libfunc): New static
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variable.
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(arm_init_libfuncs): Initialize it.
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(arm_emit_speculation_barrier): New function.
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* config/arm/arm.md (speculation_barrier): Call
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arm_emit_speculation_barrier for architectures that do not have
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DSB or ISB.
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(speculation_barrier_insn): Only match on Armv7 or later.
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2018-08-23 Richard Biener <rguenther@suse.de>
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PR middle-end/87024
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@ -56,6 +56,8 @@ extern void arm_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update
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extern rtx arm_simd_vect_par_cnst_half (machine_mode mode, bool high);
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extern bool arm_simd_check_vect_par_cnst_half_p (rtx op, machine_mode mode,
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bool high);
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extern void arm_emit_speculation_barrier_function (void);
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#ifdef RTX_CODE
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extern void arm_gen_unlikely_cbranch (enum rtx_code, machine_mode cc_mode,
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rtx label_ref);
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@ -2466,8 +2466,9 @@ arm_set_fixed_conv_libfunc (convert_optab optable, machine_mode to,
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set_conv_libfunc (optable, to, from, buffer);
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}
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/* Set up library functions unique to ARM. */
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static GTY(()) rtx speculation_barrier_libfunc;
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/* Set up library functions unique to ARM. */
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static void
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arm_init_libfuncs (void)
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{
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@ -2753,6 +2754,8 @@ arm_init_libfuncs (void)
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if (TARGET_AAPCS_BASED)
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synchronize_libfunc = init_one_libfunc ("__sync_synchronize");
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speculation_barrier_libfunc = init_one_libfunc ("__speculation_barrier");
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}
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/* On AAPCS systems, this is the "struct __va_list". */
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@ -31528,6 +31531,16 @@ arm_constant_alignment (const_tree exp, HOST_WIDE_INT align)
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return align;
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}
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/* Emit a speculation barrier on target architectures that do not have
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DSB/ISB directly. Such systems probably don't need a barrier
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themselves, but if the code is ever run on a later architecture, it
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might become a problem. */
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void
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arm_emit_speculation_barrier_function ()
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{
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emit_library_call (speculation_barrier_libfunc, LCT_NORMAL, VOIDmode);
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}
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#if CHECKING_P
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namespace selftest {
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@ -12016,10 +12016,16 @@
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[(unspec_volatile [(const_int 0)] VUNSPEC_SPECULATION_BARRIER)]
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"TARGET_EITHER"
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"
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/* Don't emit anything for Thumb1 and suppress the warning from the
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generic expansion. */
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if (!TARGET_32BIT)
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DONE;
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/* For thumb1 (except Armv8 derivatives), and for pre-Armv7 we don't
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have a usable barrier (and probably don't need one in practice).
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But to be safe if such code is run on later architectures, call a
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helper function in libgcc that will do the thing for the active
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system. */
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if (!(arm_arch7 || arm_arch8))
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{
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arm_emit_speculation_barrier_function ();
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DONE;
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}
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"
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)
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@ -12027,7 +12033,7 @@
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;; tracking.
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(define_insn "*speculation_barrier_insn"
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[(unspec_volatile [(const_int 0)] VUNSPEC_SPECULATION_BARRIER)]
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"TARGET_32BIT"
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"arm_arch7 || arm_arch8"
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"isb\;dsb\\tsy"
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[(set_attr "type" "block")
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(set_attr "length" "8")]
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@ -1,3 +1,10 @@
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2018-08-23 Richard Earnshaw <rearnsha@arm.com>
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PR target/86951
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* config/arm/lib1funcs.asm (speculation_barrier): New function.
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* config/arm/t-arm (LIB1ASMFUNCS): Add it to list of functions
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to build.
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2018-08-22 Iain Sandoe <iain@sandoe.co.uk>
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* config/unwind-dw2-fde-darwin.c
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@ -1533,6 +1533,50 @@ LSYM(Lover12):
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#error "This is only for ARM EABI GNU/Linux"
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#endif
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#endif /* L_clear_cache */
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#ifdef L_speculation_barrier
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FUNC_START speculation_barrier
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#if __ARM_ARCH >= 7
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isb
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dsb sy
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#elif defined __ARM_EABI__ && defined __linux__
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/* We don't have a speculation barrier directly for this
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platform/architecture variant. But we can use a kernel
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clear_cache service routine which will emit such instructions
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if run on a later version of the architecture. We don't
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really want to flush the cache, but we must give it a valid
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address, so just clear pc..pc+1. */
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#if defined __thumb__ && !defined __thumb2__
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push {r7}
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mov r7, #0xf
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lsl r7, #16
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add r7, #2
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adr r0, . + 4
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add r1, r0, #1
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mov r2, #0
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svc 0
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pop {r7}
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#else
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do_push {r7}
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#ifdef __ARM_ARCH_6T2__
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movw r7, #2
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movt r7, #0xf
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#else
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mov r7, #0xf0000
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add r7, r7, #2
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#endif
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add r0, pc, #0 /* ADR. */
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add r1, r0, #1
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mov r2, #0
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svc 0
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do_pop {r7}
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#endif /* Thumb1 only */
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#else
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#warning "No speculation barrier defined for this platform"
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#endif
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RET
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FUNC_END speculation_barrier
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#endif
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/* ------------------------------------------------------------------------ */
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/* Dword shift operations. */
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/* All the following Dword shift variants rely on the fact that
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@ -1,6 +1,6 @@
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LIB1ASMSRC = arm/lib1funcs.S
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LIB1ASMFUNCS = _thumb1_case_sqi _thumb1_case_uqi _thumb1_case_shi \
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_thumb1_case_uhi _thumb1_case_si
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_thumb1_case_uhi _thumb1_case_si _speculation_barrier
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HAVE_CMSE:=$(findstring __ARM_FEATURE_CMSE,$(shell $(gcc_compile_bare) -dM -E - </dev/null))
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ifneq ($(shell $(gcc_compile_bare) -E -mcmse - </dev/null 2>/dev/null),)
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