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MAINTAINERS (crx port, [...]): Remove.

Browse source 
* MAINTAINERS (crx port, m68hc11 port): Remove.  Move maintainers
	to Write After Approval.
	* config-ml.in: Don't handle arc-*-elf*.
	* configure.ac (arc-*-*, crx-*-*, i[[3456789]]86-*-pe,
	m68hc11-*-*|m6811-*-*|m68hc12-*-*|m6812-*-*, mcore-*-pe*): Don't
	handle GCC libraries.
	* configure: Regenerate.

contrib:
	* compare-all-tests (all_targets): Remove crx and m68hc11.

fixincludes:
	* mkfixinc.sh: Don't handle i?86-moss-msdos* or i?86-*-pe.

gcc:
	* config/alpha/gnu.h: Remove.
	* config/arc: Remove directory.
	* config/arm/netbsd.h: Remove.
	* config/arm/t-pe: Remove.
	* config/crx: Remove directory.
	* config/i386/netbsd.h: Remove.
	* config/m68hc11: Remove directory.
	* config/m68k/uclinux-oldabi.h: Remove.
	* config/mcore/mcore-pe.h: Remove.
	* config/mcore/t-mcore-pe: Remove.
	* config/netbsd-aout.h: Remove.
	* config/rs6000/gnu.h: Remove.
	* config/sh/sh-symbian.h: Remove.
	* config/sh/symbian-base.c: Remove.
	* config/sh/symbian-c.c: Remove.
	* config/sh/symbian-cxx.c: Remove.
	* config/sh/symbian-post.h: Remove.
	* config/sh/symbian-pre.h: Remove.
	* config/sh/t-symbian: Remove.
	* config/svr3.h: Remove.
	* config/vax/netbsd.h: Remove.
	* config.build: Don't handle i[34567]86-*-pe.
	* config.gcc: Remove handling of deprecations for most deprecated
	targets.
	(m68k-*-uclinuxoldabi*): Add to second deprecated list.
	(alpha*-*-gnu*, arc-*-elf*, arm*-*-netbsd*, arm-*-pe*, crx-*-elf,
	i[34567]86-*-netbsd*, i[34567]86-*-pe, m68hc11-*-*|m6811-*-*,
	m68hc12-*-*|m6812-*-*, m68k-*-uclinuxoldabi*, mcore-*-pe*,
	powerpc64-*-gnu*, powerpc-*-gnu-gnualtivec*, powerpc-*-gnu*,
	sh-*-symbianelf* | sh[12346l]*-*-symbianelf*, vax-*-netbsd*):
	Remove cases.
	* config.host: Don't handle i[34567]86-*-pe.
	* config/rs6000/linux64.h (LINK_OS_GNU_SPEC): Remove.
	(ASM_SPEC32): Don't handle -mcall-gnu.
	* config/rs6000/sysv4.h (SUBTARGET_OVERRIDE_OPTIONS): Don't handle
	-mcall-gnu.
	(ASM_SPEC, CC1_SPEC, LINK_START_SPEC, LINK_OS_SPEC, CPP_SPEC,
	STARTFILE_SPEC, LIB_SPEC, ENDFILE_SPEC): Don't handle -mcall-gnu.
	(LIB_GNU_SPEC, STARTFILE_GNU_SPEC, ENDFILE_GNU_SPEC,
	LINK_START_GNU_SPEC, LINK_OS_GNU_SPEC, CPP_OS_GNU_SPEC): Remove.
	(SUBTARGET_EXTRA_SPECS): Remove *_gnu specs.
	* config/sh/sh-protos.h, config/sh/sh.c: Remove all code
	conditional on SYMBIAN.
	* configure.ac: Don't handle powerpc*-*-gnu*.
	* configure: Regenerate.
	* doc/extend.texi (interrupt attribute): Don't mention CRX.
	* doc/install-old.texi (m6811, m6812): Don't mention.
	* doc/install.texi (arc-*-elf*): Don't document multilib option.
	(arc-*-elf, CRX, m6811-elf, m6812-elf): Remove.
	(m68k-uclinuxoldabi): Don't mention.
	* doc/invoke.texi (ARC Options, CRX Options, M68hc1x Options):
	Remove.
	(-mcall-gnu): Remove.
	* doc/md.texi (CRX Architecture, Motorola 68HC11 & 68HC12
	families): Remove constraint documentation.

gcc/testsuite:
	* gcc.c-torture/execute/920501-8.x: Remove.
	* gcc.c-torture/execute/930513-1.x: Remove.
	* gcc.c-torture/execute/960312-1.x: Remove.
	* gcc.c-torture/compile/20000804-1.c,
	gcc.c-torture/compile/20001205-1.c,
	gcc.c-torture/compile/20001226-1.c,
	gcc.c-torture/compile/20010518-2.c,
	gcc.c-torture/compile/20020312-1.c,
	gcc.c-torture/compile/20020604-1.c,
	gcc.c-torture/compile/920501-12.c,
	gcc.c-torture/compile/920501-4.c,
	gcc.c-torture/compile/920520-1.c,
	gcc.c-torture/compile/980506-1.c,
	gcc.c-torture/execute/980709-1.x,
	gcc.c-torture/execute/990826-0.x: Don't XFAIL or use special
	options for m68hc11.
	* gcc.dg/cpp/assert4.c: Don't handle ARC.
	* gcc.dg/sibcall-3.c, gcc.dg/sibcall-4.c: Don't XFAIL for arc or
	m68hc11.

libgcc:
	* config.host (alpha*-*-gnu*, arc-*-elf*, arm*-*-netbsd*,
	arm-*-pe*, crx-*-elf, i[34567]86-*-netbsd*, i[34567]86-*-pe,
	m68hc11-*-*|m6811-*-*, m68hc12-*-*|m6812-*-*, mcore-*-pe*,
	powerpc64-*-gnu*, powerpc-*-gnu-gnualtivec*, powerpc-*-gnu*,
	sh-*-symbianelf* | sh[12346l]*-*-symbianelf*, vax-*-netbsd*):
	Remove cases.

libstdc++-v3:
	* configure.ac: Don't handle powerpc*-*-gnu*.
	* configure: Regenerate.

From-SVN: r171302
This commit is contained in:
Joseph Myers 2011-03-22 19:58:18 +00:00 • committed by Joseph Myers
parent 999a7d80b5
commit ebb9f8b03b
91 changed files with 144 additions and 27959 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

10
ChangeLog
View file

@ -1,3 +1,13 @@
2011-03-22 Joseph Myers <joseph@codesourcery.com>
* MAINTAINERS (crx port, m68hc11 port): Remove. Move maintainers
to Write After Approval.
* config-ml.in: Don't handle arc-*-elf*.
* configure.ac (arc-*-*, crx-*-*, i[[3456789]]86-*-pe,
m68hc11-*-*|m6811-*-*|m68hc12-*-*|m6812-*-*, mcore-*-pe*): Don't
handle GCC libraries.
* configure: Regenerate.
2011-03-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
PR bootstrap/48120:

4
MAINTAINERS
View file

@ -51,7 +51,6 @@ avr port Eric Weddington eric.weddington@atmel.com
bfin port Bernd Schmidt bernds@codesourcery.com
bfin port Jie Zhang jie@codesourcery.com
cris port Hans-Peter Nilsson hp@axis.com
crx port Pompapathi V Gadad Pompapathi.V.Gadad@nsc.com
fr30 port Nick Clifton nickc@redhat.com
frv port Nick Clifton nickc@redhat.com
frv port Alexandre Oliva aoliva@redhat.com
@ -68,7 +67,6 @@ iq2000 port Nick Clifton nickc@redhat.com
lm32 port Sebastien Bourdeauducq sebastien@milkymist.org
m32c port DJ Delorie dj@redhat.com
m32r port Nick Clifton nickc@redhat.com
m68hc11 port Stephane Carrez stcarrez@nerim.fr
m68k port (?) Jeff Law law@redhat.com
m68k port Andreas Schwab schwab@linux-m68k.org
m68k-motorola-sysv port Philippe De Muyter phdm@macqel.be
@ -326,6 +324,7 @@ Julian Brown julian@codesourcery.com
Christian Bruel christian.bruel@st.com
Kevin Buettner kevinb@redhat.com
Andrew Cagney cagney@redhat.com
Stephane Carrez stcarrez@nerim.fr
Chandra Chavva cchavva@redhat.com
Fabien Chêne fabien@gcc.gnu.org
William Cohen wcohen@redhat.com
@ -357,6 +356,7 @@ John Freeman jfreeman08@gmail.com
Nathan Froyd froydnj@codesourcery.com
Chao-ying Fu fu@mips.com
Gary Funck gary@intrepid.com
Pompapathi V Gadad Pompapathi.V.Gadad@nsc.com
Kaveh Ghazi ghazi@gcc.gnu.org
Matthew Gingell gingell@gnat.com
Tristan Gingold gingold@adacore.com

15
config-ml.in
View file

@ -2,7 +2,7 @@
# wanting multilib support.
#
# Copyright (C) 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
# 2005, 2006, 2007, 2008, 2010 Free Software Foundation, Inc.
# 2005, 2006, 2007, 2008, 2010, 2011 Free Software Foundation, Inc.
#
# This file is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
@ -224,19 +224,6 @@ done
# $host here, not $target.
case "${host}" in
arc-*-elf*)
if [ x$enable_biendian != xyes ]
then
old_multidirs=${multidirs}
multidirs=""
for x in ${old_multidirs}; do
case "${x}" in
*be*) : ;;
*) multidirs="${multidirs} ${x}" ;;
esac
done
fi
;;
arm-*-*)
if [ x"$enable_fpu" = xno ]
then

10
configure vendored
View file

@ -3224,7 +3224,7 @@ case "${target}" in
libgloss_dir=wince
;;
arc-*-*)
noconfigdirs="$noconfigdirs target-libgloss ${libgcj}"
noconfigdirs="$noconfigdirs target-libgloss"
;;
arm-semi-aof )
;;
@ -3298,7 +3298,6 @@ case "${target}" in
libgloss_dir=cris
;;
crx-*-*)
noconfigdirs="$noconfigdirs target-libstdc++-v3 target-mudflap ${libgcj}"
;;
d10v-*-*)
noconfigdirs="$noconfigdirs target-libstdc++-v3 target-libgloss ${libgcj}"
@ -3416,7 +3415,7 @@ case "${target}" in
i[3456789]86-*-uwin* | i[3456789]86-*-interix* )
;;
i[3456789]86-*-pe)
noconfigdirs="$noconfigdirs target-libstdc++-v3 target-libgloss ${libgcj}"
noconfigdirs="$noconfigdirs target-libgloss"
;;
i[3456789]86-*-sco3.2v5*)
# The linker does not yet know about weak symbols in COFF,
@ -3442,7 +3441,7 @@ case "${target}" in
noconfigdirs="$noconfigdirs ${libgcj}"
;;
m68hc11-*-*|m6811-*-*|m68hc12-*-*|m6812-*-*)
noconfigdirs="$noconfigdirs target-libiberty target-libstdc++-v3 ${libgcj}"
noconfigdirs="$noconfigdirs target-libiberty"
libgloss_dir=m68hc11
;;
m68k-*-elf*)
@ -3455,9 +3454,6 @@ case "${target}" in
libgloss_dir=m68k
;;
mcore-*-pe*)
# The EPOC C++ environment does not support exceptions or rtti,
# and so building libstdc++-v3 tends not to always work.
noconfigdirs="$noconfigdirs target-libstdc++-v3"
;;
mmix-*-*)
noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb libgloss"

10
configure.ac
View file

@ -670,7 +670,7 @@ case "${target}" in
libgloss_dir=wince
;;
arc-*-*)
noconfigdirs="$noconfigdirs target-libgloss ${libgcj}"
noconfigdirs="$noconfigdirs target-libgloss"
;;
arm-semi-aof )
;;
@ -744,7 +744,6 @@ case "${target}" in
libgloss_dir=cris
;;
crx-*-*)
noconfigdirs="$noconfigdirs target-libstdc++-v3 target-mudflap ${libgcj}"
;;
d10v-*-*)
noconfigdirs="$noconfigdirs target-libstdc++-v3 target-libgloss ${libgcj}"
@ -862,7 +861,7 @@ case "${target}" in
i[[3456789]]86-*-uwin* | i[[3456789]]86-*-interix* )
;;
i[[3456789]]86-*-pe)
noconfigdirs="$noconfigdirs target-libstdc++-v3 target-libgloss ${libgcj}"
noconfigdirs="$noconfigdirs target-libgloss"
;;
i[[3456789]]86-*-sco3.2v5*)
# The linker does not yet know about weak symbols in COFF,
@ -888,7 +887,7 @@ case "${target}" in
noconfigdirs="$noconfigdirs ${libgcj}"
;;
m68hc11-*-*|m6811-*-*|m68hc12-*-*|m6812-*-*)
noconfigdirs="$noconfigdirs target-libiberty target-libstdc++-v3 ${libgcj}"
noconfigdirs="$noconfigdirs target-libiberty"
libgloss_dir=m68hc11
;;
m68k-*-elf*)
@ -901,9 +900,6 @@ case "${target}" in
libgloss_dir=m68k
;;
mcore-*-pe*)
# The EPOC C++ environment does not support exceptions or rtti,
# and so building libstdc++-v3 tends not to always work.
noconfigdirs="$noconfigdirs target-libstdc++-v3"
;;
mmix-*-*)
noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb libgloss"

4
contrib/ChangeLog
View file

@ -1,3 +1,7 @@
2011-03-22 Joseph Myers <joseph@codesourcery.com>
* compare-all-tests (all_targets): Remove crx and m68hc11.
2011-03-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
PR bootstrap/48135

4
contrib/compare-all-tests
View file

@ -1,7 +1,7 @@
#! /bin/bash
# Compare the assembly language output for all the gcc tests.
# Copyright (C) 2009 Free Software Foundation, Inc.
# Copyright (C) 2009, 2011 Free Software Foundation, Inc.
# Contributed by Paolo Bonzini.
#
# Invoke it as "bash compare-all-tests target1 target2 ... targetN".
@ -36,7 +36,7 @@ sh64_opts='-m5-32media -m5-32media-nofpu -m5-64media -m5-64media-nofpu -m5-compa
sh_opts='-m3 -m3e -m4 -m4a -m4al -m4/-mieee -m1 -m1/-mno-cbranchdi -m2a -m2a/-mieee -m2e -m2e/-mieee'
sparc_opts='-mcpu=v8/-m32 -mcpu=v9/-m32 -m64'
all_targets='alpha arm avr bfin cris crx fr30 frv h8300 ia64 iq2000 m32c m32r m68hc11 m68k mcore mips mmix mn10300 pa pdp11 picochip ppc score sh sh64 sparc spu v850 vax xstormy16 xtensa' # e500
all_targets='alpha arm avr bfin cris fr30 frv h8300 ia64 iq2000 m32c m32r m68k mcore mips mmix mn10300 pa pdp11 picochip ppc score sh sh64 sparc spu v850 vax xstormy16 xtensa' # e500
test_one_file ()
{

4
fixincludes/ChangeLog
View file

@ -1,3 +1,7 @@
2011-03-22 Joseph Myers <joseph@codesourcery.com>
* mkfixinc.sh: Don't handle i?86-moss-msdos* or i?86-*-pe.
2010-11-20 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
PR other/46202

2
fixincludes/mkfixinc.sh
View file

@ -12,8 +12,6 @@ target=fixinc.sh
# Check for special fix rules for particular targets
case $machine in
alpha*-dec-*vms* | \
i?86-moss-msdos* | \
i?86-*-pe | \
i?86-*-cygwin* | \
i?86-*-mingw32* | \
x86_64-*-mingw32* | \

58
gcc/ChangeLog
View file

@ -1,3 +1,61 @@
2011-03-22 Joseph Myers <joseph@codesourcery.com>
* config/alpha/gnu.h: Remove.
* config/arc: Remove directory.
* config/arm/netbsd.h: Remove.
* config/arm/t-pe: Remove.
* config/crx: Remove directory.
* config/i386/netbsd.h: Remove.
* config/m68hc11: Remove directory.
* config/m68k/uclinux-oldabi.h: Remove.
* config/mcore/mcore-pe.h: Remove.
* config/mcore/t-mcore-pe: Remove.
* config/netbsd-aout.h: Remove.
* config/rs6000/gnu.h: Remove.
* config/sh/sh-symbian.h: Remove.
* config/sh/symbian-base.c: Remove.
* config/sh/symbian-c.c: Remove.
* config/sh/symbian-cxx.c: Remove.
* config/sh/symbian-post.h: Remove.
* config/sh/symbian-pre.h: Remove.
* config/sh/t-symbian: Remove.
* config/svr3.h: Remove.
* config/vax/netbsd.h: Remove.
* config.build: Don't handle i[34567]86-*-pe.
* config.gcc: Remove handling of deprecations for most deprecated
targets.
(m68k-*-uclinuxoldabi*): Add to second deprecated list.
(alpha*-*-gnu*, arc-*-elf*, arm*-*-netbsd*, arm-*-pe*, crx-*-elf,
i[34567]86-*-netbsd*, i[34567]86-*-pe, m68hc11-*-*|m6811-*-*,
m68hc12-*-*|m6812-*-*, m68k-*-uclinuxoldabi*, mcore-*-pe*,
powerpc64-*-gnu*, powerpc-*-gnu-gnualtivec*, powerpc-*-gnu*,
sh-*-symbianelf* | sh[12346l]*-*-symbianelf*, vax-*-netbsd*):
Remove cases.
* config.host: Don't handle i[34567]86-*-pe.
* config/rs6000/linux64.h (LINK_OS_GNU_SPEC): Remove.
(ASM_SPEC32): Don't handle -mcall-gnu.
* config/rs6000/sysv4.h (SUBTARGET_OVERRIDE_OPTIONS): Don't handle
-mcall-gnu.
(ASM_SPEC, CC1_SPEC, LINK_START_SPEC, LINK_OS_SPEC, CPP_SPEC,
STARTFILE_SPEC, LIB_SPEC, ENDFILE_SPEC): Don't handle -mcall-gnu.
(LIB_GNU_SPEC, STARTFILE_GNU_SPEC, ENDFILE_GNU_SPEC,
LINK_START_GNU_SPEC, LINK_OS_GNU_SPEC, CPP_OS_GNU_SPEC): Remove.
(SUBTARGET_EXTRA_SPECS): Remove *_gnu specs.
* config/sh/sh-protos.h, config/sh/sh.c: Remove all code
conditional on SYMBIAN.
* configure.ac: Don't handle powerpc*-*-gnu*.
* configure: Regenerate.
* doc/extend.texi (interrupt attribute): Don't mention CRX.
* doc/install-old.texi (m6811, m6812): Don't mention.
* doc/install.texi (arc-*-elf*): Don't document multilib option.
(arc-*-elf, CRX, m6811-elf, m6812-elf): Remove.
(m68k-uclinuxoldabi): Don't mention.
* doc/invoke.texi (ARC Options, CRX Options, M68hc1x Options):
Remove.
(-mcall-gnu): Remove.
* doc/md.texi (CRX Architecture, Motorola 68HC11 & 68HC12
families): Remove constraint documentation.
2011-03-22 Marius Strobl <marius@FreeBSD.org>
* config/sparc/freebsd.h (CPP_CPU64_DEFAULT_SPEC): Replace with...

5
gcc/config.build
View file

@ -1,5 +1,6 @@
# GCC build-specific configuration file.
# Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2007, 2008, 2009, 2010
# Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2007, 2008, 2009, 2010,
# 2011
# Free Software Foundation, Inc.
#This file is part of GCC.
@ -75,7 +76,7 @@ case $build in
# IBM 360/370/390 Architecture
build_xm_defines='FATAL_EXIT_CODE=12'
;;
i[34567]86-*-cygwin* | i[34567]86-*-pe )
i[34567]86-*-cygwin* )
build_xm_file=i386/xm-cygwin.h
build_exeext=.exe
;;

133
gcc/config.gcc
View file

@ -226,32 +226,9 @@ md_file=
# Obsolete configurations.
case ${target} in
# Avoid cases below matching.
alpha*-*-linux* \
| arm*-wince-pe* \
| arm*-*-netbsdelf* \
| i[34567]86-*-netbsdelf* \
| powerpc*-*-linux* \
| vax-*-netbsdelf*) ;;
arc-* \
| alpha*-*-gnu* \
| arm*-*-netbsd* \
| arm-*-pe* \
| crx-* \
| i[34567]86-*-interix3* \
| i[34567]86-*-netbsd* \
| i[34567]86-*-pe \
| m68hc11-*-* \
| m6811-*-* \
| m68hc12-*-* \
| m6812-*-* \
| m68k-*-uclinuxoldabi* \
| mcore-*-pe* \
| powerpc*-*-gnu* \
i[34567]86-*-interix3* \
| score-* \
| sh*-*-symbianelf* \
| *-*-solaris2.8* \
| vax-*-netbsd* \
)
if test "x$enable_obsolete" != xyes; then
echo "*** Configuration ${target} is obsolete." >&2
@ -268,6 +245,7 @@ esac
case ${target} in
i[34567]86-go32-* \
| i[34567]86-*-go32* \
| m68k-*-uclinuxoldabi* \
| mips64orion*-*-rtems* \
| pdp11-*-bsd \
| sparc-hal-solaris2* \
@ -720,12 +698,6 @@ alpha*-*-linux*)
target_cpu_default="MASK_GAS"
tmake_file="${tmake_file} alpha/t-crtfm alpha/t-alpha alpha/t-ieee alpha/t-linux"
;;
alpha*-*-gnu*)
tm_file="$tm_file alpha/elf.h alpha/linux.h alpha/linux-elf.h gnu.h glibc-stdint.h alpha/gnu.h"
extra_options="${extra_options} alpha/elf.opt"
target_cpu_default="MASK_GAS"
tmake_file="${tmake_file} alpha/t-crtfm alpha/t-alpha alpha/t-ieee"
;;
alpha*-*-freebsd*)
tm_file="${tm_file} ${fbsd_tm_file} alpha/elf.h alpha/freebsd.h"
extra_options="${extra_options} alpha/elf.opt"
@ -789,10 +761,6 @@ alpha*-dec-*vms*)
install_headers_dir=install-headers-cp
extra_options="${extra_options} vms/vms.opt"
;;
arc-*-elf*)
tm_file="dbxelf.h elfos.h newlib-stdint.h ${tm_file}"
extra_parts="crtinit.o crtfini.o"
;;
arm-wrs-vxworks)
tm_file="elfos.h arm/elf.h arm/aout.h ${tm_file} vx-common.h vxworks.h arm/vxworks.h"
extra_options="${extra_options} arm/vxworks.opt"
@ -807,13 +775,6 @@ arm*-*-netbsdelf*)
extra_options="${extra_options} netbsd.opt netbsd-elf.opt"
tmake_file="${tmake_file} arm/t-arm arm/t-netbsd"
;;
arm*-*-netbsd*)
tm_file="arm/aout.h arm/arm.h netbsd.h netbsd-aout.h arm/netbsd.h"
extra_options="${extra_options} netbsd.opt"
tmake_file="t-netbsd arm/t-arm arm/t-netbsd"
extra_parts=""
use_collect2=yes
;;
arm*-*-linux*) # ARM GNU/Linux with ELF
tm_file="dbxelf.h elfos.h gnu-user.h linux.h linux-android.h glibc-stdint.h arm/elf.h arm/linux-gas.h arm/linux-elf.h"
case $target in
@ -911,13 +872,6 @@ arm*-wince-pe*)
extra_options="${extra_options} arm/pe.opt"
extra_objs="pe.o"
;;
arm-*-pe*)
tm_file="arm/semi.h arm/aout.h arm/arm.h arm/coff.h dbxcoff.h arm/pe.h newlib-stdint.h"
tmake_file="arm/t-arm arm/t-pe"
use_gcc_stdint=wrap
extra_options="${extra_options} arm/pe.opt"
extra_objs="pe.o"
;;
avr-*-rtems*)
tm_file="avr/avr.h dbxelf.h avr/rtems.h rtems.h newlib-stdint.h"
tmake_file="avr/t-avr t-rtems avr/t-rtems"
@ -985,11 +939,6 @@ crisv32-*-linux* | cris-*-linux*)
;;
esac
;;
crx-*-elf)
tm_file="elfos.h newlib-stdint.h ${tm_file}"
extra_parts="crtbegin.o crtend.o"
use_collect2=no
;;
fr30-*-elf)
tm_file="dbxelf.h elfos.h newlib-stdint.h ${tm_file}"
tmake_file=fr30/t-fr30
@ -1222,13 +1171,6 @@ i[34567]86-*-netbsdelf*)
tm_file="${tm_file} i386/unix.h i386/att.h dbxelf.h elfos.h netbsd.h netbsd-elf.h i386/netbsd-elf.h"
extra_options="${extra_options} netbsd.opt netbsd-elf.opt"
;;
i[34567]86-*-netbsd*)
tm_file="${tm_file} i386/unix.h i386/bsd.h i386/gas.h i386/gstabs.h netbsd.h netbsd-aout.h i386/netbsd.h"
extra_options="${extra_options} netbsd.opt"
tmake_file="${tmake_file} t-netbsd"
extra_parts=""
use_collect2=yes
;;
x86_64-*-netbsd*)
tm_file="${tm_file} i386/unix.h i386/att.h dbxelf.h elfos.h netbsd.h netbsd-elf.h i386/x86-64.h i386/netbsd64.h"
extra_options="${extra_options} netbsd.opt netbsd-elf.opt"
@ -1441,7 +1383,7 @@ i[4567]86-wrs-vxworks|i[4567]86-wrs-vxworksae)
;;
esac
;;
i[34567]86-*-pe | i[34567]86-*-cygwin*)
i[34567]86-*-cygwin*)
tm_file="${tm_file} i386/unix.h i386/bsd.h i386/gas.h dbxcoff.h i386/cygming.h i386/cygwin.h i386/cygwin-stdint.h"
xm_file=i386/xm-cygwin.h
# This has to match the logic for DWARF2_UNWIND_INFO in gcc/config/i386/cygming.h
@ -1686,24 +1628,6 @@ m32rle-*-linux*)
thread_file='posix'
fi
;;
# m68hc11 and m68hc12 share the same machine description.
m68hc11-*-*|m6811-*-*)
tm_file="dbxelf.h elfos.h usegas.h newlib-stdint.h m68hc11/m68hc11.h"
tm_p_file="m68hc11/m68hc11-protos.h"
md_file="m68hc11/m68hc11.md"
out_file="m68hc11/m68hc11.c"
tmake_file="m68hc11/t-m68hc11"
use_gcc_stdint=wrap
;;
m68hc12-*-*|m6812-*-*)
tm_file="m68hc11/m68hc12.h dbxelf.h elfos.h usegas.h newlib-stdint.h m68hc11/m68hc11.h"
tm_p_file="m68hc11/m68hc11-protos.h"
md_file="m68hc11/m68hc11.md"
out_file="m68hc11/m68hc11.c"
tmake_file="m68hc11/t-m68hc11"
extra_options="${extra_options} m68hc11/m68hc11.opt"
use_gcc_stdint=wrap
;;
m68k-*-elf* | fido-*-elf*)
case ${target} in
fido-*-elf*)
@ -1754,15 +1678,6 @@ m68k*-*-openbsd*)
# we need collect2 until our bug is fixed...
use_collect2=yes
;;
m68k-*-uclinuxoldabi*) # Motorola m68k/ColdFire running uClinux
# with uClibc, using the original
# m68k-elf-based ABI
default_m68k_cpu=68020
default_cf_cpu=5206
tm_file="${tm_file} m68k/m68k-none.h m68k/m68kelf.h dbxelf.h elfos.h m68k/uclinux-oldabi.h glibc-stdint.h"
tm_defines="${tm_defines} MOTOROLA=1"
tmake_file="m68k/t-floatlib m68k/t-uclinux"
;;
m68k-*-uclinux*) # Motorola m68k/ColdFire running uClinux
# with uClibc, using the new GNU/Linux-style
# ABI.
@ -1802,12 +1717,6 @@ mcore-*-elf)
tmake_file=mcore/t-mcore
inhibit_libc=true
;;
mcore-*-pe*)
tm_file="svr3.h dbxcoff.h newlib-stdint.h ${tm_file} mcore/mcore-pe.h"
tmake_file=mcore/t-mcore-pe
inhibit_libc=true
use_gcc_stdint=wrap
;;
mep-*-*)
tm_file="dbxelf.h elfos.h ${tm_file}"
tmake_file=mep/t-mep
@ -2171,27 +2080,6 @@ powerpc-*-linux* | powerpc64-*-linux*)
tm_file="rs6000/secureplt.h ${tm_file}"
fi
;;
powerpc64-*-gnu*)
tm_file="${tm_file} elfos.h freebsd-spec.h gnu.h rs6000/sysv4.h rs6000/default64.h rs6000/linux64.h rs6000/gnu.h glibc-stdint.h"
extra_options="${extra_options} rs6000/sysv4.opt rs6000/linux64.opt"
tmake_file="t-slibgcc-elf-ver t-slibgcc-libgcc t-gnu"
;;
powerpc-*-gnu-gnualtivec*)
tm_file="${cpu_type}/${cpu_type}.h elfos.h freebsd-spec.h gnu.h rs6000/sysv4.h rs6000/linux.h rs6000/linuxaltivec.h rs6000/gnu.h glibc-stdint.h"
extra_options="${extra_options} rs6000/sysv4.opt"
tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcos t-slibgcc-elf-ver t-slibgcc-libgcc t-gnu rs6000/t-ppccomm"
if test x$enable_threads = xyes; then
thread_file='posix'
fi
;;
powerpc-*-gnu*)
tm_file="${cpu_type}/${cpu_type}.h elfos.h freebsd-spec.h gnu.h rs6000/sysv4.h rs6000/linux.h rs6000/gnu.h glibc-stdint.h"
tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcos t-slibgcc-elf-ver t-slibgcc-libgcc t-gnu rs6000/t-ppccomm"
extra_options="${extra_options} rs6000/sysv4.opt"
if test x$enable_threads = xyes; then
thread_file='posix'
fi
;;
powerpc-wrs-vxworks|powerpc-wrs-vxworksae)
tm_file="${tm_file} elfos.h freebsd-spec.h rs6000/sysv4.h"
tmake_file="${tmake_file} rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppccomm rs6000/t-vxworks"
@ -2313,7 +2201,6 @@ score-*-elf)
extra_objs="score7.o"
;;
sh-*-elf* | sh[12346l]*-*-elf* | \
sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \
sh-*-linux* | sh[2346lbe]*-*-linux* | \
sh-*-netbsdelf* | shl*-*-netbsdelf* | sh5-*-netbsd* | sh5l*-*-netbsd* | \
sh64-*-netbsd* | sh64l*-*-netbsd*)
@ -2390,13 +2277,6 @@ sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \
fi
extra_headers="shmedia.h ushmedia.h sshmedia.h"
;;
*-*-symbianelf*)
tmake_file="sh/t-symbian"
tm_file="sh/symbian-pre.h sh/little.h ${tm_file} sh/symbian-post.h"
c_target_objs="symbian-base.o symbian-c.o"
cxx_target_objs="symbian-base.o symbian-cxx.o"
extra_parts="crt1.o crti.o crtn.o crtbegin.o crtend.o crtbeginS.o crtendS.o"
;;
*-*-elf*)
tm_file="${tm_file} newlib-stdint.h"
;;
@ -2714,13 +2594,6 @@ vax-*-netbsdelf*)
tm_file="${tm_file} elfos.h netbsd.h netbsd-elf.h vax/elf.h vax/netbsd-elf.h"
extra_options="${extra_options} netbsd.opt netbsd-elf.opt vax/elf.opt"
;;
vax-*-netbsd*)
tm_file="${tm_file} netbsd.h netbsd-aout.h vax/netbsd.h"
extra_options="${extra_options} netbsd.opt"
tmake_file=t-netbsd
extra_parts=""
use_collect2=yes
;;
vax-*-openbsd*)
tm_file="vax/vax.h vax/openbsd1.h openbsd.h openbsd-stdint.h openbsd-pthread.h vax/openbsd.h"
extra_options="${extra_options} openbsd.opt"

2
gcc/config.host
View file

@ -211,7 +211,7 @@ case ${host} in
;;
esac
;;
i[34567]86-*-pe | i[34567]86-*-cygwin*)
i[34567]86-*-cygwin*)
host_xm_file=i386/xm-cygwin.h
out_host_hook_obj=host-cygwin.o
host_xmake_file="${host_xmake_file} i386/x-cygwin"

49
gcc/config/alpha/gnu.h
View file

@ -1,49 +0,0 @@
/* Configuration for an Alpha running GNU with ELF as the target machine.
Copyright (C) 2002, 2003, 2004, 2010 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
#undef TARGET_VERSION
#define TARGET_VERSION fprintf (stderr, " (Alpha GNU)");
#undef TARGET_OS_CPP_BUILTINS /* config.gcc includes alpha/linux.h. */
#define TARGET_OS_CPP_BUILTINS() \
do { \
LINUX_TARGET_OS_CPP_BUILTINS(); \
builtin_define ("_LONGLONG"); \
} while (0)
#undef ELF_DYNAMIC_LINKER
#define ELF_DYNAMIC_LINKER "/lib/ld.so"
#undef STARTFILE_SPEC
#define STARTFILE_SPEC \
"%{!shared: \
%{!static: \
%{pg:gcrt1.o%s} %{!pg:%{p:gcrt1.o%s} %{!p:crt1.o%s}}} \
%{static:crt0.o%s}} \
crti.o%s \
%{!static:%{!shared:crtbegin.o%s} %{shared:crtbeginS.o%s}}"
/* FIXME: Is a Hurd-specific fallback mechanism necessary? */
#undef MD_UNWIND_SUPPORT

24
gcc/config/arc/arc-modes.def
View file

@ -1,24 +0,0 @@
/* Definitions of target machine for GNU compiler, Argonaut ARC cpu.
Copyright (C) 2002, 2007 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* Some insns set all condition code flags, some only set the ZNC flags, and
some only set the ZN flags. */
CC_MODE (CCZNC);
CC_MODE (CCZN);

63
gcc/config/arc/arc-protos.h
View file

@ -1,63 +0,0 @@
/* Definitions of target machine for GNU compiler, Argonaut ARC cpu.
Copyright (C) 2000, 2004, 2007, 2010 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#ifdef RTX_CODE
extern enum machine_mode arc_select_cc_mode (enum rtx_code, rtx, rtx);
/* Define the function that build the compare insn for scc and bcc. */
extern struct rtx_def *gen_compare_reg (enum rtx_code, rtx, rtx);
#endif
/* Declarations for various fns used in the .md file. */
extern const char *output_shift (rtx *);
extern int symbolic_operand (rtx, enum machine_mode);
extern int arc_double_limm_p (rtx);
extern int arc_eligible_for_epilogue_delay (rtx, int);
extern void arc_initialize_trampoline (rtx, rtx, rtx);
extern void arc_print_operand (FILE *, rtx, int);
extern void arc_print_operand_address (FILE *, rtx);
extern void arc_final_prescan_insn (rtx, rtx *, int);
extern int call_address_operand (rtx, enum machine_mode);
extern int call_operand (rtx, enum machine_mode);
extern int symbolic_memory_operand (rtx, enum machine_mode);
extern int short_immediate_operand (rtx, enum machine_mode);
extern int long_immediate_operand (rtx, enum machine_mode);
extern int long_immediate_loadstore_operand (rtx, enum machine_mode);
extern int move_src_operand (rtx, enum machine_mode);
extern int move_double_src_operand (rtx, enum machine_mode);
extern int move_dest_operand (rtx, enum machine_mode);
extern int load_update_operand (rtx, enum machine_mode);
extern int store_update_operand (rtx, enum machine_mode);
extern int nonvol_nonimm_operand (rtx, enum machine_mode);
extern int const_sint32_operand (rtx, enum machine_mode);
extern int const_uint32_operand (rtx, enum machine_mode);
extern int proper_comparison_operator (rtx, enum machine_mode);
extern int shift_operator (rtx, enum machine_mode);
extern enum arc_function_type arc_compute_function_type (tree);
extern unsigned int arc_compute_frame_size (int);
extern void arc_save_restore (FILE *, const char *, unsigned int,
unsigned int, const char *);
extern int arc_delay_slots_for_epilogue (void);
extern void arc_ccfsm_at_label (const char *, int);
extern int arc_ccfsm_branch_deleted_p (void);
extern void arc_ccfsm_record_branch_deleted (void);

2493
gcc/config/arc/arc.c
View file

File diff suppressed because it is too large Load diff

935
gcc/config/arc/arc.h
View file

@ -1,935 +0,0 @@
/* Definitions of target machine for GNU compiler, Argonaut ARC cpu.
Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2004, 2005,
2007, 2008, 2009, 2010 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* ??? This is an old port, and is undoubtedly suffering from bit rot. */
/* Things to do:
- incscc, decscc?
- print active compiler options in assembler output
*/
#undef ASM_SPEC
#undef LINK_SPEC
#undef LIB_SPEC
#undef STARTFILE_SPEC
#undef ENDFILE_SPEC
#undef SIZE_TYPE
#undef PTRDIFF_TYPE
#undef WCHAR_TYPE
#undef WCHAR_TYPE_SIZE
#undef ASM_OUTPUT_LABELREF
/* Print subsidiary information on the compiler version in use. */
#define TARGET_VERSION fprintf (stderr, " (arc)")
/* Names to predefine in the preprocessor for this target machine. */
#define TARGET_CPU_CPP_BUILTINS() \
do \
{ \
builtin_define ("__arc__"); \
if (TARGET_BIG_ENDIAN) \
builtin_define ("__big_endian__"); \
if (arc_cpu_type == 0) \
builtin_define ("__base__"); \
builtin_assert ("cpu=arc"); \
builtin_assert ("machine=arc"); \
} while (0)
/* Pass -mmangle-cpu if we get -mcpu=*.
Doing it this way lets one have it on as default with -mcpu=*,
but also lets one turn it off with -mno-mangle-cpu. */
#define CC1_SPEC "\
%{mcpu=*:-mmangle-cpu} \
%{EB:%{EL:%emay not use both -EB and -EL}} \
%{EB:-mbig-endian} %{EL:-mlittle-endian} \
"
#define ASM_SPEC "%{EB} %{EL}"
#define LINK_SPEC "%{v} %{EB} %{EL}"
#define LIB_SPEC "-lc"
#define STARTFILE_SPEC "%{!shared:crt0.o%s} crtinit.o%s"
#define ENDFILE_SPEC "crtfini.o%s"
/* Instruction set characteristics.
These are internal macros, set by the appropriate -mcpu= option. */
/* Nonzero means the cpu has a barrel shifter. */
#define TARGET_SHIFTER 0
/* Which cpu we're compiling for. */
extern int arc_cpu_type;
/* Check if CPU is an extension and set `arc_cpu_type' and `arc_mangle_cpu'
appropriately. The result should be nonzero if the cpu is recognized,
otherwise zero. This is intended to be redefined in a cover file.
This is used by arc_handle_option. */
#define ARC_EXTENSION_CPU(cpu) 0
/* Target machine storage layout. */
/* Define this if most significant bit is lowest numbered
in instructions that operate on numbered bit-fields. */
#define BITS_BIG_ENDIAN 1
/* Define this if most significant byte of a word is the lowest numbered. */
#define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN)
/* Define this if most significant word of a multiword number is the lowest
numbered. */
#define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN)
/* Width of a word, in units (bytes). */
#define UNITS_PER_WORD 4
/* Define this macro if it is advisable to hold scalars in registers
in a wider mode than that declared by the program. In such cases,
the value is constrained to be within the bounds of the declared
type, but kept valid in the wider mode. The signedness of the
extension may differ from that of the type. */
#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
if (GET_MODE_CLASS (MODE) == MODE_INT \
&& GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
{ \
(MODE) = SImode; \
}
/* Allocation boundary (in *bits*) for storing arguments in argument list. */
#define PARM_BOUNDARY 32
/* Boundary (in *bits*) on which stack pointer should be aligned. */
#define STACK_BOUNDARY 64
/* ALIGN FRAMES on word boundaries */
#define ARC_STACK_ALIGN(LOC) (((LOC)+7) & ~7)
/* Allocation boundary (in *bits*) for the code of a function. */
#define FUNCTION_BOUNDARY 32
/* Alignment of field after `int : 0' in a structure. */
#define EMPTY_FIELD_BOUNDARY 32
/* Every structure's size must be a multiple of this. */
#define STRUCTURE_SIZE_BOUNDARY 8
/* A bit-field declared as `int' forces `int' alignment for the struct. */
#define PCC_BITFIELD_TYPE_MATTERS 1
/* No data type wants to be aligned rounder than this. */
/* This is bigger than currently necessary for the ARC. If 8 byte floats are
ever added it's not clear whether they'll need such alignment or not. For
now we assume they will. We can always relax it if necessary but the
reverse isn't true. */
#define BIGGEST_ALIGNMENT 64
/* The best alignment to use in cases where we have a choice. */
#define FASTEST_ALIGNMENT 32
/* Make strings word-aligned so strcpy from constants will be faster. */
#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
((TREE_CODE (EXP) == STRING_CST \
&& (ALIGN) < FASTEST_ALIGNMENT) \
? FASTEST_ALIGNMENT : (ALIGN))
/* Make arrays of chars word-aligned for the same reasons. */
#define DATA_ALIGNMENT(TYPE, ALIGN) \
(TREE_CODE (TYPE) == ARRAY_TYPE \
&& TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
&& (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
/* Set this nonzero if move instructions will actually fail to work
when given unaligned data. */
/* On the ARC the lower address bits are masked to 0 as necessary. The chip
won't croak when given an unaligned address, but the insn will still fail
to produce the correct result. */
#define STRICT_ALIGNMENT 1
/* Layout of source language data types. */
#define SHORT_TYPE_SIZE 16
#define INT_TYPE_SIZE 32
#define LONG_TYPE_SIZE 32
#define LONG_LONG_TYPE_SIZE 64
#define FLOAT_TYPE_SIZE 32
#define DOUBLE_TYPE_SIZE 64
#define LONG_DOUBLE_TYPE_SIZE 64
/* Define this as 1 if `char' should by default be signed; else as 0. */
#define DEFAULT_SIGNED_CHAR 1
#define SIZE_TYPE "long unsigned int"
#define PTRDIFF_TYPE "long int"
#define WCHAR_TYPE "short unsigned int"
#define WCHAR_TYPE_SIZE 16
/* Standard register usage. */
/* Number of actual hardware registers.
The hardware registers are assigned numbers for the compiler
from 0 to just below FIRST_PSEUDO_REGISTER.
All registers that the compiler knows about must be given numbers,
even those that are not normally considered general registers. */
/* Registers 61, 62, and 63 are not really registers and we needn't treat
them as such. We still need a register for the condition code. */
#define FIRST_PSEUDO_REGISTER 62
/* 1 for registers that have pervasive standard uses
and are not available for the register allocator.
0-28 - general purpose registers
29 - ilink1 (interrupt link register)
30 - ilink2 (interrupt link register)
31 - blink (branch link register)
32-59 - reserved for extensions
60 - LP_COUNT
61 - condition code
For doc purposes:
61 - short immediate data indicator (setting flags)
62 - long immediate data indicator
63 - short immediate data indicator (not setting flags).
The general purpose registers are further broken down into:
0-7 - arguments/results
8-15 - call used
16-23 - call saved
24 - call used, static chain pointer
25 - call used, gptmp
26 - global pointer
27 - frame pointer
28 - stack pointer
By default, the extension registers are not available. */
#define FIXED_REGISTERS \
{ 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 1, 1, 1, 1, 0, \
\
1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1 }
/* 1 for registers not available across function calls.
These must include the FIXED_REGISTERS and also any
registers that can be used without being saved.
The latter must include the registers where values are returned
and the register where structure-value addresses are passed.
Aside from that, you can include as many other registers as you like. */
#define CALL_USED_REGISTERS \
{ 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, \
0, 0, 0, 0, 0, 0, 0, 0, \
1, 1, 1, 1, 1, 1, 1, 1, \
\
1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1 }
/* If defined, an initializer for a vector of integers, containing the
numbers of hard registers in the order in which GCC should
prefer to use them (from most preferred to least). */
#define REG_ALLOC_ORDER \
{ 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, \
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 31, \
32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \
48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, \
27, 28, 29, 30 }
/* Return number of consecutive hard regs needed starting at reg REGNO
to hold something of mode MODE.
This is ordinarily the length in words of a value of mode MODE
but can be less for certain modes in special long registers. */
#define HARD_REGNO_NREGS(REGNO, MODE) \
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
extern const unsigned int arc_hard_regno_mode_ok[];
extern unsigned int arc_mode_class[];
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
((arc_hard_regno_mode_ok[REGNO] & arc_mode_class[MODE]) != 0)
/* A C expression that is nonzero if it is desirable to choose
register allocation so as to avoid move instructions between a
value of mode MODE1 and a value of mode MODE2.
If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R,
MODE2)' are ever different for any R, then `MODES_TIEABLE_P (MODE1,
MODE2)' must be zero. */
/* Tie QI/HI/SI modes together. */
#define MODES_TIEABLE_P(MODE1, MODE2) \
(GET_MODE_CLASS (MODE1) == MODE_INT \
&& GET_MODE_CLASS (MODE2) == MODE_INT \
&& GET_MODE_SIZE (MODE1) <= UNITS_PER_WORD \
&& GET_MODE_SIZE (MODE2) <= UNITS_PER_WORD)
/* Register classes and constants. */
/* Define the classes of registers for register constraints in the
machine description. Also define ranges of constants.
One of the classes must always be named ALL_REGS and include all hard regs.
If there is more than one class, another class must be named NO_REGS
and contain no registers.
The name GENERAL_REGS must be the name of a class (or an alias for
another name such as ALL_REGS). This is the class of registers
that is allowed by "g" or "r" in a register constraint.
Also, registers outside this class are allocated only when
instructions express preferences for them.
The classes must be numbered in nondecreasing order; that is,
a larger-numbered class must never be contained completely
in a smaller-numbered class.
For any two classes, it is very desirable that there be another
class that represents their union.
It is important that any condition codes have class NO_REGS.
See `register_operand'. */
enum reg_class {
NO_REGS, LPCOUNT_REG, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES
};
#define N_REG_CLASSES (int) LIM_REG_CLASSES
/* Give names of register classes as strings for dump file. */
#define REG_CLASS_NAMES \
{ "NO_REGS", "LPCOUNT_REG", "GENERAL_REGS", "ALL_REGS" }
/* Define which registers fit in which classes.
This is an initializer for a vector of HARD_REG_SET
of length N_REG_CLASSES. */
#define REG_CLASS_CONTENTS \
{ {0, 0}, {0, 0x10000000}, {0xffffffff, 0xfffffff}, \
{0xffffffff, 0x1fffffff} }
/* The same information, inverted:
Return the class number of the smallest class containing
reg number REGNO. This could be a conditional expression
or could index an array. */
extern enum reg_class arc_regno_reg_class[FIRST_PSEUDO_REGISTER];
#define REGNO_REG_CLASS(REGNO) \
(arc_regno_reg_class[REGNO])
/* The class value for index registers, and the one for base regs. */
#define INDEX_REG_CLASS GENERAL_REGS
#define BASE_REG_CLASS GENERAL_REGS
/* Get reg_class from a letter such as appears in the machine description. */
#define REG_CLASS_FROM_LETTER(C) \
((C) == 'l' ? LPCOUNT_REG /* ??? needed? */ \
: NO_REGS)
/* These assume that REGNO is a hard or pseudo reg number.
They give nonzero only if REGNO is a hard reg of the suitable class
or a pseudo reg currently allocated to a suitable hard reg.
Since they use reg_renumber, they are safe only once reg_renumber
has been allocated, which happens in local-alloc.c. */
#define REGNO_OK_FOR_BASE_P(REGNO) \
((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
#define REGNO_OK_FOR_INDEX_P(REGNO) \
((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
/* Return the maximum number of consecutive registers
needed to represent mode MODE in a register of class CLASS. */
#define CLASS_MAX_NREGS(CLASS, MODE) \
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
/* The letters I, J, K, L, M, N, O, P in a register constraint string
can be used to stand for particular ranges of immediate operands.
This macro defines what the ranges are.
C is the letter, and VALUE is a constant value.
Return 1 if VALUE is in the range specified by C. */
/* 'I' is used for short immediates (always signed).
'J' is used for long immediates.
'K' is used for any constant up to 64 bits (for 64x32 situations?). */
/* local to this file */
#define SMALL_INT(X) ((unsigned) ((X) + 0x100) < 0x200)
/* local to this file */
#define LARGE_INT(X) \
((X) >= (-(HOST_WIDE_INT) 0x7fffffff - 1) \
&& (unsigned HOST_WIDE_INT)(X) <= (unsigned HOST_WIDE_INT) 0xffffffff)
#define CONST_OK_FOR_LETTER_P(VALUE, C) \
((C) == 'I' ? SMALL_INT (VALUE) \
: (C) == 'J' ? LARGE_INT (VALUE) \
: (C) == 'K' ? 1 \
: 0)
/* Similar, but for floating constants, and defining letters G and H.
Here VALUE is the CONST_DOUBLE rtx itself. */
/* 'G' is used for integer values for the multiplication insns where the
operands are extended from 4 bytes to 8 bytes.
'H' is used when any 64-bit constant is allowed. */
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
((C) == 'G' ? arc_double_limm_p (VALUE) \
: (C) == 'H' ? 1 \
: 0)
/* A C expression that defines the optional machine-dependent constraint
letters that can be used to segregate specific types of operands,
usually memory references, for the target machine. It should return 1 if
VALUE corresponds to the operand type represented by the constraint letter
C. If C is not defined as an extra constraint, the value returned should
be 0 regardless of VALUE. */
/* ??? This currently isn't used. Waiting for PIC. */
#if 0
#define EXTRA_CONSTRAINT(VALUE, C) \
((C) == 'R' ? (SYMBOL_REF_FUNCTION_P (VALUE) || GET_CODE (VALUE) == LABEL_REF) \
: 0)
#endif
/* Stack layout and stack pointer usage. */
/* Define this macro if pushing a word onto the stack moves the stack
pointer to a smaller address. */
#define STACK_GROWS_DOWNWARD
/* Define this to nonzero if the nominal address of the stack frame
is at the high-address end of the local variables;
that is, each additional local variable allocated
goes at a more negative offset in the frame. */
#define FRAME_GROWS_DOWNWARD 1
/* Offset within stack frame to start allocating local variables at.
If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
first local allocated. Otherwise, it is the offset to the BEGINNING
of the first local allocated. */
#define STARTING_FRAME_OFFSET 0
/* Offset from the stack pointer register to the first location at which
outgoing arguments are placed. */
#define STACK_POINTER_OFFSET FIRST_PARM_OFFSET (0)
/* Offset of first parameter from the argument pointer register value. */
/* 4 bytes for each of previous fp, return address, and previous gp.
4 byte reserved area for future considerations. */
#define FIRST_PARM_OFFSET(FNDECL) 16
/* A C expression whose value is RTL representing the address in a
stack frame where the pointer to the caller's frame is stored.
Assume that FRAMEADDR is an RTL expression for the address of the
stack frame itself.
If you don't define this macro, the default is to return the value
of FRAMEADDR--that is, the stack frame address is also the address
of the stack word that points to the previous frame. */
/* ??? unfinished */
/*define DYNAMIC_CHAIN_ADDRESS (FRAMEADDR)*/
/* A C expression whose value is RTL representing the value of the
return address for the frame COUNT steps up from the current frame.
FRAMEADDR is the frame pointer of the COUNT frame, or the frame
pointer of the COUNT - 1 frame if `RETURN_ADDR_IN_PREVIOUS_FRAME'
is defined. */
/* The current return address is in r31. The return address of anything
farther back is at [%fp,4]. */
#if 0 /* The default value should work. */
#define RETURN_ADDR_RTX(COUNT, FRAME) \
(((COUNT) == -1) \
? gen_rtx_REG (Pmode, 31) \
: copy_to_reg (gen_rtx_MEM (Pmode, \
memory_address (Pmode, \
plus_constant ((FRAME), \
UNITS_PER_WORD)))))
#endif
/* Register to use for pushing function arguments. */
#define STACK_POINTER_REGNUM 28
/* Base register for access to local variables of the function. */
#define FRAME_POINTER_REGNUM 27
/* Base register for access to arguments of the function. */
#define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
/* Register in which static-chain is passed to a function. This must
not be a register used by the prologue. */
#define STATIC_CHAIN_REGNUM 24
/* C statement to store the difference between the frame pointer
and the stack pointer values immediately after the function prologue. */
#define INITIAL_FRAME_POINTER_OFFSET(VAR) \
((VAR) = arc_compute_frame_size (get_frame_size ()))
/* Function argument passing. */
/* If defined, the maximum amount of space required for outgoing
arguments will be computed and placed into the variable
`crtl->outgoing_args_size'. No space will be pushed
onto the stack for each call; instead, the function prologue should
increase the stack frame size by this amount. */
#define ACCUMULATE_OUTGOING_ARGS 1
/* Define a data type for recording info about an argument list
during the scan of that argument list. This data type should
hold all necessary information about the function itself
and about the args processed so far, enough to enable macros
such as FUNCTION_ARG to determine where the next arg should go. */
#define CUMULATIVE_ARGS int
/* Initialize a variable CUM of type CUMULATIVE_ARGS
for a call to a function whose data type is FNTYPE.
For a library call, FNTYPE is 0. */
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
((CUM) = 0)
/* The number of registers used for parameter passing. Local to this file. */
#define MAX_ARC_PARM_REGS 8
/* 1 if N is a possible register number for function argument passing. */
#define FUNCTION_ARG_REGNO_P(N) \
((unsigned) (N) < MAX_ARC_PARM_REGS)
/* Function results. */
/* Define how to find the value returned by a function.
VALTYPE is the data type of the value (as a tree).
If the precise function being called is known, FUNC is its FUNCTION_DECL;
otherwise, FUNC is 0. */
#define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), 0)
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)
/* 1 if N is a possible register number for a function value
as seen by the caller. */
/* ??? What about r1 in DI/DF values. */
#define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
/* Tell GCC to use TARGET_RETURN_IN_MEMORY. */
#define DEFAULT_PCC_STRUCT_RETURN 0
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
the stack pointer does not matter. The value is tested only in
functions that have frame pointers.
No definition is equivalent to always zero. */
#define EXIT_IGNORE_STACK 0
/* Epilogue delay slots. */
#define DELAY_SLOTS_FOR_EPILOGUE arc_delay_slots_for_epilogue ()
#define ELIGIBLE_FOR_EPILOGUE_DELAY(TRIAL, SLOTS_FILLED) \
arc_eligible_for_epilogue_delay (TRIAL, SLOTS_FILLED)
/* Output assembler code to FILE to increment profiler label # LABELNO
for profiling a function entry. */
#define FUNCTION_PROFILER(FILE, LABELNO)
#define TRAMPOLINE_ALIGNMENT 32
#define TRAMPOLINE_SIZE 16
/* Addressing modes, and classification of registers for them. */
/* Maximum number of registers that can appear in a valid memory address. */
/* The `ld' insn allows 2, but the `st' insn only allows 1. */
#define MAX_REGS_PER_ADDRESS 1
/* We have pre inc/dec (load/store with update). */
#define HAVE_PRE_INCREMENT 1
#define HAVE_PRE_DECREMENT 1
/* Recognize any constant value that is a valid address. */
#define CONSTANT_ADDRESS_P(X) \
(GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
|| GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST)
/* Nonzero if the constant value X is a legitimate general operand.
We can handle any 32- or 64-bit constant. */
/* "1" should work since the largest constant should be a 64 bit critter. */
/* ??? Not sure what to do for 64x32 compiler. */
#define LEGITIMATE_CONSTANT_P(X) 1
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
and check its validity for a certain class.
We have two alternate definitions for each of them.
The usual definition accepts all pseudo regs; the other rejects
them unless they have been allocated suitable hard regs.
The symbol REG_OK_STRICT causes the latter definition to be used.
Most source files want to accept pseudo regs in the hope that
they will get allocated to the class that the insn wants them to be in.
Source files for reload pass need to be strict.
After reload, it makes no difference, since pseudo regs have
been eliminated by then. */
#ifndef REG_OK_STRICT
/* Nonzero if X is a hard reg that can be used as an index
or if it is a pseudo reg. */
#define REG_OK_FOR_INDEX_P(X) \
((unsigned) REGNO (X) - 32 >= FIRST_PSEUDO_REGISTER - 32)
/* Nonzero if X is a hard reg that can be used as a base reg
or if it is a pseudo reg. */
#define REG_OK_FOR_BASE_P(X) \
((unsigned) REGNO (X) - 32 >= FIRST_PSEUDO_REGISTER - 32)
#else
/* Nonzero if X is a hard reg that can be used as an index. */
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
/* Nonzero if X is a hard reg that can be used as a base reg. */
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
#endif
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
that is a valid memory address for an instruction.
The MODE argument is the machine mode for the MEM expression
that wants to use this address. */
/* The `ld' insn allows [reg],[reg+shimm],[reg+limm],[reg+reg],[limm]
but the `st' insn only allows [reg],[reg+shimm],[limm].
The only thing we can do is only allow the most strict case `st' and hope
other parts optimize out the restrictions for `ld'. */
/* local to this file */
#define RTX_OK_FOR_BASE_P(X) \
(REG_P (X) && REG_OK_FOR_BASE_P (X))
/* local to this file */
#define RTX_OK_FOR_INDEX_P(X) \
(0 && /*???*/ REG_P (X) && REG_OK_FOR_INDEX_P (X))
/* local to this file */
/* ??? Loads can handle any constant, stores can only handle small ones. */
#define RTX_OK_FOR_OFFSET_P(X) \
(GET_CODE (X) == CONST_INT && SMALL_INT (INTVAL (X)))
#define LEGITIMATE_OFFSET_ADDRESS_P(MODE, X) \
(GET_CODE (X) == PLUS \
&& RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
&& (RTX_OK_FOR_INDEX_P (XEXP (X, 1)) \
|| RTX_OK_FOR_OFFSET_P (XEXP (X, 1))))
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
{ if (RTX_OK_FOR_BASE_P (X)) \
goto ADDR; \
if (LEGITIMATE_OFFSET_ADDRESS_P ((MODE), (X))) \
goto ADDR; \
if (GET_CODE (X) == CONST_INT && LARGE_INT (INTVAL (X))) \
goto ADDR; \
if (GET_CODE (X) == SYMBOL_REF \
|| GET_CODE (X) == LABEL_REF \
|| GET_CODE (X) == CONST) \
goto ADDR; \
if ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == PRE_INC) \
/* We're restricted here by the `st' insn. */ \
&& RTX_OK_FOR_BASE_P (XEXP ((X), 0))) \
goto ADDR; \
}
/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
return the mode to be used for the comparison. */
#define SELECT_CC_MODE(OP, X, Y) \
arc_select_cc_mode (OP, X, Y)
/* Return nonzero if SELECT_CC_MODE will never return MODE for a
floating point inequality comparison. */
#define REVERSIBLE_CC_MODE(MODE) 1 /*???*/
/* Costs. */
/* Compute extra cost of moving data between one register class
and another. */
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) 2
/* Compute the cost of moving data between registers and memory. */
/* Memory is 3 times as expensive as registers.
??? Is that the right way to look at it? */
#define MEMORY_MOVE_COST(MODE,CLASS,IN) \
(GET_MODE_SIZE (MODE) <= UNITS_PER_WORD ? 6 : 12)
/* The cost of a branch insn. */
/* ??? What's the right value here? Branches are certainly more
expensive than reg->reg moves. */
#define BRANCH_COST(speed_p, predictable_p) 2
/* Nonzero if access to memory by bytes is slow and undesirable.
For RISC chips, it means that access to memory by bytes is no
better than access by words when possible, so grab a whole word
and maybe make use of that. */
#define SLOW_BYTE_ACCESS 1
/* Define this macro if it is as good or better to call a constant
function address than to call an address kept in a register. */
/* On the ARC, calling through registers is slow. */
#define NO_FUNCTION_CSE
/* Section selection. */
/* WARNING: These section names also appear in dwarfout.c. */
/* The names of the text, data, and readonly-data sections are runtime
selectable. */
#define ARC_SECTION_FORMAT "\t.section %s"
#define ARC_DEFAULT_TEXT_SECTION ".text"
#define ARC_DEFAULT_DATA_SECTION ".data"
#define ARC_DEFAULT_RODATA_SECTION ".rodata"
extern const char *arc_text_section, *arc_data_section, *arc_rodata_section;
/* initfini.c uses this in an asm. */
#if defined (CRT_INIT) || defined (CRT_FINI)
#define TEXT_SECTION_ASM_OP "\t.section .text"
#else
#define TEXT_SECTION_ASM_OP arc_text_section
#endif
#define DATA_SECTION_ASM_OP arc_data_section
#undef READONLY_DATA_SECTION_ASM_OP
#define READONLY_DATA_SECTION_ASM_OP arc_rodata_section
#define BSS_SECTION_ASM_OP "\t.section .bss"
/* Define this macro if jump tables (for tablejump insns) should be
output in the text section, along with the assembler instructions.
Otherwise, the readonly data section is used.
This macro is irrelevant if there is no separate readonly data section. */
/*#define JUMP_TABLES_IN_TEXT_SECTION*/
/* For DWARF. Marginally different than default so output is "prettier"
(and consistent with above). */
#define PUSHSECTION_ASM_OP "\t.section "
/* Tell crtstuff.c we're using ELF. */
#define OBJECT_FORMAT_ELF
/* PIC */
/* The register number of the register used to address a table of static
data addresses in memory. In some cases this register is defined by a
processor's ``application binary interface'' (ABI). When this macro
is defined, RTL is generated for this register once, as with the stack
pointer and frame pointer registers. If this macro is not defined, it
is up to the machine-dependent files to allocate such a register (if
necessary). */
#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 26 : INVALID_REGNUM)
/* Define this macro if the register defined by PIC_OFFSET_TABLE_REGNUM is
clobbered by calls. Do not define this macro if PIC_OFFSET_TABLE_REGNUM
is not defined. */
/* This register is call-saved on the ARC. */
/*#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED*/
/* A C expression that is nonzero if X is a legitimate immediate
operand on the target machine when generating position independent code.
You can assume that X satisfies CONSTANT_P, so you need not
check this. You can also assume `flag_pic' is true, so you need not
check it either. You need not define this macro if all constants
(including SYMBOL_REF) can be immediate operands when generating
position independent code. */
/*#define LEGITIMATE_PIC_OPERAND_P(X)*/
/* Control the assembler format that we output. */
/* A C string constant describing how to begin a comment in the target
assembler language. The compiler assumes that the comment will
end at the end of the line. */
#define ASM_COMMENT_START ";"
/* Output to assembler file text saying following lines
may contain character constants, extra white space, comments, etc. */
#define ASM_APP_ON ""
/* Output to assembler file text saying following lines
no longer contain unusual constructs. */
#define ASM_APP_OFF ""
/* Globalizing directive for a label. */
#define GLOBAL_ASM_OP "\t.global\t"
/* This is how to output a reference to a user-level label named NAME.
`assemble_name' uses this. */
/* We mangle all user labels to provide protection from linking code
compiled for different cpus. */
/* We work around a dwarfout.c deficiency by watching for labels from it and
not adding the '_' prefix nor the cpu suffix. There is a comment in
dwarfout.c that says it should be using (*targetm.asm_out.internal_label). */
extern const char *arc_mangle_cpu;
#define ASM_OUTPUT_LABELREF(FILE, NAME) \
do { \
if ((NAME)[0] == '.' && (NAME)[1] == 'L') \
fprintf (FILE, "%s", NAME); \
else \
{ \
fputc ('_', FILE); \
if (TARGET_MANGLE_CPU && arc_mangle_cpu != NULL) \
fprintf (FILE, "%s_", arc_mangle_cpu); \
fprintf (FILE, "%s", NAME); \
} \
} while (0)
/* Assembler pseudo-op to equate one value with another. */
/* ??? This is needed because dwarfout.c provides a default definition too
late for defaults.h (which contains the default definition of ASM_OUTPUT_DEF
that we use). */
#define SET_ASM_OP "\t.set\t"
/* How to refer to registers in assembler output.
This sequence is indexed by compiler's hard-register-number (see above). */
#define REGISTER_NAMES \
{"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
"r24", "r25", "r26", "fp", "sp", "ilink1", "ilink2", "blink", \
"r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", \
"r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", \
"r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55", \
"r56", "r57", "r58", "r59", "lp_count", "cc"}
/* Entry to the insn conditionalizer. */
#define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
arc_final_prescan_insn (INSN, OPVEC, NOPERANDS)
/* A C expression which evaluates to true if CODE is a valid
punctuation character for use in the `PRINT_OPERAND' macro. */
extern char arc_punct_chars[256];
#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
arc_punct_chars[(unsigned char) (CHAR)]
/* Print operand X (an rtx) in assembler syntax to file FILE.
CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
For `%' followed by punctuation, CODE is the punctuation and X is null. */
#define PRINT_OPERAND(FILE, X, CODE) \
arc_print_operand (FILE, X, CODE)
/* A C compound statement to output to stdio stream STREAM the
assembler syntax for an instruction operand that is a memory
reference whose address is ADDR. ADDR is an RTL expression. */
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
arc_print_operand_address (FILE, ADDR)
/* This is how to output an element of a case-vector that is absolute. */
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
do { \
char label[30]; \
ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \
fprintf (FILE, "\t.word %%st("); \
assemble_name (FILE, label); \
fprintf (FILE, ")\n"); \
} while (0)
/* This is how to output an element of a case-vector that is relative. */
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
do { \
char label[30]; \
ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \
fprintf (FILE, "\t.word %%st("); \
assemble_name (FILE, label); \
fprintf (FILE, "-"); \
ASM_GENERATE_INTERNAL_LABEL (label, "L", REL); \
assemble_name (FILE, label); \
fprintf (FILE, ")\n"); \
} while (0)
/* The desired alignment for the location counter at the beginning
of a loop. */
/* On the ARC, align loops to 32 byte boundaries (cache line size)
if -malign-loops. */
#define LOOP_ALIGN(LABEL) (TARGET_ALIGN_LOOPS ? 5 : 0)
/* This is how to output an assembler line
that says to advance the location counter
to a multiple of 2**LOG bytes. */
#define ASM_OUTPUT_ALIGN(FILE,LOG) \
do { if ((LOG) != 0) fprintf (FILE, "\t.align %d\n", 1 << (LOG)); } while (0)
/* Debugging information. */
/* Generate DBX and DWARF debugging information. */
#define DBX_DEBUGGING_INFO 1
/* Prefer STABS (for now). */
#undef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
/* Turn off splitting of long stabs. */
#define DBX_CONTIN_LENGTH 0
/* Miscellaneous. */
/* Specify the machine mode that this machine uses
for the index in the tablejump instruction. */
#define CASE_VECTOR_MODE Pmode
/* Define if operations between registers always perform the operation
on the full register even if a narrower mode is specified. */
#define WORD_REGISTER_OPERATIONS
/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
will either zero-extend or sign-extend. The value of this macro should
be the code that says which one of the two operations is implicitly
done, UNKNOWN if none. */
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
/* Max number of bytes we can move from memory to memory
in one reasonably fast instruction. */
#define MOVE_MAX 4
/* Define this to be nonzero if shift instructions ignore all but the low-order
few bits. */
#define SHIFT_COUNT_TRUNCATED 1
/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
is done just by pretending it is already truncated. */
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
/* Specify the machine mode that pointers have.
After generation of rtl, the compiler makes no further distinction
between pointers and any other objects of this machine mode. */
/* ??? The arc doesn't have full 32-bit pointers, but making this PSImode has
its own problems (you have to add extendpsisi2 and trucnsipsi2 but how does
one do it without getting excess code?). Try to avoid it. */
#define Pmode SImode
/* A function address in a call instruction. */
#define FUNCTION_MODE SImode
/* alloca should avoid clobbering the old register save area. */
/* ??? Not defined in tm.texi. */
#define SETJMP_VIA_SAVE_AREA
/* ARC function types. */
enum arc_function_type {
ARC_FUNCTION_UNKNOWN, ARC_FUNCTION_NORMAL,
/* These are interrupt handlers. The name corresponds to the register
name that contains the return address. */
ARC_FUNCTION_ILINK1, ARC_FUNCTION_ILINK2
};
#define ARC_INTERRUPT_P(TYPE) \
((TYPE) == ARC_FUNCTION_ILINK1 || (TYPE) == ARC_FUNCTION_ILINK2)
/* Compute the type of a function from its DECL. */

1376
gcc/config/arc/arc.md
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File diff suppressed because it is too large Load diff

60
gcc/config/arc/arc.opt
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@ -1,60 +0,0 @@
; Options for the Argonaut ARC port of the compiler
;
; Copyright (C) 2005, 2007, 2011 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
; License for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3. If not see
; <http://www.gnu.org/licenses/>.
EB
Driver
EL
Driver
malign-loops
Target Undocumented Report Mask(ALIGN_LOOPS)
mbig-endian
Target Undocumented Report RejectNegative Mask(BIG_ENDIAN)
mlittle-endian
Target Undocumented Report RejectNegative InverseMask(BIG_ENDIAN)
mmangle-cpu
Target Report Mask(MANGLE_CPU)
Prepend the name of the cpu to all public symbol names
; mmangle-cpu-libgcc
; Target Undocumented Mask(MANGLE_CPU_LIBGC)
mno-cond-exec
Target Undocumented Report RejectNegative Mask(NO_COND_EXEC)
mcpu=
Target RejectNegative Joined Var(arc_cpu_string) Init("base")
-mcpu=CPU Compile code for ARC variant CPU
mtext=
Target RejectNegative Joined Var(arc_text_string) Init(ARC_DEFAULT_TEXT_SECTION)
-mtext=SECTION Put functions in SECTION
mdata=
Target RejectNegative Joined Var(arc_data_string) Init(ARC_DEFAULT_DATA_SECTION)
-mdata=SECTION Put data in SECTION
mrodata=
Target RejectNegative Joined Var(arc_rodata_string) Init(ARC_DEFAULT_RODATA_SECTION)
-mrodata=SECTION Put read-only data in SECTION

155
gcc/config/arc/initfini.c
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@ -1,155 +0,0 @@
/* .init/.fini section handling + C++ global constructor/destructor handling.
This file is based on crtstuff.c, sol2-crti.asm, sol2-crtn.asm.
Copyright (C) 1995, 1997, 1998, 2009 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
/* Declare a pointer to void function type. */
typedef void (*func_ptr) (void);
#ifdef CRT_INIT
/* NOTE: In order to be able to support SVR4 shared libraries, we arrange
to have one set of symbols { __CTOR_LIST__, __DTOR_LIST__, __CTOR_END__,
__DTOR_END__ } per root executable and also one set of these symbols
per shared library. So in any given whole process image, we may have
multiple definitions of each of these symbols. In order to prevent
these definitions from conflicting with one another, and in order to
ensure that the proper lists are used for the initialization/finalization
of each individual shared library (respectively), we give these symbols
only internal (i.e. `static') linkage, and we also make it a point to
refer to only the __CTOR_END__ symbol in crtfini.o and the __DTOR_LIST__
symbol in crtinit.o, where they are defined. */
static func_ptr __CTOR_LIST__[1] __attribute__ ((section (".ctors")))
= { (func_ptr) (-1) };
static func_ptr __DTOR_LIST__[1] __attribute__ ((section (".dtors")))
= { (func_ptr) (-1) };
/* Run all the global destructors on exit from the program. */
/* Some systems place the number of pointers in the first word of the
table. On SVR4 however, that word is -1. In all cases, the table is
null-terminated. On SVR4, we start from the beginning of the list and
invoke each per-compilation-unit destructor routine in order
until we find that null.
Note that this function MUST be static. There will be one of these
functions in each root executable and one in each shared library, but
although they all have the same code, each one is unique in that it
refers to one particular associated `__DTOR_LIST__' which belongs to the
same particular root executable or shared library file. */
static void __do_global_dtors (void)
asm ("__do_global_dtors") __attribute__ ((section (".text")));
static void
__do_global_dtors (void)
{
func_ptr *p;
for (p = __DTOR_LIST__ + 1; *p; p++)
(*p) ();
}
/* .init section start.
This must appear at the start of the .init section. */
asm ("\n\
.section .init\n\
.global init\n\
.word 0\n\
init:\n\
st blink,[sp,4]\n\
st fp,[sp]\n\
mov fp,sp\n\
sub sp,sp,16\n\
");
/* .fini section start.
This must appear at the start of the .init section. */
asm ("\n\
.section .fini\n\
.global fini\n\
.word 0\n\
fini:\n\
st blink,[sp,4]\n\
st fp,[sp]\n\
mov fp,sp\n\
sub sp,sp,16\n\
bl.nd __do_global_dtors\n\
");
#endif /* CRT_INIT */
#ifdef CRT_FINI
/* Put a word containing zero at the end of each of our two lists of function
addresses. Note that the words defined here go into the .ctors and .dtors
sections of the crtend.o file, and since that file is always linked in
last, these words naturally end up at the very ends of the two lists
contained in these two sections. */
static func_ptr __CTOR_END__[1] __attribute__ ((section (".ctors")))
= { (func_ptr) 0 };
static func_ptr __DTOR_END__[1] __attribute__ ((section (".dtors")))
= { (func_ptr) 0 };
/* Run all global constructors for the program.
Note that they are run in reverse order. */
static void __do_global_ctors (void)
asm ("__do_global_ctors") __attribute__ ((section (".text")));
static void
__do_global_ctors (void)
{
func_ptr *p;
for (p = __CTOR_END__ - 1; *p != (func_ptr) -1; p--)
(*p) ();
}
/* .init section end.
This must live at the end of the .init section. */
asm ("\n\
.section .init\n\
bl.nd __do_global_ctors\n\
ld blink,[fp,4]\n\
j.d blink\n\
ld.a fp,[sp,16]\n\
");
/* .fini section end.
This must live at the end of the .fini section. */
asm ("\n\
.section .fini\n\
ld blink,[fp,4]\n\
j.d blink\n\
ld.a fp,[sp,16]\n\
");
#endif /* CRT_FINI */

266
gcc/config/arc/lib1funcs.asm
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@ -1,266 +0,0 @@
; libgcc routines for ARC cpu.
/* Copyright (C) 1995, 1997,2004, 2009 Free Software Foundation, Inc.
This file is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
Free Software Foundation; either version 3, or (at your option) any
later version.
This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
#ifdef L_mulsi3
.section .text
.align 4
#ifdef __base__
.cpu base
.global ___mulsi3
___mulsi3:
/* This the simple version.
while (a)
{
if (a & 1)
r += b;
a >>= 1;
b <<= 1;
}
*/
mov r2,0 ; Accumulate result here.
.Lloop:
sub.f 0,r0,0 ; while (a)
nop
beq.nd .Ldone
and.f 0,r0,1 ; if (a & 1)
add.nz r2,r2,r1 ; r += b
lsr r0,r0 ; a >>= 1
b.d .Lloop
lsl r1,r1 ; b <<= 1
.Ldone:
j.d blink
mov r0,r2
#endif
#endif /* L_mulsi3 */
#ifdef L_umulsidi3
.section .text
.align 4
#ifdef __base__
.cpu base
.global ___umulsidi3
___umulsidi3:
/* This the simple version.
while (a)
{
if (a & 1)
r += b;
a >>= 1;
b <<= 1;
}
*/
mov r2,0 ; Top part of b.
mov r3,0 ; Accumulate result here.
mov r4,0
.Lloop:
sub.f 0,r0,0 ; while (a)
nop
beq.nd .Ldone
and.f 0,r0,1 ; if (a & 1)
sub.f 0,r0,0
nop
beq .Ldontadd
add.f r4,r4,r1 ; r += b
adc r3,r3,r2
.Ldontadd:
lsr r0,r0 ; a >>= 1
lsl.f r1,r1 ; b <<= 1
b.d .Lloop
rlc r2,r2
.Ldone:
#ifdef __big_endian__
mov r1,r4
j.d blink
mov r0,r3
#else
mov r0,r4
j.d blink
mov r1,r3
#endif
#endif
#endif /* L_umulsidi3 */
#ifdef L_divmod_tools
; Utilities used by all routines.
.section .text
.align 4
; inputs: r0 = numerator, r1 = denominator
; outputs: positive r0/r1,
; r6.bit1 = sign of numerator, r6.bit0 = sign of result
.global ___divnorm
___divnorm:
mov r6,0 ; keep sign in r6
sub.f 0,r0,0 ; is numerator -ve?
sub.lt r0,0,r0 ; negate numerator
mov.lt r6,3 ; sign is -ve
sub.f 0,r1,0 ; is denominator -ve?
sub.lt r1,0,r1 ; negate denominator
xor.lt r6,r6,1 ; toggle sign
j.nd blink
/*
unsigned long
udivmodsi4(int modwanted, unsigned long num, unsigned long den)
{
unsigned long bit = 1;
unsigned long res = 0;
while (den < num && bit && !(den & (1L<<31)))
{
den <<=1;
bit <<=1;
}
while (bit)
{
if (num >= den)
{
num -= den;
res |= bit;
}
bit >>=1;
den >>=1;
}
if (modwanted) return num;
return res;
}
*/
; inputs: r0 = numerator, r1 = denominator
; outputs: r0 = quotient, r1 = remainder, r2/r3 trashed
.global ___udivmodsi4
___udivmodsi4:
mov r2,1 ; bit = 1
mov r3,0 ; res = 0
.Lloop1:
sub.f 0,r1,r0 ; while (den < num
nop
bnc.nd .Lloop2
sub.f 0,r2,0 ; && bit
nop
bz.nd .Lloop2
lsl.f 0,r1 ; && !(den & (1<<31))
nop
bc.nd .Lloop2
lsl r1,r1 ; den <<= 1
b.d .Lloop1
lsl r2,r2 ; bit <<= 1
.Lloop2:
sub.f 0,r2,0 ; while (bit)
nop
bz.nd .Ldivmodend
sub.f 0,r0,r1 ; if (num >= den)
nop
bc.nd .Lshiftdown
sub r0,r0,r1 ; num -= den
or r3,r3,r2 ; res |= bit
.Lshiftdown:
lsr r2,r2 ; bit >>= 1
b.d .Lloop2
lsr r1,r1 ; den >>= 1
.Ldivmodend:
mov r1,r0 ; r1 = mod
j.d blink
mov r0,r3 ; r0 = res
#endif
#ifdef L_udivsi3
.section .text
.align 4
#ifdef __base__
.cpu base
.global ___udivsi3
___udivsi3:
mov r7,blink
bl.nd ___udivmodsi4
j.nd r7
#endif
#endif /* L_udivsi3 */
#ifdef L_divsi3
.section .text
.align 4
#ifdef __base__
.cpu base
.global ___divsi3
___divsi3:
mov r7,blink
bl.nd ___divnorm
bl.nd ___udivmodsi4
and.f 0,r6,1
sub.nz r0,0,r0 ; cannot go in delay slot, has limm value
j.nd r7
#endif
#endif /* L_divsi3 */
#ifdef L_umodsi3
.section .text
.align 4
#ifdef __base__
.cpu base
.global ___umodsi3
___umodsi3:
mov r7,blink
bl.nd ___udivmodsi4
j.d r7
mov r0,r1
#endif
#endif /* L_umodsi3 */
#ifdef L_modsi3
.section .text
.align 4
#ifdef __base__
.cpu base
.global ___modsi3
___modsi3:
mov r7,blink
bl.nd ___divnorm
bl.nd ___udivmodsi4
and.f 0,r6,2
sub.nz r1,0,r1
j.d r7
mov r0,r1
#endif
#endif /* L_modsi3 */

60
gcc/config/arc/t-arc
View file

@ -1,60 +0,0 @@
# Copyright (C) 1997, 1998, 1999, 2001, 2002, 2003,
# 2004 Free Software Foundation, Inc.
#
# This file is part of GCC.
#
# GCC is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3, or (at your option)
# any later version.
#
# GCC is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
LIB1ASMSRC = arc/lib1funcs.asm
LIB1ASMFUNCS = _mulsi3 _umulsidi3 _udivsi3 _divsi3 _umodsi3 _modsi3 _divmod_tools
# We need libgcc routines to be mangled according to which cpu they
# were compiled for.
# ??? -mmangle-cpu passed by default for now.
#LIBGCC2_CFLAGS = -g1 -O2 $(LIBGCC2_INCLUDES) $(GCC_CFLAGS) -mmangle-cpu
# We want fine grained libraries, so use the new code to build the
# floating point emulation libraries.
FPBIT = fp-bit.c
DPBIT = dp-bit.c
dp-bit.c: $(srcdir)/config/fp-bit.c
echo '#ifndef __big_endian__' > dp-bit.c
echo '#define FLOAT_BIT_ORDER_MISMATCH' >> dp-bit.c
echo '#endif' >> dp-bit.c
cat $(srcdir)/config/fp-bit.c >> dp-bit.c
fp-bit.c: $(srcdir)/config/fp-bit.c
echo '#define FLOAT' > fp-bit.c
echo '#ifndef __big_endian__' >> fp-bit.c
echo '#define FLOAT_BIT_ORDER_MISMATCH' >> fp-bit.c
echo '#endif' >> fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c
# .init/.fini section routines
$(T)crtinit.o: $(srcdir)/config/arc/initfini.c $(GCC_PASSES) $(CONFIG_H)
$(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(CRTSTUFF_T_CFLAGS) \
$(MULTILIB_CFLAGS) -DCRT_INIT -finhibit-size-directive -fno-inline-functions \
-g0 -c $(srcdir)/config/arc/initfini.c -o $(T)crtinit.o
$(T)crtfini.o: $(srcdir)/config/arc/initfini.c $(GCC_PASSES) $(CONFIG_H)
$(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(CRTSTUFF_T_CFLAGS) \
-DCRT_FINI $(MULTILIB_CFLAGS) -finhibit-size-directive -fno-inline-functions \
-g0 -c $(srcdir)/config/arc/initfini.c -o $(T)crtfini.o
MULTILIB_OPTIONS = EB
MULTILIB_DIRNAMES = be
EXTRA_MULTILIB_PARTS = crtinit.o crtfini.o

150
gcc/config/arm/netbsd.h
View file

@ -1,150 +0,0 @@
/* NetBSD/arm a.out version.
Copyright (C) 1993, 1994, 1997, 1998, 2003, 2004, 2005, 2007, 2008, 2010
Free Software Foundation, Inc.
Contributed by Mark Brinicombe (amb@physig.ph.kcl.ac.uk)
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* Run-time Target Specification. */
#undef TARGET_VERSION
#define TARGET_VERSION fputs (" (ARM/NetBSD)", stderr);
/* Unsigned chars produces much better code than signed. */
#define DEFAULT_SIGNED_CHAR 0
/* Since we always use GAS as our assembler we support stabs. */
#define DBX_DEBUGGING_INFO 1
/*#undef ASM_DECLARE_FUNCTION_NAME*/
/* ARM6 family default cpu. */
#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm6
#undef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_APCS_FRAME)
/* Some defines for CPP.
arm32 is the NetBSD port name, so we always define arm32 and __arm32__. */
#define TARGET_OS_CPP_BUILTINS() \
do { \
NETBSD_OS_CPP_BUILTINS_AOUT(); \
builtin_define_std ("arm32"); \
builtin_define_std ("unix"); \
builtin_define_std ("riscbsd"); \
} while (0)
#undef SUBTARGET_EXTRA_SPECS
#define SUBTARGET_EXTRA_SPECS \
{ "netbsd_cpp_spec", NETBSD_CPP_SPEC }, \
{ "netbsd_link_spec", NETBSD_LINK_SPEC_AOUT },
#undef CPP_SPEC
#define CPP_SPEC "\
%(cpp_cpu_arch) %(cpp_float) %(cpp_endian) %(netbsd_cpp_spec) \
"
/* Because TARGET_DEFAULT sets MASK_SOFT_FLOAT */
#undef CPP_FLOAT_DEFAULT_SPEC
#define CPP_FLOAT_DEFAULT_SPEC "-D__SOFTFP__"
/* Pass -X to the linker so that it will strip symbols starting with 'L' */
#undef LINK_SPEC
#define LINK_SPEC "-X %(netbsd_link_spec)"
#undef SIZE_TYPE
#define SIZE_TYPE "unsigned int"
#undef PTRDIFF_TYPE
#define PTRDIFF_TYPE "int"
/* We don't have any limit on the length as out debugger is GDB. */
#undef DBX_CONTIN_LENGTH
/* NetBSD does its profiling differently to the Acorn compiler. We
don't need a word following the mcount call; and to skip it
requires either an assembly stub or use of fomit-frame-pointer when
compiling the profiling functions. Since we break Acorn CC
compatibility below a little more won't hurt. */
#undef ARM_FUNCTION_PROFILER
#define ARM_FUNCTION_PROFILER(STREAM,LABELNO) \
{ \
fprintf(STREAM, "\tmov\t%sip, %slr\n", REGISTER_PREFIX, REGISTER_PREFIX); \
fprintf(STREAM, "\tbl\tmcount\n"); \
}
/* On the ARM `@' introduces a comment, so we must use something else
for .type directives. */
#undef TYPE_OPERAND_FMT
#define TYPE_OPERAND_FMT "%%%s"
/* NetBSD uses the old PCC style aggregate returning conventions. */
#undef DEFAULT_PCC_STRUCT_RETURN
#define DEFAULT_PCC_STRUCT_RETURN 1
/* Although not normally relevant (since by default, all aggregates
are returned in memory) compiling some parts of libc requires
non-APCS style struct returns. */
#undef TARGET_RETURN_IN_MEMORY
/* VERY BIG NOTE : Change of structure alignment for RiscBSD.
There are consequences you should be aware of...
Normally GCC/arm uses a structure alignment of 32 for compatibility
with armcc. This means that structures are padded to a word
boundary. However this causes problems with bugged NetBSD kernel
code (possibly userland code as well - I have not checked every
binary). The nature of this bugged code is to rely on sizeof()
returning the correct size of various structures rounded to the
nearest byte (SCSI and ether code are two examples, the vm system
is another). This code breaks when the structure alignment is 32
as sizeof() will report a word=rounded size. By changing the
structure alignment to 8. GCC will conform to what is expected by
NetBSD.
This has several side effects that should be considered.
1. Structures will only be aligned to the size of the largest member.
i.e. structures containing only bytes will be byte aligned.
structures containing shorts will be half word aligned.
structures containing ints will be word aligned.
This means structures should be padded to a word boundary if
alignment of 32 is required for byte structures etc.
2. A potential performance penalty may exist if strings are no longer
word aligned. GCC will not be able to use word load/stores to copy
short strings.
This modification is not encouraged but with the present state of the
NetBSD source tree it is currently the only solution that meets the
requirements. */
#undef DEFAULT_STRUCTURE_SIZE_BOUNDARY
#define DEFAULT_STRUCTURE_SIZE_BOUNDARY 8
/* Clear the instruction cache from `BEG' to `END'. This makes a
call to the ARM32_SYNC_ICACHE architecture specific syscall. */
#define CLEAR_INSN_CACHE(BEG, END) \
{ \
extern int sysarch(int number, void *args); \
struct { \
unsigned int addr; \
int len; \
} s; \
s.addr = (unsigned int)(BEG); \
s.len = (END) - (BEG); \
(void)sysarch(0, &s); \
}

52
gcc/config/arm/t-pe
View file

@ -1,52 +0,0 @@
# Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2006, 2008, 2009,
# 2010
# Free Software Foundation, Inc.
#
# This file is part of GCC.
#
# GCC is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3, or (at your option)
# any later version.
#
# GCC is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2
# We want fine grained libraries, so use the new code to build the
# floating point emulation libraries.
FPBIT = fp-bit.c
DPBIT = dp-bit.c
fp-bit.c: $(srcdir)/config/fp-bit.c
echo '#define FLOAT' > fp-bit.c
echo '#ifndef __ARMEB__' >> fp-bit.c
echo '#define FLOAT_BIT_ORDER_MISMATCH' >> fp-bit.c
echo '#endif' >> fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c
dp-bit.c: $(srcdir)/config/fp-bit.c
echo '#ifndef __ARMEB__' > dp-bit.c
echo '#define FLOAT_BIT_ORDER_MISMATCH' >> dp-bit.c
echo '#define FLOAT_WORD_ORDER_MISMATCH' >> dp-bit.c
echo '#endif' >> dp-bit.c
cat $(srcdir)/config/fp-bit.c >> dp-bit.c
pe.o: $(srcdir)/config/arm/pe.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \
$(RTL_H) output.h flags.h $(TREE_H) expr.h $(TM_P_H)
$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
$(srcdir)/config/arm/pe.c
MULTILIB_OPTIONS = mhard-float mthumb
MULTILIB_DIRNAMES = fpu thumb
LIBGCC = stmp-multilib
INSTALL_LIBGCC = install-multilib
TARGET_LIBGCC2_CFLAGS =

79
gcc/config/crx/crx-protos.h
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@ -1,79 +0,0 @@
/* Prototypes for exported functions defined in crx.c
Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
2002, 2003, 2004, 2007, 2010 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#ifndef GCC_CRX_PROTOS_H
#define GCC_CRX_PROTOS_H
/* Register usage. */
extern enum reg_class crx_regno_reg_class (int);
extern int crx_hard_regno_mode_ok (int regno, enum machine_mode);
#ifdef RTX_CODE
extern enum reg_class crx_secondary_reload_class (enum reg_class, enum machine_mode, rtx);
#endif /* RTX_CODE */
/* Passing function arguments. */
extern int crx_function_arg_regno_p (int);
#ifdef TREE_CODE
#ifdef RTX_CODE
extern void crx_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx);
#endif /* RTX_CODE */
#endif /* TREE_CODE */
#ifdef RTX_CODE
/* Addressing Modes. */
struct crx_address
{
rtx base, index, disp, side_effect;
int scale;
};
enum crx_addrtype
{
CRX_INVALID, CRX_REG_REL, CRX_POST_INC, CRX_SCALED_INDX, CRX_ABSOLUTE
};
extern enum crx_addrtype crx_decompose_address (rtx addr, struct crx_address *out);
extern int crx_const_double_ok (rtx op);
/* Instruction output. */
extern void crx_print_operand (FILE *, rtx, int);
extern void crx_print_operand_address (FILE *, rtx);
/* Misc functions called from crx.md. */
extern void crx_expand_movmem_single (rtx, rtx, rtx, rtx, rtx, unsigned HOST_WIDE_INT *);
extern int crx_expand_movmem (rtx, rtx, rtx, rtx);
#endif /* RTX_CODE */
/* Routines to compute costs. */
extern int crx_memory_move_cost (enum machine_mode, enum reg_class, int);
/* Prologue/Epilogue functions. */
extern int crx_initial_elimination_offset (int, int);
extern char *crx_prepare_push_pop_string (int);
extern void crx_expand_prologue (void);
extern void crx_expand_epilogue (void);
/* Handling the "interrupt" attribute */
extern int crx_interrupt_function_p (void);
#endif /* GCC_CRX_PROTOS_H */

1466
gcc/config/crx/crx.c
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478
gcc/config/crx/crx.h
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@ -1,478 +0,0 @@
/* Definitions of target machine for GNU compiler, for CRX.
Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#ifndef GCC_CRX_H
#define GCC_CRX_H
/*****************************************************************************/
/* CONTROLLING THE DRIVER */
/*****************************************************************************/
#define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
%{!fenforce-eh-specs:-fno-enforce-eh-specs} \
%{!fexceptions:-fno-exceptions} \
%{!fthreadsafe-statics:-fno-threadsafe-statics}"
#undef STARTFILE_SPEC
#define STARTFILE_SPEC "crti.o%s crtbegin.o%s"
#undef ENDFILE_SPEC
#define ENDFILE_SPEC "crtend.o%s crtn.o%s"
#undef MATH_LIBRARY
#define MATH_LIBRARY ""
/*****************************************************************************/
/* RUN-TIME TARGET SPECIFICATION */
/*****************************************************************************/
#ifndef TARGET_CPU_CPP_BUILTINS
#define TARGET_CPU_CPP_BUILTINS() \
do { \
builtin_define("__CRX__"); \
builtin_define("__CR__"); \
} while (0)
#endif
#define TARGET_VERSION fputs (" (CRX/ELF)", stderr);
/*****************************************************************************/
/* STORAGE LAYOUT */
/*****************************************************************************/
#define BITS_BIG_ENDIAN 0
#define BYTES_BIG_ENDIAN 0
#define WORDS_BIG_ENDIAN 0
#define UNITS_PER_WORD 4
#define POINTER_SIZE 32
#define PARM_BOUNDARY 32
#define STACK_BOUNDARY 32
#define FUNCTION_BOUNDARY 32
#define STRUCTURE_SIZE_BOUNDARY 32
#define BIGGEST_ALIGNMENT 32
/* In CRX arrays of chars are word-aligned, so strcpy() will be faster. */
#define DATA_ALIGNMENT(TYPE, ALIGN) \
(TREE_CODE (TYPE) == ARRAY_TYPE && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
&& (ALIGN) < BITS_PER_WORD \
? (BITS_PER_WORD) : (ALIGN))
/* In CRX strings are word-aligned so strcpy from constants will be faster. */
#define CONSTANT_ALIGNMENT(CONSTANT, ALIGN) \
(TREE_CODE (CONSTANT) == STRING_CST && (ALIGN) < BITS_PER_WORD \
? (BITS_PER_WORD) : (ALIGN))
#define STRICT_ALIGNMENT 0
#define PCC_BITFIELD_TYPE_MATTERS 1
/*****************************************************************************/
/* LAYOUT OF SOURCE LANGUAGE DATA TYPES */
/*****************************************************************************/
#define INT_TYPE_SIZE 32
#define SHORT_TYPE_SIZE 16
#define LONG_TYPE_SIZE 32
#define LONG_LONG_TYPE_SIZE 64
#define FLOAT_TYPE_SIZE 32
#define DOUBLE_TYPE_SIZE 64
#define LONG_DOUBLE_TYPE_SIZE 64
#define DEFAULT_SIGNED_CHAR 1
#define SIZE_TYPE "unsigned int"
#define PTRDIFF_TYPE "int"
/*****************************************************************************/
/* REGISTER USAGE. */
/*****************************************************************************/
#define FIRST_PSEUDO_REGISTER 19
/* On the CRX, only the stack pointer (r15) is such. */
#define FIXED_REGISTERS \
{ \
/* r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 */ \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
/* r11 r12 r13 ra sp r16 r17 cc */ \
0, 0, 0, 0, 1, 0, 0, 1 \
}
/* On the CRX, calls clobbers r0-r6 (scratch registers), ra (the return address)
* and sp - (the stack pointer which is fixed). */
#define CALL_USED_REGISTERS \
{ \
/* r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 */ \
1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, \
/* r11 r12 r13 ra sp r16 r17 cc */ \
0, 0, 0, 1, 1, 1, 1, 1 \
}
#define HARD_REGNO_NREGS(REGNO, MODE) \
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
/* On the CRX architecture, HILO regs can only hold SI mode. */
#define HARD_REGNO_MODE_OK(REGNO, MODE) crx_hard_regno_mode_ok(REGNO, MODE)
/* So far no patterns for moving CCMODE data are available */
#define AVOID_CCMODE_COPIES
/* Interrupt functions can only use registers that have already been saved by
* the prologue, even if they would normally be call-clobbered. */
#define HARD_REGNO_RENAME_OK(SRC, DEST) \
(!crx_interrupt_function_p () || df_regs_ever_live_p (DEST))
#define MODES_TIEABLE_P(MODE1, MODE2) 1
enum reg_class
{
NO_REGS,
LO_REGS,
HI_REGS,
HILO_REGS,
NOSP_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES
};
#define N_REG_CLASSES (int) LIM_REG_CLASSES
/* The following macro defines cover classes for Integrated Register
Allocator. Cover classes is a set of non-intersected register
classes covering all hard registers used for register allocation
purpose. Any move between two registers of a cover class should be
cheaper than load or store of the registers. The macro value is
array of register classes with LIM_REG_CLASSES used as the end
marker. */
#define IRA_COVER_CLASSES \
{ \
GENERAL_REGS, LIM_REG_CLASSES \
}
#define REG_CLASS_NAMES \
{ \
"NO_REGS", \
"LO_REGS", \
"HI_REGS", \
"HILO_REGS", \
"NOSP_REGS", \
"GENERAL_REGS", \
"ALL_REGS" \
}
#define REG_CLASS_CONTENTS \
{ \
{0x00000000}, /* NO_REGS */ \
{0x00010000}, /* LO_REGS : 16 */ \
{0x00020000}, /* HI_REGS : 17 */ \
{0x00030000}, /* HILO_REGS : 16, 17 */ \
{0x00007fff}, /* NOSP_REGS : 0 - 14 */ \
{0x0000ffff}, /* GENERAL_REGS : 0 - 15 */ \
{0x0007ffff} /* ALL_REGS : 0 - 18 */ \
}
#define REGNO_REG_CLASS(REGNO) crx_regno_reg_class(REGNO)
#define BASE_REG_CLASS GENERAL_REGS
#define INDEX_REG_CLASS GENERAL_REGS
#define REG_CLASS_FROM_LETTER(C) \
((C) == 'b' ? NOSP_REGS : \
(C) == 'l' ? LO_REGS : \
(C) == 'h' ? HI_REGS : \
(C) == 'k' ? HILO_REGS : \
NO_REGS)
#define REGNO_OK_FOR_BASE_P(REGNO) \
((REGNO) < 16 \
|| (reg_renumber && (unsigned)reg_renumber[REGNO] < 16))
#define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P(REGNO)
#define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
crx_secondary_reload_class (CLASS, MODE, X)
#define CLASS_MAX_NREGS(CLASS, MODE) \
(GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD
#define SIGNED_INT_FITS_N_BITS(imm, N) \
((((imm) < ((long long)1<<((N)-1))) && ((imm) >= -((long long)1<<((N)-1)))) ? 1 : 0)
#define UNSIGNED_INT_FITS_N_BITS(imm, N) \
(((imm) < ((long long)1<<(N)) && (imm) >= (long long)0) ? 1 : 0)
#define HILO_REGNO_P(regno) \
(reg_classes_intersect_p(REGNO_REG_CLASS(regno), HILO_REGS))
#define INT_CST4(VALUE) \
(((VALUE) >= -1 && (VALUE) <= 4) || (VALUE) == -4 \
|| (VALUE) == 7 || (VALUE) == 8 || (VALUE) == 16 || (VALUE) == 32 \
|| (VALUE) == 20 || (VALUE) == 12 || (VALUE) == 48)
#define CONST_OK_FOR_LETTER_P(VALUE, C) \
/* Legal const for store immediate instructions */ \
((C) == 'I' ? UNSIGNED_INT_FITS_N_BITS(VALUE, 3) : \
(C) == 'J' ? UNSIGNED_INT_FITS_N_BITS(VALUE, 4) : \
(C) == 'K' ? UNSIGNED_INT_FITS_N_BITS(VALUE, 5) : \
(C) == 'L' ? INT_CST4(VALUE) : \
0)
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
((C) == 'G' ? crx_const_double_ok (VALUE) : \
0)
/*****************************************************************************/
/* STACK LAYOUT AND CALLING CONVENTIONS. */
/*****************************************************************************/
#define STACK_GROWS_DOWNWARD
#define STARTING_FRAME_OFFSET 0
#define STACK_POINTER_REGNUM 15
#define FRAME_POINTER_REGNUM 13
#define ARG_POINTER_REGNUM 12
#define STATIC_CHAIN_REGNUM 1
#define RETURN_ADDRESS_REGNUM 14
#define FIRST_PARM_OFFSET(FNDECL) 0
#define ELIMINABLE_REGS \
{ \
{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{ ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
}
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
do { \
(OFFSET) = crx_initial_elimination_offset ((FROM), (TO)); \
} while (0)
/*****************************************************************************/
/* PASSING FUNCTION ARGUMENTS */
/*****************************************************************************/
#define ACCUMULATE_OUTGOING_ARGS (TARGET_NO_PUSH_ARGS)
#define PUSH_ARGS (!TARGET_NO_PUSH_ARGS)
#define PUSH_ROUNDING(BYTES) (((BYTES) + 3) & ~3)
#ifndef CUMULATIVE_ARGS
struct cumulative_args
{
int ints;
};
#define CUMULATIVE_ARGS struct cumulative_args
#endif
/* On the CRX architecture, Varargs routines should receive their parameters on
* the stack. */
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
crx_init_cumulative_args(&(CUM), (FNTYPE), (LIBNAME))
#define FUNCTION_ARG_REGNO_P(REGNO) crx_function_arg_regno_p(REGNO)
/*****************************************************************************/
/* RETURNING FUNCTION VALUE */
/*****************************************************************************/
/* On the CRX, the return value is in R0 */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx_REG(TYPE_MODE (VALTYPE), 0)
#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)
#define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
#define CRX_STRUCT_VALUE_REGNUM 0
/*****************************************************************************/
/* GENERATING CODE FOR PROFILING - NOT IMPLEMENTED */
/*****************************************************************************/
#undef FUNCTION_PROFILER
#define FUNCTION_PROFILER(STREAM, LABELNO) \
{ \
sorry ("profiler support for CRX"); \
}
/*****************************************************************************/
/* TRAMPOLINES FOR NESTED FUNCTIONS - NOT SUPPORTED */
/*****************************************************************************/
#define TRAMPOLINE_SIZE 32
/*****************************************************************************/
/* ADDRESSING MODES */
/*****************************************************************************/
#define CONSTANT_ADDRESS_P(X) \
(GET_CODE (X) == LABEL_REF \
|| GET_CODE (X) == SYMBOL_REF \
|| GET_CODE (X) == CONST \
|| GET_CODE (X) == CONST_INT)
#define MAX_REGS_PER_ADDRESS 2
#define HAVE_POST_INCREMENT 1
#define HAVE_POST_DECREMENT 1
#define HAVE_POST_MODIFY_DISP 1
#define HAVE_POST_MODIFY_REG 0
#ifdef REG_OK_STRICT
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
#else
#define REG_OK_FOR_BASE_P(X) 1
#define REG_OK_FOR_INDEX_P(X) 1
#endif /* REG_OK_STRICT */
#define LEGITIMATE_CONSTANT_P(X) 1
/*****************************************************************************/
/* CONDITION CODE STATUS */
/*****************************************************************************/
/*****************************************************************************/
/* RELATIVE COSTS OF OPERATIONS */
/*****************************************************************************/
#define MEMORY_MOVE_COST(MODE, CLASS, IN) crx_memory_move_cost(MODE, CLASS, IN)
/* Moving to processor register flushes pipeline - thus asymmetric */
#define REGISTER_MOVE_COST(MODE, FROM, TO) ((TO != GENERAL_REGS) ? 8 : 2)
/* Assume best case (branch predicted) */
#define BRANCH_COST(speed_p, predictable_p) 2
#define SLOW_BYTE_ACCESS 1
/*****************************************************************************/
/* DIVIDING THE OUTPUT INTO SECTIONS */
/*****************************************************************************/
#define TEXT_SECTION_ASM_OP "\t.section\t.text"
#define DATA_SECTION_ASM_OP "\t.section\t.data"
#define BSS_SECTION_ASM_OP "\t.section\t.bss"
/*****************************************************************************/
/* POSITION INDEPENDENT CODE */
/*****************************************************************************/
#define PIC_OFFSET_TABLE_REGNUM 12
#define LEGITIMATE_PIC_OPERAND_P(X) 1
/*****************************************************************************/
/* ASSEMBLER FORMAT */
/*****************************************************************************/
#define GLOBAL_ASM_OP "\t.globl\t"
#undef USER_LABEL_PREFIX
#define USER_LABEL_PREFIX "_"
#undef ASM_OUTPUT_LABELREF
#define ASM_OUTPUT_LABELREF(STREAM, NAME) \
asm_fprintf (STREAM, "%U%s", (*targetm.strip_name_encoding) (NAME));
#undef ASM_APP_ON
#define ASM_APP_ON "#APP\n"
#undef ASM_APP_OFF
#define ASM_APP_OFF "#NO_APP\n"
/*****************************************************************************/
/* INSTRUCTION OUTPUT */
/*****************************************************************************/
#define REGISTER_NAMES \
{ \
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
"r8", "r9", "r10", "r11", "r12", "r13", "ra", "sp", \
"lo", "hi", "cc" \
}
#define PRINT_OPERAND(STREAM, X, CODE) \
crx_print_operand(STREAM, X, CODE)
#define PRINT_OPERAND_ADDRESS(STREAM, ADDR) \
crx_print_operand_address(STREAM, ADDR)
/*****************************************************************************/
/* OUTPUT OF DISPATCH TABLES */
/*****************************************************************************/
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
asm_fprintf ((STREAM), "\t.long\t.L%d\n", (VALUE))
/*****************************************************************************/
/* ALIGNMENT IN ASSEMBLER FILE */
/*****************************************************************************/
#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
asm_fprintf ((STREAM), "\t.align\t%d\n", 1 << (POWER))
/*****************************************************************************/
/* MISCELLANEOUS PARAMETERS */
/*****************************************************************************/
#define CASE_VECTOR_MODE Pmode
#define MOVE_MAX 4
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
#define STORE_FLAG_VALUE 1
#define Pmode SImode
#define FUNCTION_MODE QImode
#endif /* ! GCC_CRX_H */

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gcc/config/crx/crx.md
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;; GCC machine description for CRX.
;; Copyright (C) 1988, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
;; 2001, 2002, 2003, 2004, 2007
;; Free Software Foundation, Inc.
;;
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify
;; it under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.
;;
;; GCC is distributed in the hope that it will be useful,
;; but WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;; GNU General Public License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>. */
;; Register numbers
(define_constants
[(SP_REGNUM 15) ; Stack pointer
(RA_REGNUM 14) ; Return address
(LO_REGNUM 16) ; LO register
(HI_REGNUM 17) ; HI register
(CC_REGNUM 18) ; Condition code register
]
)
(define_attr "length" "" ( const_int 6 ))
(define_asm_attributes
[(set_attr "length" "6")]
)
;; Predicates
(define_predicate "u4bits_operand"
(match_code "const_int,const_double")
{
if (GET_CODE (op) == CONST_DOUBLE)
return crx_const_double_ok (op);
return (UNSIGNED_INT_FITS_N_BITS(INTVAL(op), 4)) ? 1 : 0;
}
)
(define_predicate "cst4_operand"
(and (match_code "const_int")
(match_test "INT_CST4(INTVAL(op))")))
(define_predicate "reg_or_u4bits_operand"
(ior (match_operand 0 "u4bits_operand")
(match_operand 0 "register_operand")))
(define_predicate "reg_or_cst4_operand"
(ior (match_operand 0 "cst4_operand")
(match_operand 0 "register_operand")))
(define_predicate "reg_or_sym_operand"
(ior (match_code "symbol_ref")
(match_operand 0 "register_operand")))
(define_predicate "cc_reg_operand"
(and (match_code "reg")
(match_test "REGNO (op) == CC_REGNUM")))
(define_predicate "nosp_reg_operand"
(and (match_operand 0 "register_operand")
(match_test "REGNO (op) != SP_REGNUM")))
(define_predicate "store_operand"
(and (match_operand 0 "memory_operand")
(not (match_operand 0 "push_operand"))))
;; Mode Macro Definitions
(define_mode_iterator ALLMT [QI HI SI SF DI DF])
(define_mode_iterator CRXMM [QI HI SI SF])
(define_mode_iterator CRXIM [QI HI SI])
(define_mode_iterator DIDFM [DI DF])
(define_mode_iterator SISFM [SI SF])
(define_mode_iterator SHORT [QI HI])
(define_mode_attr tIsa [(QI "b") (HI "w") (SI "d") (SF "d")])
(define_mode_attr lImmArith [(QI "4") (HI "4") (SI "6")])
(define_mode_attr lImmRotl [(QI "2") (HI "2") (SI "4")])
(define_mode_attr IJK [(QI "I") (HI "J") (SI "K")])
(define_mode_attr iF [(QI "i") (HI "i") (SI "i") (DI "i") (SF "F") (DF "F")])
(define_mode_attr JG [(QI "J") (HI "J") (SI "J") (DI "J") (SF "G") (DF "G")])
; In HI or QI mode we push 4 bytes.
(define_mode_attr pushCnstr [(QI "X") (HI "X") (SI "<") (SF "<") (DI "<") (DF "<")])
(define_mode_attr tpush [(QI "") (HI "") (SI "") (SF "") (DI "sp, ") (DF "sp, ")])
(define_mode_attr lpush [(QI "2") (HI "2") (SI "2") (SF "2") (DI "4") (DF "4")])
;; Code Macro Definitions
(define_code_iterator sz_xtnd [sign_extend zero_extend])
(define_code_attr sIsa [(sign_extend "") (zero_extend "u")])
(define_code_attr sPat [(sign_extend "s") (zero_extend "u")])
(define_code_attr szPat [(sign_extend "") (zero_extend "zero_")])
(define_code_attr szIsa [(sign_extend "s") (zero_extend "z")])
(define_code_iterator sh_oprnd [ashift ashiftrt lshiftrt])
(define_code_attr shIsa [(ashift "ll") (ashiftrt "ra") (lshiftrt "rl")])
(define_code_attr shPat [(ashift "ashl") (ashiftrt "ashr") (lshiftrt "lshr")])
(define_code_iterator mima_oprnd [smax umax smin umin])
(define_code_attr mimaIsa [(smax "maxs") (umax "maxu") (smin "mins") (umin "minu")])
;; Addition Instructions
(define_insn "adddi3"
[(set (match_operand:DI 0 "register_operand" "=r,r")
(plus:DI (match_operand:DI 1 "register_operand" "%0,0")
(match_operand:DI 2 "nonmemory_operand" "r,i")))
(clobber (reg:CC CC_REGNUM))]
""
"addd\t%L2, %L1\;addcd\t%H2, %H1"
[(set_attr "length" "4,12")]
)
(define_insn "add<mode>3"
[(set (match_operand:CRXIM 0 "register_operand" "=r,r")
(plus:CRXIM (match_operand:CRXIM 1 "register_operand" "%0,0")
(match_operand:CRXIM 2 "nonmemory_operand" "r,i")))
(clobber (reg:CC CC_REGNUM))]
""
"add<tIsa>\t%2, %0"
[(set_attr "length" "2,<lImmArith>")]
)
;; Subtract Instructions
(define_insn "subdi3"
[(set (match_operand:DI 0 "register_operand" "=r,r")
(minus:DI (match_operand:DI 1 "register_operand" "0,0")
(match_operand:DI 2 "nonmemory_operand" "r,i")))
(clobber (reg:CC CC_REGNUM))]
""
"subd\t%L2, %L1\;subcd\t%H2, %H1"
[(set_attr "length" "4,12")]
)
(define_insn "sub<mode>3"
[(set (match_operand:CRXIM 0 "register_operand" "=r,r")
(minus:CRXIM (match_operand:CRXIM 1 "register_operand" "0,0")
(match_operand:CRXIM 2 "nonmemory_operand" "r,i")))
(clobber (reg:CC CC_REGNUM))]
""
"sub<tIsa>\t%2, %0"
[(set_attr "length" "2,<lImmArith>")]
)
;; Multiply Instructions
(define_insn "mul<mode>3"
[(set (match_operand:CRXIM 0 "register_operand" "=r,r")
(mult:CRXIM (match_operand:CRXIM 1 "register_operand" "%0,0")
(match_operand:CRXIM 2 "nonmemory_operand" "r,i")))
(clobber (reg:CC CC_REGNUM))]
""
"mul<tIsa>\t%2, %0"
[(set_attr "length" "2,<lImmArith>")]
)
;; Widening-multiplication Instructions
(define_insn "<sIsa>mulsidi3"
[(set (match_operand:DI 0 "register_operand" "=k")
(mult:DI (sz_xtnd:DI (match_operand:SI 1 "register_operand" "%r"))
(sz_xtnd:DI (match_operand:SI 2 "register_operand" "r"))))
(clobber (reg:CC CC_REGNUM))]
""
"mull<sPat>d\t%2, %1"
[(set_attr "length" "4")]
)
(define_insn "<sIsa>mulhisi3"
[(set (match_operand:SI 0 "register_operand" "=r")
(mult:SI (sz_xtnd:SI (match_operand:HI 1 "register_operand" "%0"))
(sz_xtnd:SI (match_operand:HI 2 "register_operand" "r"))))
(clobber (reg:CC CC_REGNUM))]
""
"mul<sPat>wd\t%2, %0"
[(set_attr "length" "4")]
)
(define_insn "<sIsa>mulqihi3"
[(set (match_operand:HI 0 "register_operand" "=r")
(mult:HI (sz_xtnd:HI (match_operand:QI 1 "register_operand" "%0"))
(sz_xtnd:HI (match_operand:QI 2 "register_operand" "r"))))
(clobber (reg:CC CC_REGNUM))]
""
"mul<sPat>bw\t%2, %0"
[(set_attr "length" "4")]
)
;; Logical Instructions - and
(define_insn "and<mode>3"
[(set (match_operand:CRXIM 0 "register_operand" "=r,r")
(and:CRXIM (match_operand:CRXIM 1 "register_operand" "%0,0")
(match_operand:CRXIM 2 "nonmemory_operand" "r,i")))
(clobber (reg:CC CC_REGNUM))]
""
"and<tIsa>\t%2, %0"
[(set_attr "length" "2,<lImmArith>")]
)
;; Logical Instructions - or
(define_insn "ior<mode>3"
[(set (match_operand:CRXIM 0 "register_operand" "=r,r")
(ior:CRXIM (match_operand:CRXIM 1 "register_operand" "%0,0")
(match_operand:CRXIM 2 "nonmemory_operand" "r,i")))
(clobber (reg:CC CC_REGNUM))]
""
"or<tIsa>\t%2, %0"
[(set_attr "length" "2,<lImmArith>")]
)
;; Logical Instructions - xor
(define_insn "xor<mode>3"
[(set (match_operand:CRXIM 0 "register_operand" "=r,r")
(xor:CRXIM (match_operand:CRXIM 1 "register_operand" "%0,0")
(match_operand:CRXIM 2 "nonmemory_operand" "r,i")))
(clobber (reg:CC CC_REGNUM))]
""
"xor<tIsa>\t%2, %0"
[(set_attr "length" "2,<lImmArith>")]
)
;; Sign and Zero Extend Instructions
(define_insn "<szPat>extendhisi2"
[(set (match_operand:SI 0 "register_operand" "=r")
(sz_xtnd:SI (match_operand:HI 1 "register_operand" "r")))
(clobber (reg:CC CC_REGNUM))]
""
"<szIsa>extwd\t%1, %0"
[(set_attr "length" "4")]
)
(define_insn "<szPat>extendqisi2"
[(set (match_operand:SI 0 "register_operand" "=r")
(sz_xtnd:SI (match_operand:QI 1 "register_operand" "r")))
(clobber (reg:CC CC_REGNUM))]
""
"<szIsa>extbd\t%1, %0"
[(set_attr "length" "4")]
)
(define_insn "<szPat>extendqihi2"
[(set (match_operand:HI 0 "register_operand" "=r")
(sz_xtnd:HI (match_operand:QI 1 "register_operand" "r")))
(clobber (reg:CC CC_REGNUM))]
""
"<szIsa>extbw\t%1, %0"
[(set_attr "length" "4")]
)
;; Negation Instructions
(define_insn "neg<mode>2"
[(set (match_operand:CRXIM 0 "register_operand" "=r")
(neg:CRXIM (match_operand:CRXIM 1 "register_operand" "r")))
(clobber (reg:CC CC_REGNUM))]
""
"neg<tIsa>\t%1, %0"
[(set_attr "length" "4")]
)
;; Absolute Instructions
(define_insn "abs<mode>2"
[(set (match_operand:CRXIM 0 "register_operand" "=r")
(abs:CRXIM (match_operand:CRXIM 1 "register_operand" "r")))
(clobber (reg:CC CC_REGNUM))]
""
"abs<tIsa>\t%1, %0"
[(set_attr "length" "4")]
)
;; Max and Min Instructions
(define_insn "<code><mode>3"
[(set (match_operand:CRXIM 0 "register_operand" "=r")
(mima_oprnd:CRXIM (match_operand:CRXIM 1 "register_operand" "%0")
(match_operand:CRXIM 2 "register_operand" "r")))]
""
"<mimaIsa><tIsa>\t%2, %0"
[(set_attr "length" "4")]
)
;; One's Complement
(define_insn "one_cmpl<mode>2"
[(set (match_operand:CRXIM 0 "register_operand" "=r")
(not:CRXIM (match_operand:CRXIM 1 "register_operand" "0")))
(clobber (reg:CC CC_REGNUM))]
""
"xor<tIsa>\t$-1, %0"
[(set_attr "length" "2")]
)
;; Rotate Instructions
(define_insn "rotl<mode>3"
[(set (match_operand:CRXIM 0 "register_operand" "=r,r")
(rotate:CRXIM (match_operand:CRXIM 1 "register_operand" "0,0")
(match_operand:CRXIM 2 "nonmemory_operand" "r,<IJK>")))
(clobber (reg:CC CC_REGNUM))]
""
"@
rotl<tIsa>\t%2, %0
rot<tIsa>\t%2, %0"
[(set_attr "length" "4,<lImmRotl>")]
)
(define_insn "rotr<mode>3"
[(set (match_operand:CRXIM 0 "register_operand" "=r")
(rotatert:CRXIM (match_operand:CRXIM 1 "register_operand" "0")
(match_operand:CRXIM 2 "register_operand" "r")))
(clobber (reg:CC CC_REGNUM))]
""
"rotr<tIsa>\t%2, %0"
[(set_attr "length" "4")]
)
;; Arithmetic Left and Right Shift Instructions
(define_insn "<shPat><mode>3"
[(set (match_operand:CRXIM 0 "register_operand" "=r,r")
(sh_oprnd:CRXIM (match_operand:CRXIM 1 "register_operand" "0,0")
(match_operand:QI 2 "nonmemory_operand" "r,<IJK>")))
(clobber (reg:CC CC_REGNUM))]
""
"s<shIsa><tIsa>\t%2, %0"
[(set_attr "length" "2,2")]
)
;; Bit Set Instructions
(define_insn "extv"
[(set (match_operand:SI 0 "register_operand" "=r")
(sign_extract:SI (match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "const_int_operand" "n")
(match_operand:SI 3 "const_int_operand" "n")))]
""
{
static char buf[100];
int strpntr;
int size = INTVAL (operands[2]);
int pos = INTVAL (operands[3]);
strpntr = sprintf (buf, "ram\t$%d, $31, $%d, %%1, %%0\;",
BITS_PER_WORD - (size + pos), BITS_PER_WORD - size);
sprintf (buf + strpntr, "srad\t$%d, %%0", BITS_PER_WORD - size);
return buf;
}
[(set_attr "length" "6")]
)
(define_insn "extzv"
[(set (match_operand:SI 0 "register_operand" "=r")
(zero_extract:SI (match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "const_int_operand" "n")
(match_operand:SI 3 "const_int_operand" "n")))]
""
{
static char buf[40];
int size = INTVAL (operands[2]);
int pos = INTVAL (operands[3]);
sprintf (buf, "ram\t$%d, $%d, $0, %%1, %%0",
(BITS_PER_WORD - pos) % BITS_PER_WORD, size - 1);
return buf;
}
[(set_attr "length" "4")]
)
(define_insn "insv"
[(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r")
(match_operand:SI 1 "const_int_operand" "n")
(match_operand:SI 2 "const_int_operand" "n"))
(match_operand:SI 3 "register_operand" "r"))]
""
{
static char buf[40];
int size = INTVAL (operands[1]);
int pos = INTVAL (operands[2]);
sprintf (buf, "rim\t$%d, $%d, $%d, %%3, %%0",
pos, size + pos - 1, pos);
return buf;
}
[(set_attr "length" "4")]
)
;; Move Instructions
(define_expand "mov<mode>"
[(set (match_operand:ALLMT 0 "nonimmediate_operand" "")
(match_operand:ALLMT 1 "general_operand" ""))]
""
{
if (!(reload_in_progress || reload_completed))
{
if (!register_operand (operands[0], <MODE>mode))
{
if (push_operand (operands[0], <MODE>mode) ?
!nosp_reg_operand (operands[1], <MODE>mode) :
!reg_or_u4bits_operand (operands[1], <MODE>mode))
{
operands[1] = copy_to_mode_reg (<MODE>mode, operands[1]);
}
}
}
}
)
(define_insn "push<mode>_internal"
[(set (match_operand:ALLMT 0 "push_operand" "=<pushCnstr>")
(match_operand:ALLMT 1 "nosp_reg_operand" "b"))]
""
"push\t<tpush>%p1"
[(set_attr "length" "<lpush>")]
)
(define_insn "mov<mode>_regs"
[(set (match_operand:SISFM 0 "register_operand" "=r, r, r, k")
(match_operand:SISFM 1 "nonmemory_operand" "r, <iF>, k, r"))]
""
"@
movd\t%1, %0
movd\t%1, %0
mfpr\t%1, %0
mtpr\t%1, %0"
[(set_attr "length" "2,6,4,4")]
)
(define_insn "mov<mode>_regs"
[(set (match_operand:DIDFM 0 "register_operand" "=r, r, r, k")
(match_operand:DIDFM 1 "nonmemory_operand" "r, <iF>, k, r"))]
""
{
switch (which_alternative)
{
case 0: if (REGNO (operands[0]) > REGNO (operands[1]))
return "movd\t%H1, %H0\;movd\t%L1, %L0";
else
return "movd\t%L1, %L0\;movd\t%H1, %H0";
case 1: return "movd\t%H1, %H0\;movd\t%L1, %L0";
case 2: return "mfpr\t%H1, %H0\;mfpr\t%L1, %L0";
case 3: return "mtpr\t%H1, %H0\;mtpr\t%L1, %L0";
default: gcc_unreachable ();
}
}
[(set_attr "length" "4,12,8,8")]
)
(define_insn "mov<mode>_regs" ; no HI/QI mode in HILO regs
[(set (match_operand:SHORT 0 "register_operand" "=r, r")
(match_operand:SHORT 1 "nonmemory_operand" "r, i"))]
""
"mov<tIsa>\t%1, %0"
[(set_attr "length" "2,<lImmArith>")]
)
(define_insn "mov<mode>_load"
[(set (match_operand:CRXMM 0 "register_operand" "=r")
(match_operand:CRXMM 1 "memory_operand" "m"))]
""
"load<tIsa>\t%1, %0"
[(set_attr "length" "6")]
)
(define_insn "mov<mode>_load"
[(set (match_operand:DIDFM 0 "register_operand" "=r")
(match_operand:DIDFM 1 "memory_operand" "m"))]
""
{
rtx first_dest_reg = gen_rtx_REG (SImode, REGNO (operands[0]));
if (reg_overlap_mentioned_p (first_dest_reg, operands[1]))
return "loadd\t%H1, %H0\;loadd\t%L1, %L0";
return "loadd\t%L1, %L0\;loadd\t%H1, %H0";
}
[(set_attr "length" "12")]
)
(define_insn "mov<mode>_store"
[(set (match_operand:CRXMM 0 "store_operand" "=m, m")
(match_operand:CRXMM 1 "reg_or_u4bits_operand" "r, <JG>"))]
""
"stor<tIsa>\t%1, %0"
[(set_attr "length" "6")]
)
(define_insn "mov<mode>_store"
[(set (match_operand:DIDFM 0 "store_operand" "=m, m")
(match_operand:DIDFM 1 "reg_or_u4bits_operand" "r, <JG>"))]
""
"stord\t%H1, %H0\;stord\t%L1, %L0"
[(set_attr "length" "12")]
)
;; Movmem Instruction
(define_expand "movmemsi"
[(use (match_operand:BLK 0 "memory_operand" ""))
(use (match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:SI 2 "nonmemory_operand" ""))
(use (match_operand:SI 3 "const_int_operand" ""))]
""
{
if (crx_expand_movmem (operands[0], operands[1], operands[2], operands[3]))
DONE;
else
FAIL;
}
)
;; Compare and Branch Instructions
(define_insn "cbranchcc4"
[(set (pc)
(if_then_else (match_operator 0 "ordered_comparison_operator"
[(match_operand:CC 1 "cc_reg_operand" "r")
(match_operand 2 "cst4_operand" "L")])
(label_ref (match_operand 3 ""))
(pc)))]
""
"b%d0\t%l3"
[(set_attr "length" "6")]
)
(define_insn "cbranch<mode>4"
[(set (pc)
(if_then_else (match_operator 0 "ordered_comparison_operator"
[(match_operand:CRXIM 1 "register_operand" "r")
(match_operand:CRXIM 2 "reg_or_cst4_operand" "rL")])
(label_ref (match_operand 3 "" ""))
(pc)))
(clobber (reg:CC CC_REGNUM))]
""
"cmpb%d0<tIsa>\t%2, %1, %l3"
[(set_attr "length" "6")]
)
;; Scond Instructions
(define_expand "cstore<mode>4"
[(set (reg:CC CC_REGNUM)
(compare:CC (match_operand:CRXIM 2 "register_operand" "")
(match_operand:CRXIM 3 "nonmemory_operand" "")))
(set (match_operand:SI 0 "register_operand")
(match_operator:SI 1 "ordered_comparison_operator"
[(reg:CC CC_REGNUM) (const_int 0)]))]
""
""
)
(define_insn "cmp<mode>_internal"
[(set (reg:CC CC_REGNUM)
(compare:CC (match_operand:CRXIM 0 "register_operand" "r,r")
(match_operand:CRXIM 1 "nonmemory_operand" "r,i")))]
""
"cmp<tIsa>\t%1, %0"
[(set_attr "length" "2,<lImmArith>")]
)
(define_insn "sCOND_internal"
[(set (match_operand:SI 0 "register_operand" "=r")
(match_operator:SI 1 "ordered_comparison_operator"
[(reg:CC CC_REGNUM) (const_int 0)]))]
""
"s%d1\t%0"
[(set_attr "length" "2")]
)
;; Jumps and Branches
(define_insn "indirect_jump_return"
[(parallel
[(set (pc)
(reg:SI RA_REGNUM))
(return)])
]
"reload_completed"
"jump\tra"
[(set_attr "length" "2")]
)
(define_insn "indirect_jump"
[(set (pc)
(match_operand:SI 0 "reg_or_sym_operand" "r,i"))]
""
"@
jump\t%0
br\t%a0"
[(set_attr "length" "2,6")]
)
(define_insn "interrupt_return"
[(parallel
[(unspec_volatile [(const_int 0)] 0)
(return)])]
""
{
return crx_prepare_push_pop_string (1);
}
[(set_attr "length" "14")]
)
(define_insn "jump_to_imm"
[(set (pc)
(match_operand 0 "immediate_operand" "i"))]
""
"br\t%c0"
[(set_attr "length" "6")]
)
(define_insn "jump"
[(set (pc)
(label_ref (match_operand 0 "" "")))]
""
"br\t%l0"
[(set_attr "length" "6")]
)
;; Function Prologue and Epilogue
(define_expand "prologue"
[(const_int 0)]
""
{
crx_expand_prologue ();
DONE;
}
)
(define_insn "push_for_prologue"
[(parallel
[(set (reg:SI SP_REGNUM)
(minus:SI (reg:SI SP_REGNUM)
(match_operand:SI 0 "immediate_operand" "i")))])]
"reload_completed"
{
return crx_prepare_push_pop_string (0);
}
[(set_attr "length" "4")]
)
(define_expand "epilogue"
[(return)]
""
{
crx_expand_epilogue ();
DONE;
}
)
(define_insn "pop_and_popret_return"
[(parallel
[(set (reg:SI SP_REGNUM)
(plus:SI (reg:SI SP_REGNUM)
(match_operand:SI 0 "immediate_operand" "i")))
(use (reg:SI RA_REGNUM))
(return)])
]
"reload_completed"
{
return crx_prepare_push_pop_string (1);
}
[(set_attr "length" "4")]
)
(define_insn "popret_RA_return"
[(parallel
[(use (reg:SI RA_REGNUM))
(return)])
]
"reload_completed"
"popret\tra"
[(set_attr "length" "2")]
)
;; Table Jump
(define_insn "tablejump"
[(set (pc)
(match_operand:SI 0 "register_operand" "r"))
(use (label_ref:SI (match_operand 1 "" "" )))]
""
"jump\t%0"
[(set_attr "length" "2")]
)
;; Call Instructions
(define_expand "call"
[(call (match_operand:QI 0 "memory_operand" "")
(match_operand 1 "" ""))]
""
{
emit_call_insn (gen_crx_call (operands[0], operands[1]));
DONE;
}
)
(define_expand "crx_call"
[(parallel
[(call (match_operand:QI 0 "memory_operand" "")
(match_operand 1 "" ""))
(clobber (reg:SI RA_REGNUM))])]
""
""
)
(define_insn "crx_call_insn_branch"
[(call (mem:QI (match_operand:SI 0 "immediate_operand" "i"))
(match_operand 1 "" ""))
(clobber (match_operand:SI 2 "register_operand" "+r"))]
""
"bal\tra, %a0"
[(set_attr "length" "6")]
)
(define_insn "crx_call_insn_jump"
[(call (mem:QI (match_operand:SI 0 "register_operand" "r"))
(match_operand 1 "" ""))
(clobber (match_operand:SI 2 "register_operand" "+r"))]
""
"jal\t%0"
[(set_attr "length" "2")]
)
(define_insn "crx_call_insn_jalid"
[(call (mem:QI (mem:SI (plus:SI
(match_operand:SI 0 "register_operand" "r")
(match_operand:SI 1 "register_operand" "r"))))
(match_operand 2 "" ""))
(clobber (match_operand:SI 3 "register_operand" "+r"))]
""
"jalid\t%0, %1"
[(set_attr "length" "4")]
)
;; Call Value Instructions
(define_expand "call_value"
[(set (match_operand 0 "general_operand" "")
(call (match_operand:QI 1 "memory_operand" "")
(match_operand 2 "" "")))]
""
{
emit_call_insn (gen_crx_call_value (operands[0], operands[1], operands[2]));
DONE;
}
)
(define_expand "crx_call_value"
[(parallel
[(set (match_operand 0 "general_operand" "")
(call (match_operand 1 "memory_operand" "")
(match_operand 2 "" "")))
(clobber (reg:SI RA_REGNUM))])]
""
""
)
(define_insn "crx_call_value_insn_branch"
[(set (match_operand 0 "" "=g")
(call (mem:QI (match_operand:SI 1 "immediate_operand" "i"))
(match_operand 2 "" "")))
(clobber (match_operand:SI 3 "register_operand" "+r"))]
""
"bal\tra, %a1"
[(set_attr "length" "6")]
)
(define_insn "crx_call_value_insn_jump"
[(set (match_operand 0 "" "=g")
(call (mem:QI (match_operand:SI 1 "register_operand" "r"))
(match_operand 2 "" "")))
(clobber (match_operand:SI 3 "register_operand" "+r"))]
""
"jal\t%1"
[(set_attr "length" "2")]
)
(define_insn "crx_call_value_insn_jalid"
[(set (match_operand 0 "" "=g")
(call (mem:QI (mem:SI (plus:SI
(match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "register_operand" "r"))))
(match_operand 3 "" "")))
(clobber (match_operand:SI 4 "register_operand" "+r"))]
""
"jalid\t%0, %1"
[(set_attr "length" "4")]
)
;; Nop
(define_insn "nop"
[(const_int 0)]
""
""
)
;; Multiply and Accumulate Instructions
(define_insn "<sPat>madsidi3"
[(set (match_operand:DI 0 "register_operand" "+k")
(plus:DI
(mult:DI (sz_xtnd:DI (match_operand:SI 1 "register_operand" "%r"))
(sz_xtnd:DI (match_operand:SI 2 "register_operand" "r")))
(match_dup 0)))
(clobber (reg:CC CC_REGNUM))]
"TARGET_MAC"
"mac<sPat>d\t%2, %1"
[(set_attr "length" "4")]
)
(define_insn "<sPat>madhisi3"
[(set (match_operand:SI 0 "register_operand" "+l")
(plus:SI
(mult:SI (sz_xtnd:SI (match_operand:HI 1 "register_operand" "%r"))
(sz_xtnd:SI (match_operand:HI 2 "register_operand" "r")))
(match_dup 0)))
(clobber (reg:CC CC_REGNUM))]
"TARGET_MAC"
"mac<sPat>w\t%2, %1"
[(set_attr "length" "4")]
)
(define_insn "<sPat>madqihi3"
[(set (match_operand:HI 0 "register_operand" "+l")
(plus:HI
(mult:HI (sz_xtnd:HI (match_operand:QI 1 "register_operand" "%r"))
(sz_xtnd:HI (match_operand:QI 2 "register_operand" "r")))
(match_dup 0)))
(clobber (reg:CC CC_REGNUM))]
"TARGET_MAC"
"mac<sPat>b\t%2, %1"
[(set_attr "length" "4")]
)
;; Loop Instructions
(define_expand "doloop_end"
[(use (match_operand 0 "" "")) ; loop pseudo
(use (match_operand 1 "" "")) ; iterations; zero if unknown
(use (match_operand 2 "" "")) ; max iterations
(use (match_operand 3 "" "")) ; loop level
(use (match_operand 4 "" ""))] ; label
""
{
if (INTVAL (operands[3]) > crx_loop_nesting)
FAIL;
switch (GET_MODE (operands[0]))
{
case SImode:
emit_jump_insn (gen_doloop_end_si (operands[4], operands[0]));
break;
case HImode:
emit_jump_insn (gen_doloop_end_hi (operands[4], operands[0]));
break;
case QImode:
emit_jump_insn (gen_doloop_end_qi (operands[4], operands[0]));
break;
default:
FAIL;
}
DONE;
}
)
; CRX dbnz[bwd] used explicitly (see above) but also by the combiner.
(define_insn "doloop_end_<mode>"
[(set (pc)
(if_then_else (ne (match_operand:CRXIM 1 "register_operand" "+r,!m")
(const_int 1))
(label_ref (match_operand 0 "" ""))
(pc)))
(set (match_dup 1) (plus:CRXIM (match_dup 1) (const_int -1)))
(clobber (match_scratch:CRXIM 2 "=X,r"))
(clobber (reg:CC CC_REGNUM))]
""
"@
dbnz<tIsa>\t%1, %l0
load<tIsa>\t%1, %2\;add<tIsa>\t$-1, %2\;stor<tIsa>\t%2, %1\;bne\t%l0"
[(set_attr "length" "6, 12")]
)

34
gcc/config/crx/crx.opt
View file

@ -1,34 +0,0 @@
; Options for the National Semiconductor CRX port of the compiler.
; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
; for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3. If not see
; <http://www.gnu.org/licenses/>.
mmac
Target Report Mask(MAC)
Support multiply accumulate instructions
mno-push-args
Target Report RejectNegative Mask(NO_PUSH_ARGS)
Do not use push to store function arguments
mloop-nesting=
Common RejectNegative Joined UInteger Var(crx_loop_nesting) Init(12)
Restrict doloop to the given nesting level
mdebug-addr
Target RejectNegative Var(TARGET_DEBUG_ADDR) Undocumented

37
gcc/config/crx/t-crx
View file

@ -1,37 +0,0 @@
# CRX Target Makefile
#
# Copyright (C) 2005 Free Software Foundation, Inc.
#
# This file is part of GCC.
#
# GCC is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3, or (at your option)
# any later version.
#
# GCC is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
# Mingw specific compilation fixes
USE_COLLECT2 =
STMP_FIXINC =
# Software emulation for integer div and mod
LIB2FUNCS_EXTRA = $(srcdir)/config/udivmodsi4.c $(srcdir)/config/udivmod.c $(srcdir)/config/divmod.c
# Build the floating point emulation libraries.
FPBIT = fp-bit.c
DPBIT = dp-bit.c
fp-bit.c: $(srcdir)/config/fp-bit.c
echo '#define FLOAT' > fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c
dp-bit.c: $(srcdir)/config/fp-bit.c
cat $(srcdir)/config/fp-bit.c > dp-bit.c

96
gcc/config/i386/netbsd.h
View file

@ -1,96 +0,0 @@
/* Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
2004 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
#define TARGET_OS_CPP_BUILTINS() \
do \
{ \
NETBSD_OS_CPP_BUILTINS_AOUT(); \
} \
while (0)
#define TARGET_VERSION fprintf (stderr, " (NetBSD/i386 a.out)");
/* This goes away when the math-emulator is fixed */
#undef TARGET_SUBTARGET_DEFAULT
#define TARGET_SUBTARGET_DEFAULT \
(MASK_80387 | MASK_IEEE_FP | MASK_FLOAT_RETURNS | MASK_NO_FANCY_MATH_387)
#undef SUBTARGET_EXTRA_SPECS
#define SUBTARGET_EXTRA_SPECS \
{ "netbsd_cpp_spec", NETBSD_CPP_SPEC },
#undef CPP_SPEC
#define CPP_SPEC "%(netbsd_cpp_spec)"
#undef SIZE_TYPE
#define SIZE_TYPE "unsigned int"
#undef PTRDIFF_TYPE
#define PTRDIFF_TYPE "int"
#undef ASM_APP_ON
#define ASM_APP_ON "#APP\n"
#undef ASM_APP_OFF
#define ASM_APP_OFF "#NO_APP\n"
/* Don't default to pcc-struct-return, because gcc is the only compiler, and
we want to retain compatibility with older gcc versions. */
#define DEFAULT_PCC_STRUCT_RETURN 0
/* i386 netbsd still uses old binutils that don't insert nops by default
when the .align directive demands to insert extra space in the text
segment. */
#undef ASM_OUTPUT_ALIGN
#define ASM_OUTPUT_ALIGN(FILE,LOG) \
if ((LOG)!=0) fprintf ((FILE), "\t.align %d,0x90\n", (LOG))
/* Profiling routines, partially copied from i386/osfrose.h. */
/* Redefine this to use %eax instead of %edx. */
#undef FUNCTION_PROFILER
#define FUNCTION_PROFILER(FILE, LABELNO) \
{ \
if (flag_pic) \
{ \
fprintf (FILE, "\tcall mcount@PLT\n"); \
} \
else \
{ \
fprintf (FILE, "\tcall mcount\n"); \
} \
}
/* Until they use ELF or something that handles dwarf2 unwinds
and initialization stuff better. */
#define DWARF2_UNWIND_INFO 0
/* Redefine this so that it becomes "_GLOBAL_OFFSET_TABLE_" when the label
prefix is added. */
#undef GOT_SYMBOL_NAME
#define GOT_SYMBOL_NAME "GLOBAL_OFFSET_TABLE_"
/* Attempt to enable execute permissions on the stack. */
#define ENABLE_EXECUTE_STACK NETBSD_ENABLE_EXECUTE_STACK

1333
gcc/config/m68hc11/larith.asm
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86
gcc/config/m68hc11/m68hc11-crt0.S
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@ -1,86 +0,0 @@
/* Startup code for M68HC11.
Copyright (C) 1999, 2000, 2002, 2008, 2009 Free Software Foundation, Inc.
This file is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
Free Software Foundation; either version 3, or (at your option) any
later version.
This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
;-----------------------------------------
; startup code
;-----------------------------------------
#ifdef __HAVE_SHORT_INT__
.mode mshort
#else
.mode mlong
#endif
#if defined(__USE_RTC__) && defined(mc68hc12)
.macro jsr name
call \name
.endm
#endif
;;
;;
;; The linker concatenate the .install* sections in the following order:
;;
;; .install0 Setup the stack pointer
;; .install1 Place holder for applications
;; .install2 Optional installation of data section in memory
;; .install3 Place holder for applications
;; .install4 Invokes the main
;;
.sect .install0,"ax",@progbits
.globl _start
_start:
;;
;; At this step, the stack is not initialized and interrupts are masked.
;; Applications only have 64 cycles to initialize some registers.
;;
;; To have a generic/configurable startup, initialize the stack to
;; the end of some memory region. The _stack symbol is defined by
;; the linker.
;;
lds #_stack
.sect .install2,"ax",@progbits
;;
;; Call a specific initialization operation. The default is empty.
;; It can be overridden by applications. It is intended to initialize
;; the 68hc11 registers. Function prototype is:
;;
;; int __premain(void);
;;
jsr __premain
;;
;;
;;
.sect .install4,"ax",@progbits
jsr main
fatal:
jsr exit
bra fatal
;-----------------------------------------
; end startup code
;-----------------------------------------
;; Force loading of data section mapping and bss clear
.2byte __map_data_section
.2byte __init_bss_section

109
gcc/config/m68hc11/m68hc11-protos.h
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@ -1,109 +0,0 @@
/* Prototypes for exported functions defined in m68hc11.c
Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2009, 2010
Free Software Foundation, Inc.
Contributed by Stephane Carrez (stcarrez@nerim.fr)
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
extern int hard_regno_mode_ok (int, enum machine_mode);
extern int m68hc11_hard_regno_rename_ok (int, int);
extern int m68hc11_total_frame_size (void);
extern int m68hc11_initial_frame_pointer_offset (void);
extern int m68hc11_initial_elimination_offset (int, int);
extern void expand_prologue (void);
extern void expand_epilogue (void);
#ifdef RTX_CODE
extern int m68hc11_auto_inc_p (rtx);
extern rtx m68hc11_expand_compare_and_branch (enum rtx_code, rtx, rtx, rtx);
extern enum reg_class preferred_reload_class (rtx, enum reg_class);
extern void m68hc11_notice_update_cc (rtx, rtx);
extern void m68hc11_notice_keep_cc (rtx);
extern void m68hc11_gen_movqi (rtx, rtx*);
extern void m68hc11_gen_movhi (rtx, rtx*);
extern void m68hc11_gen_rotate (enum rtx_code, rtx, rtx*);
extern void m68hc11_output_swap (rtx, rtx*);
extern int next_insn_test_reg (rtx, rtx);
extern int m68hc11_reload_operands (rtx*);
extern int dead_register_here (rtx, rtx);
extern int push_pop_operand_p (rtx);
extern void m68hc11_split_move (rtx, rtx, rtx);
extern void m68hc11_split_compare_and_branch (enum rtx_code,
rtx, rtx, rtx);
extern rtx m68hc11_gen_lowpart (enum machine_mode, rtx);
extern rtx m68hc11_gen_highpart (enum machine_mode, rtx);
#ifdef HAVE_MACHINE_MODES
extern int m68hc11_memory_move_cost (enum machine_mode, enum reg_class, int);
extern int m68hc11_register_move_cost (enum machine_mode,
enum reg_class, enum reg_class);
extern void m68hc11_emit_libcall (const char*, enum rtx_code,
enum machine_mode, enum machine_mode,
int, rtx*);
extern int m68hc11_small_indexed_indirect_p (rtx, enum machine_mode);
extern int m68hc11_symbolic_p (rtx, enum machine_mode);
extern int m68hc11_indirect_p (rtx, enum machine_mode);
extern int go_if_legitimate_address2 (rtx, enum machine_mode, int);
extern int reg_or_indexed_operand (rtx,enum machine_mode);
extern int memory_indexed_operand (rtx, enum machine_mode);
#ifdef RTX_CODE
extern void m68hc11_split_logical (enum machine_mode, enum rtx_code, rtx*);
#endif
extern int m68hc11_register_indirect_p (rtx, enum machine_mode);
extern int m68hc11_valid_addressing_p (rtx, enum machine_mode, int);
extern int symbolic_memory_operand (rtx, enum machine_mode);
extern int memory_reload_operand (rtx, enum machine_mode);
extern int arith_src_operand (rtx, enum machine_mode);
extern int soft_reg_operand (rtx, enum machine_mode);
extern void m68hc11_init_cumulative_args (CUMULATIVE_ARGS*, tree, rtx);
#ifdef ARGS_SIZE_RTX
extern enum direction m68hc11_function_arg_padding (enum machine_mode,
const_tree);
#endif
extern void m68hc11_function_epilogue (FILE*,int);
extern int m68hc11_is_far_symbol (rtx);
extern int m68hc11_is_trap_symbol (rtx);
extern int m68hc11_page0_symbol_p (rtx x);
extern HOST_WIDE_INT m68hc11_min_offset;
extern HOST_WIDE_INT m68hc11_max_offset;
extern int m68hc11_addr_mode;
#endif /* HAVE_MACHINE_MODES */
#endif /* RTX_CODE */

5588
gcc/config/m68hc11/m68hc11.c
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File diff suppressed because it is too large Load diff

1382
gcc/config/m68hc11/m68hc11.h
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File diff suppressed because it is too large Load diff

7579
gcc/config/m68hc11/m68hc11.md
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File diff suppressed because it is too large Load diff

94
gcc/config/m68hc11/m68hc11.opt
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@ -1,94 +0,0 @@
; Options for the Motorola 68HC11 and 68HC12 port of the compiler.
; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
; for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3. If not see
; <http://www.gnu.org/licenses/>.
m6811
Target RejectNegative InverseMask(M6812, M6811)
Compile for a 68HC11
m6812
Target RejectNegative Mask(M6812)
Compile for a 68HC12
m68hc11
Target RejectNegative InverseMask(M6812)
Compile for a 68HC11
m68hc12
Target RejectNegative Mask(M6812) MaskExists
Compile for a 68HC12
; At the moment, there is no difference between the code generated
; for -m68hc12 and -m68hcs12.
m68hcs12
Target RejectNegative Mask(M6812) MaskExists
Compile for a 68HCS12
m68s12
Target RejectNegative Mask(M6812) MaskExists
Compile for a 68HCS12
mauto-incdec
Target RejectNegative Report Mask(AUTO_INC_DEC)
Auto pre/post decrement increment allowed
minmax
Target RejectNegative Report Mask(MIN_MAX)
Min/max instructions allowed
mlong-calls
Target RejectNegative Report Mask(LONG_CALLS)
Use call and rtc for function calls and returns
mnoauto-incdec
Target RejectNegative Report InverseMask(AUTO_INC_DEC)
Auto pre/post decrement increment not allowed
mnolong-calls
Target RejectNegative Report InverseMask(LONG_CALLS)
Use jsr and rts for function calls and returns
mnominmax
Target RejectNegative Report InverseMask(MIN_MAX)
Min/max instructions not allowed
mnorelax
Target RejectNegative Report InverseMask(NO_DIRECT_MODE)
Use direct addressing mode for soft registers
mnoshort
Target RejectNegative Report InverseMask(SHORT)
Compile with 32-bit integer mode
; Currently ignored.
mreg-alloc=
Target RejectNegative Joined
Specify the register allocation order
mrelax
Target RejectNegative Report Mask(NO_DIRECT_MODE)
Do not use direct addressing mode for soft registers
mshort
Target RejectNegative Report Mask(SHORT)
Compile with 16-bit integer mode
msoft-reg-count=
Target RejectNegative Joined UInteger Var(m68hc11_soft_reg_count) Init(-1)
Indicate the number of soft registers available

45
gcc/config/m68hc11/m68hc12.h
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@ -1,45 +0,0 @@
/* Definitions of target machine for GNU compiler, for m68hc12.
Copyright (C) 1999, 2000, 2001, 2003, 2007 Free Software Foundation, Inc.
Contributed by Stephane Carrez (stcarrez@nerim.fr).
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* Compile and assemble for a 68hc12 unless there is a -m68hc11 option. */
#define ASM_SPEC \
"%{m68hc11:-m68hc11}" \
"%{m68hcs12:-m68hcs12}" \
"%{!m68hc11:%{!m68hcs12:-m68hc12}}"
#define LIB_SPEC ""
#define CC1_SPEC ""
/* We need to tell the linker the target elf format. Just pass an
emulation option. This can be overridden by -Wl option of gcc. */
#define LINK_SPEC \
"%{m68hc11:-m m68hc11elf}" \
"%{m68hcs12:-m m68hc12elf}" \
"%{!m68hc11:%{!m68hcs12:-m m68hc11elf}} %{mrelax:-relax}"
#define CPP_SPEC \
"%{mshort:-D__HAVE_SHORT_INT__ -D__INT__=16}\
%{!mshort:-D__INT__=32}\
%{m68hc11:-Dmc6811 -DMC6811 -Dmc68hc11}\
%{!m68hc11:%{!m68hc12:-Dmc6812 -DMC6812 -Dmc68hc12}}\
%{m68hcs12:-Dmc6812 -DMC6812 -Dmc68hcs12}\
%{fshort-double:-D__HAVE_SHORT_DOUBLE__}"
/* Default target_flags if no switches specified. */
#define TARGET_DEFAULT (MASK_M6812)

228
gcc/config/m68hc11/predicates.md
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@ -1,228 +0,0 @@
;; Predicate definitions for Motorola 68HC11 and 68HC12.
;; Copyright (C) 2005, 2007, 2009 Free Software Foundation, Inc.
;;
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify
;; it under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.
;;
;; GCC is distributed in the hope that it will be useful,
;; but WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;; GNU General Public License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>.
;; TODO: Add a comment here.
(define_predicate "stack_register_operand"
(match_code "subreg,reg")
{
return SP_REG_P (op);
})
;; TODO: Add a comment here.
(define_predicate "d_register_operand"
(match_code "subreg,reg")
{
if (GET_MODE (op) != mode && mode != VOIDmode)
return 0;
if (GET_CODE (op) == SUBREG)
op = XEXP (op, 0);
return GET_CODE (op) == REG
&& (REGNO (op) >= FIRST_PSEUDO_REGISTER
|| REGNO (op) == HARD_D_REGNUM
|| (mode == QImode && REGNO (op) == HARD_B_REGNUM));
})
;; TODO: Add a comment here.
(define_predicate "hard_addr_reg_operand"
(match_code "subreg,reg")
{
if (GET_MODE (op) != mode && mode != VOIDmode)
return 0;
if (GET_CODE (op) == SUBREG)
op = XEXP (op, 0);
return GET_CODE (op) == REG
&& (REGNO (op) == HARD_X_REGNUM
|| REGNO (op) == HARD_Y_REGNUM
|| REGNO (op) == HARD_Z_REGNUM);
})
;; TODO: Add a comment here.
(define_predicate "hard_reg_operand"
(match_code "subreg,reg")
{
if (GET_MODE (op) != mode && mode != VOIDmode)
return 0;
if (GET_CODE (op) == SUBREG)
op = XEXP (op, 0);
return GET_CODE (op) == REG
&& (REGNO (op) >= FIRST_PSEUDO_REGISTER
|| H_REGNO_P (REGNO (op)));
})
;; TODO: Add a comment here.
(define_predicate "m68hc11_logical_operator"
(match_code "and,ior,xor")
{
return GET_CODE (op) == AND || GET_CODE (op) == IOR || GET_CODE (op) == XOR;
})
;; TODO: Add a comment here.
(define_predicate "m68hc11_arith_operator"
(match_code "and,ior,xor,plus,minus,ashift,ashiftrt,lshiftrt,rotate,rotatert")
{
return GET_CODE (op) == AND || GET_CODE (op) == IOR || GET_CODE (op) == XOR
|| GET_CODE (op) == PLUS || GET_CODE (op) == MINUS
|| GET_CODE (op) == ASHIFT || GET_CODE (op) == ASHIFTRT
|| GET_CODE (op) == LSHIFTRT || GET_CODE (op) == ROTATE
|| GET_CODE (op) == ROTATERT;
})
;; TODO: Add a comment here.
(define_predicate "m68hc11_non_shift_operator"
(match_code "and,ior,xor,plus,minus")
{
return GET_CODE (op) == AND || GET_CODE (op) == IOR || GET_CODE (op) == XOR
|| GET_CODE (op) == PLUS || GET_CODE (op) == MINUS;
})
;; TODO: Add a comment here.
(define_predicate "m68hc11_unary_operator"
(match_code "neg,not,sign_extend,zero_extend")
{
return GET_CODE (op) == NEG || GET_CODE (op) == NOT
|| GET_CODE (op) == SIGN_EXTEND || GET_CODE (op) == ZERO_EXTEND;
})
;; Return true if op is a shift operator.
(define_predicate "m68hc11_shift_operator"
(match_code "ashift,ashiftrt,lshiftrt,rotate,rotatert")
{
return GET_CODE (op) == ROTATE || GET_CODE (op) == ROTATERT
|| GET_CODE (op) == LSHIFTRT || GET_CODE (op) == ASHIFT
|| GET_CODE (op) == ASHIFTRT;
})
;; TODO: Add a comment here.
(define_predicate "m68hc11_eq_compare_operator"
(match_code "eq,ne")
{
return GET_CODE (op) == EQ || GET_CODE (op) == NE;
})
;; TODO: Add a comment here.
(define_predicate "non_push_operand"
(match_code "subreg,reg,mem")
{
if (general_operand (op, mode) == 0)
return 0;
if (push_operand (op, mode) == 1)
return 0;
return 1;
})
;; TODO: Add a comment here.
(define_predicate "splitable_operand"
(match_code "subreg,reg,mem,symbol_ref,label_ref,const_int,const_double")
{
if (general_operand (op, mode) == 0)
return 0;
if (push_operand (op, mode) == 1)
return 0;
/* Reject a (MEM (MEM X)) because the patterns that use non_push_operand
need to split such addresses to access the low and high part but it
is not possible to express a valid address for the low part. */
if (mode != QImode && GET_CODE (op) == MEM
&& GET_CODE (XEXP (op, 0)) == MEM)
return 0;
return 1;
})
;; TODO: Add a comment here.
(define_predicate "reg_or_some_mem_operand"
(match_code "subreg,reg,mem")
{
if (GET_CODE (op) == MEM)
{
rtx op0 = XEXP (op, 0);
int addr_mode;
if (symbolic_memory_operand (op0, mode))
return 1;
if (IS_STACK_PUSH (op))
return 1;
if (GET_CODE (op) == REG && reload_in_progress
&& REGNO (op) >= FIRST_PSEUDO_REGISTER
&& reg_equiv_memory_loc[REGNO (op)])
{
op = reg_equiv_memory_loc[REGNO (op)];
op = eliminate_regs (op, VOIDmode, NULL_RTX);
}
if (GET_CODE (op) != MEM)
return 0;
op0 = XEXP (op, 0);
addr_mode = m68hc11_addr_mode | (reload_completed ? ADDR_STRICT : 0);
addr_mode &= ~ADDR_INDIRECT;
return m68hc11_valid_addressing_p (op0, mode, addr_mode);
}
return register_operand (op, mode);
})
;; TODO: Add a comment here.
(define_predicate "tst_operand"
(match_code "subreg,reg,mem")
{
if (GET_CODE (op) == MEM && reload_completed == 0)
{
rtx addr = XEXP (op, 0);
if (m68hc11_auto_inc_p (addr))
return 0;
}
return nonimmediate_operand (op, mode);
})
;; TODO: Add a comment here.
(define_predicate "cmp_operand"
(match_code "subreg,reg,mem,symbol_ref,label_ref,const_int,const_double")
{
if (GET_CODE (op) == MEM)
{
rtx addr = XEXP (op, 0);
if (m68hc11_auto_inc_p (addr))
return 0;
}
return general_operand (op, mode);
})

96
gcc/config/m68hc11/t-m68hc11
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@ -1,96 +0,0 @@
# Copyright (C) 2000, 2001, 2002, 2003, 2005,
# 2008 Free Software Foundation, Inc.
#
# This file is part of GCC.
#
# GCC is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3, or (at your option)
# any later version.
#
# GCC is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
RANLIB_FOR_TARGET = ` \
if [ -f $(objdir)/../binutils/ranlib ] ; then \
echo $(objdir)/../binutils/ranlib ; \
else \
if [ "$(host)" = "$(target)" ] ; then \
echo ranlib; \
else \
if [ -f $(bindir)/$(target_noncanonical)-ranlib ] ; then \
echo $(bindir)/$(target_noncanonical)-ranlib ; \
else \
t='$(program_transform_cross_name)'; echo ranlib | sed -e $$t ; \
fi; \
fi; \
fi`
LIB1ASMSRC = m68hc11/larith.asm
LIB1ASMFUNCS = _mulsi3 \
_mulqi3 _ashlsi3 _ashrsi3 _lshrsi3 \
_divmodhi4 _mulhi3 _mulhi32 \
_memcpy _memset _negsi2 _one_cmplsi2 \
_regs_min _regs_frame _regs_d1_2 \
_regs_d3_4 _regs_d5_6 _regs_d7_8 _regs_d9_16 _regs_d17_32 \
_premain __exit _abort _cleanup \
_adddi3 _subdi3 _notdi2 _rotlhi3 _rotrhi3 \
_ashrhi3 _lshrhi3 _lshlhi3 _ashrqi3 _lshlqi3 _map_data _init_bss \
_ctor _dtor _far_tramp _call_far _return_far
TARGET_LIBGCC2_CFLAGS = -DUSE_GAS -DIN_GCC -Dinhibit_libc
# C implementation of 32-bit div/mod.
LIB2FUNCS_EXTRA = $(srcdir)/config/udivmodsi4.c \
$(srcdir)/config/divmod.c $(srcdir)/config/udivmod.c
# Don't compile with -g1 this reduces the size of some sections (.eh_frame).
LIBGCC2_DEBUG_CFLAGS =-g
LIBGCC2_CFLAGS = -Os -mrelax $(LIBGCC2_INCLUDES) $(TARGET_LIBGCC2_CFLAGS) $(LIBGCC2_DEBUG_CFLAGS) $(GTHREAD_FLAGS) -DIN_LIBGCC2
MULTILIB_OPTIONS = m68hc11/m68hc12 mshort fshort-double
MULTILIB_DIRNAMES =
MULTILIB_MATCHES = m68hc11=m6811 m68hc12=m6812 m68hc12=m68hcs12
MULTILIB_EXCEPTIONS = -mnoshort -mno68hc11
LIBGCC = stmp-multilib
INSTALL_LIBGCC = install-multilib
# We want fine grained libraries, so use the new code to build the
# floating point emulation libraries.
FPBIT = fp-bit.c
DPBIT = dp-bit.c
dp-bit.c: $(srcdir)/config/fp-bit.c
echo '#define SMALL_MACHINE' >> dp-bit.c
echo '#define CMPtype HItype' >> dp-bit.c
echo '#ifdef __LITTLE_ENDIAN__' >> dp-bit.c
echo '#define FLOAT_BIT_ORDER_MISMATCH' >>dp-bit.c
echo '#endif' >> dp-bit.c
cat $(srcdir)/config/fp-bit.c >> dp-bit.c
fp-bit.c: $(srcdir)/config/fp-bit.c
echo '#define FLOAT' > fp-bit.c
echo '#define CMPtype HItype' >> fp-bit.c
echo '#define SMALL_MACHINE' >> fp-bit.c
echo '#ifdef __LITTLE_ENDIAN__' >> fp-bit.c
echo '#define FLOAT_BIT_ORDER_MISMATCH' >>fp-bit.c
echo '#endif' >> fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c
CRT0_S = $(srcdir)/config/m68hc11/m68hc11-crt0.S
MCRT0_S= $(srcdir)/config/m68hc11/m68hc11-crt0.S
CRT0STUFF_T_CFLAGS =
# Assemble startup files.
$(T)crt1.o: $(CRT0_S) $(GCC_PASSES)
$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)crt1.o -x assembler-with-cpp $(CRT0_S)
EXTRA_MULTILIB_PARTS = crt1.o

70
gcc/config/m68k/uclinux-oldabi.h
View file

@ -1,70 +0,0 @@
/* Definitions of target machine for GCC. m68k/ColdFire based uClinux system
using ELF objects with special linker post-processing to produce FLAT
executables.
Copyright (C) 2003, 2007 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* The old uClinux ABI used 80-byte "long double"s for ColdFire too. */
#undef LONG_DOUBLE_TYPE_SIZE
#define LONG_DOUBLE_TYPE_SIZE 80
#undef LIBGCC2_LONG_DOUBLE_TYPE_SIZE
#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 80
/* Undo the definition of STARTFILE_SPEC from m68kelf.h so we'll
pick the default from gcc.c (just link crt0.o from multilib dir). */
#undef STARTFILE_SPEC
/* Override the default LIB_SPEC from gcc.c. We don't currently support
profiling, or libg.a. */
#undef LIB_SPEC
#define LIB_SPEC "\
%{mid-shared-library:-R libc.gdb%s -elf2flt -shared-lib-id 0} -lc \
"
/* we don't want a .eh_frame section. */
#define EH_FRAME_IN_DATA_SECTION
/* ??? Quick hack to get constructors working. Make this look more like a
COFF target, so the existing dejagnu/libgloss support works. A better
solution would be to make the necessary dejagnu and libgloss changes so
that we can use normal the ELF constructor mechanism. */
#undef INIT_SECTION_ASM_OP
#undef FINI_SECTION_ASM_OP
#undef ENDFILE_SPEC
#define ENDFILE_SPEC ""
/* Bring in standard linux defines */
#undef TARGET_OS_CPP_BUILTINS
#define TARGET_OS_CPP_BUILTINS() \
do \
{ \
builtin_define_std ("mc68000"); \
builtin_define ("__uClinux__"); \
builtin_define_std ("linux"); \
builtin_define_std ("unix"); \
builtin_define ("__gnu_linux__"); \
builtin_assert ("system=linux"); \
builtin_assert ("system=unix"); \
builtin_assert ("system=posix"); \
if (TARGET_ID_SHARED_LIBRARY) \
builtin_define ("__ID_SHARED_LIBRARY__"); \
} \
while (0)

102
gcc/config/mcore/mcore-pe.h
View file

@ -1,102 +0,0 @@
/* Definitions of target machine for GNU compiler, for MCore using COFF/PE.
Copyright (C) 1994, 1999, 2000, 2002, 2003, 2004, 2007
Free Software Foundation, Inc.
Contributed by Michael Tiemann (tiemann@cygnus.com).
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* Run-time Target Specification. */
#define TARGET_VERSION fputs (" (MCORE/pe)", stderr)
#define TARGET_OS_CPP_BUILTINS() \
do \
{ \
builtin_define ("__pe__"); \
} \
while (0)
/* The MCore ABI says that bitfields are unsigned by default. */
/* The EPOC C++ environment does not support exceptions. */
#undef CC1_SPEC
#define CC1_SPEC "-funsigned-bitfields %{!DIN_GCC:-fno-rtti} %{!DIN_GCC:-fno-exceptions}"
#undef SDB_DEBUGGING_INFO
#define DBX_DEBUGGING_INFO 1
/* Computed in toplev.c. */
#undef PREFERRED_DEBUGGING_TYPE
#define READONLY_DATA_SECTION_ASM_OP "\t.section .rdata"
#define MCORE_EXPORT_NAME(STREAM, NAME) \
do \
{ \
fprintf (STREAM, "\t.section .drectve\n"); \
fprintf (STREAM, "\t.ascii \" -export:%s\"\n", \
(* targetm.strip_name_encoding) (NAME)); \
in_section = NULL; \
} \
while (0);
/* Output the label for an initialized variable. */
#undef ASM_DECLARE_OBJECT_NAME
#define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL) \
do \
{ \
if (mcore_dllexport_name_p (NAME)) \
{ \
section *save_section = in_section; \
MCORE_EXPORT_NAME (STREAM, NAME); \
switch_to_section (save_section); \
} \
ASM_OUTPUT_LABEL ((STREAM), (NAME)); \
} \
while (0)
/* Output a function label definition. */
#define ASM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL) \
do \
{ \
if (mcore_dllexport_name_p (NAME)) \
{ \
MCORE_EXPORT_NAME (STREAM, NAME); \
switch_to_section (function_section (DECL)); \
} \
ASM_OUTPUT_LABEL ((STREAM), (NAME)); \
} \
while (0);
#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
#define DBX_LINES_FUNCTION_RELATIVE 1
#define STARTFILE_SPEC "crt0.o%s"
#define ENDFILE_SPEC "%{!mno-lsim:-lsim}"
/* __CTOR_LIST__ and __DTOR_LIST__ must be defined by the linker script. */
#define CTOR_LISTS_DEFINED_EXTERNALLY
#undef DO_GLOBAL_CTORS_BODY
#undef DO_GLOBAL_DTORS_BODY
#undef INIT_SECTION_ASM_OP
#undef DTORS_SECTION_ASM_OP
#define SUPPORTS_ONE_ONLY 1
/* Switch into a generic section. */
#undef TARGET_ASM_NAMED_SECTION
#define TARGET_ASM_NAMED_SECTION default_pe_asm_named_section

56
gcc/config/mcore/t-mcore-pe
View file

@ -1,56 +0,0 @@
# Copyright (C) 2000, 2001, 2002, 2008 Free Software Foundation, Inc.
#
# This file is part of GCC.
#
# GCC is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3, or (at your option)
# any later version.
#
# GCC is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
LIB1ASMSRC = mcore/lib1.asm
LIB1ASMFUNCS = _divsi3 _udivsi3 _modsi3 _umodsi3
# We want fine grained libraries, so use the new code to build the
# floating point emulation libraries.
FPBIT = fp-bit.c
DPBIT = dp-bit.c
dp-bit.c: $(srcdir)/config/fp-bit.c $(srcdir)/config/mcore/t-mcore
rm -f dp-bit.c
echo '' > dp-bit.c
cat $(srcdir)/config/fp-bit.c >> dp-bit.c
fp-bit.c: $(srcdir)/config/fp-bit.c $(srcdir)/config/mcore/t-mcore
rm -f fp-bit.c
echo '' > fp-bit.c
echo '#define FLOAT' > fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c
# could use -msifilter to be safe from interrupt/jmp interactions and others.
TARGET_LIBGCC2_CFLAGS=-O3 -DNO_FLOATLIB_FIXUNSDFSI #-msifilter
# We have values for float.h.
CROSS_FLOAT_H = $(srcdir)/config/mcore/gfloat.h
MULTILIB_OPTIONS = mbig-endian/mlittle-endian m210/m340
MULTILIB_DIRNAMES = big little m210 m340
MULTILIB_MATCHES =
MULTILIB_EXTRA_OPTS =
MULTILIB_EXCEPTIONS =
# EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o
LIBGCC = stmp-multilib
INSTALL_LIBGCC = install-multilib
# If EXTRA_MULTILIB_PARTS is not defined above then define EXTRA_PARTS here
# EXTRA_PARTS = crtbegin.o crtend.o

196
gcc/config/netbsd-aout.h
View file

@ -1,196 +0,0 @@
/* Common configuration file for NetBSD a.out targets.
Copyright (C) 2002, 2007, 2010 Free Software Foundation, Inc.
Contributed by Wasabi Systems, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* TARGET_OS_CPP_BUILTINS() common to all NetBSD a.out targets. */
#define NETBSD_OS_CPP_BUILTINS_AOUT() \
do \
{ \
NETBSD_OS_CPP_BUILTINS_COMMON(); \
} \
while (0)
/* Provide an ASM_SPEC appropriate for NetBSD. Currently we only deal
with the options for generating PIC code. */
#undef ASM_SPEC
#define ASM_SPEC "%{fpic|fpie:-k} %{fPIC|fPIE:-k -K}"
#define AS_NEEDS_DASH_FOR_PIPED_INPUT
/* Provide a STARTFILE_SPEC appropriate for NetBSD a.out. Here we
provide support for the special GCC option -static. */
#undef STARTFILE_SPEC
#define STARTFILE_SPEC \
"%{!shared: \
%{pg:gcrt0%O%s} \
%{!pg: \
%{p:mcrt0%O%s} \
%{!p: \
%{!static:crt0%O%s} \
%{static:scrt0%O%s}}}}"
/* Provide a LINK_SPEC appropriate for NetBSD a.out. Here we provide
support for the special GCC options -static, -assert, and -nostdlib. */
#undef NETBSD_LINK_SPEC_AOUT
#define NETBSD_LINK_SPEC_AOUT \
"%{nostdlib:-nostdlib} \
%{!shared: \
%{!nostdlib: \
%{!r: \
%{!e*:-e start}}} \
-dc -dp \
%{static:-Bstatic}} \
%{shared:-Bshareable} \
%{R*} \
%{assert*}"
/* Default LINK_SPEC. */
#undef LINK_SPEC
#define LINK_SPEC NETBSD_LINK_SPEC_AOUT
/* Define the strings used for the .type, .size, and .set directives.
These strings generally do not vary from one system running NetBSD
to another, but if a given system needs to use different pseudo-op
names for these, they may be overridden in the file included after
this one. */
#undef TYPE_ASM_OP
#undef SIZE_ASM_OP
#undef SET_ASM_OP
#define TYPE_ASM_OP "\t.type\t"
#define SIZE_ASM_OP "\t.size\t"
#define SET_ASM_OP "\t.set\t"
/* This is how we tell the assembler that a symbol is weak. */
#undef ASM_WEAKEN_LABEL
#define ASM_WEAKEN_LABEL(FILE,NAME) \
do \
{ \
fputs ("\t.globl\t", FILE); assemble_name (FILE, NAME); \
fputc ('\n', FILE); \
fputs ("\t.weak\t", FILE); assemble_name (FILE, NAME); \
fputc ('\n', FILE); \
} \
while (0)
/* The following macro defines the format used to output the second
operand of the .type assembler directive. Different svr4 assemblers
expect various different forms of this operand. The one given here
is just a default. You may need to override it in your machine-
specific tm.h file (depending on the particulars of your assembler). */
#undef TYPE_OPERAND_FMT
#define TYPE_OPERAND_FMT "@%s"
/* Write the extra assembler code needed to declare a function's result.
Most svr4 assemblers don't require any special declaration of the
result value, but there are exceptions. */
#ifndef ASM_DECLARE_RESULT
#define ASM_DECLARE_RESULT(FILE, RESULT)
#endif
/* These macros generate the special .type and .size directives which
are used to set the corresponding fields of the linker symbol table
entries in an ELF object file under SVR4 (and a.out on NetBSD).
These macros also output the starting labels for the relevant
functions/objects. */
/* Write the extra assembler code needed to declare a function properly.
Some svr4 assemblers need to also have something extra said about the
function's return value. We allow for that here. */
#undef ASM_DECLARE_FUNCTION_NAME
#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
do \
{ \
ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "function"); \
ASM_DECLARE_RESULT (FILE, DECL_RESULT (DECL)); \
ASM_OUTPUT_FUNCTION_LABEL (FILE, NAME, DECL); \
} \
while (0)
/* Write the extra assembler code needed to declare an object properly. */
#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
do \
{ \
HOST_WIDE_INT size; \
\
ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
\
size_directive_output = 0; \
if (!flag_inhibit_size_directive \
&& (DECL) && DECL_SIZE (DECL)) \
{ \
size_directive_output = 1; \
size = int_size_in_bytes (TREE_TYPE (DECL)); \
ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, size); \
} \
\
ASM_OUTPUT_LABEL (FILE, NAME); \
} \
while (0)
/* Output the size directive for a decl in rest_of_decl_compilation
in the case where we did not do so before the initializer.
Once we find the error_mark_node, we know that the value of
size_directive_output was set
by ASM_DECLARE_OBJECT_NAME when it was run for the same decl. */
#undef ASM_FINISH_DECLARE_OBJECT
#define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
do \
{ \
const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
HOST_WIDE_INT size; \
if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
&& ! AT_END && TOP_LEVEL \
&& DECL_INITIAL (DECL) == error_mark_node \
&& !size_directive_output) \
{ \
size_directive_output = 1; \
size = int_size_in_bytes (TREE_TYPE (DECL)); \
ASM_OUTPUT_SIZE_DIRECTIVE (FILE, name, size); \
} \
} \
while (0)
/* This is how to declare the size of a function. */
#undef ASM_DECLARE_FUNCTION_SIZE
#define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
do \
{ \
if (!flag_inhibit_size_directive) \
ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
} \
while (0)

37
gcc/config/rs6000/gnu.h
View file

@ -1,37 +0,0 @@
/* Definitions of target machine for GNU compiler,
for PowerPC machines running GNU.
Copyright (C) 2001, 2003, 2007 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#undef CPP_OS_DEFAULT_SPEC
#define CPP_OS_DEFAULT_SPEC "%(cpp_os_gnu)"
#undef STARTFILE_DEFAULT_SPEC
#define STARTFILE_DEFAULT_SPEC "%(startfile_gnu)"
#undef ENDFILE_DEFAULT_SPEC
#define ENDFILE_DEFAULT_SPEC "%(endfile_gnu)"
#undef LINK_START_DEFAULT_SPEC
#define LINK_START_DEFAULT_SPEC "%(link_start_gnu)"
#undef LINK_OS_DEFAULT_SPEC
#define LINK_OS_DEFAULT_SPEC "%(link_os_gnu)"
#undef TARGET_VERSION
#define TARGET_VERSION fprintf (stderr, " (PowerPC GNU)");

5
gcc/config/rs6000/linux64.h
View file

@ -172,10 +172,6 @@ extern int dot_symbols;
#undef ASM_SPEC
#undef LINK_OS_LINUX_SPEC
/* FIXME: This will quite possibly choose the wrong dynamic linker. */
#undef LINK_OS_GNU_SPEC
#define LINK_OS_GNU_SPEC LINK_OS_LINUX_SPEC
#ifndef RS6000_BI_ARCH
#define ASM_DEFAULT_SPEC "-mppc64"
#define ASM_SPEC "%(asm_spec64) %(asm_spec_common)"
@ -199,7 +195,6 @@ extern int dot_symbols;
%{mcall-freebsd: -mbig} \
%{mcall-i960-old: -mlittle} \
%{mcall-linux: -mbig} \
%{mcall-gnu: -mbig} \
%{mcall-netbsd: -mbig} \
}}}}"

46
gcc/config/rs6000/sysv4.h
View file

@ -98,8 +98,6 @@ do { \
else \
rs6000_current_abi = ABI_V4; \
} \
else if (!strcmp (rs6000_abi_name, "gnu")) \
rs6000_current_abi = ABI_V4; \
else if (!strcmp (rs6000_abi_name, "netbsd")) \
rs6000_current_abi = ABI_V4; \
else if (!strcmp (rs6000_abi_name, "openbsd")) \
@ -556,8 +554,7 @@ extern int fixuplabelno;
mcall-freebsd | \
mcall-netbsd | \
mcall-openbsd | \
mcall-linux | \
mcall-gnu :-mbig; \
mcall-linux :-mbig; \
mcall-i960-old :-mlittle}"
#define CC1_ENDIAN_BIG_SPEC ""
@ -583,8 +580,7 @@ extern int fixuplabelno;
mcall-freebsd | \
mcall-netbsd | \
mcall-openbsd | \
mcall-linux | \
mcall-gnu : -mbig %(cc1_endian_big); \
mcall-linux : -mbig %(cc1_endian_big); \
mcall-i960-old : -mlittle %(cc1_endian_little); \
: %(cc1_endian_default)} \
%{meabi: %{!mcall-*: -mcall-sysv }} \
@ -593,7 +589,6 @@ extern int fixuplabelno;
%{mcall-freebsd: -mno-eabi } \
%{mcall-i960-old: -meabi } \
%{mcall-linux: -mno-eabi } \
%{mcall-gnu: -mno-eabi } \
%{mcall-netbsd: -mno-eabi } \
%{mcall-openbsd: -mno-eabi }}} \
%{msdata: -msdata=default} \
@ -609,7 +604,6 @@ extern int fixuplabelno;
msim : %(link_start_sim) ; \
mcall-freebsd: %(link_start_freebsd) ; \
mcall-linux : %(link_start_linux) ; \
mcall-gnu : %(link_start_gnu) ; \
mcall-netbsd : %(link_start_netbsd) ; \
mcall-openbsd: %(link_start_openbsd) ; \
: %(link_start_default) }"
@ -647,7 +641,6 @@ extern int fixuplabelno;
msim : %(link_os_sim) ; \
mcall-freebsd: %(link_os_freebsd) ; \
mcall-linux : %(link_os_linux) ; \
mcall-gnu : %(link_os_gnu) ; \
mcall-netbsd : %(link_os_netbsd) ; \
mcall-openbsd: %(link_os_openbsd) ; \
: %(link_os_default) }"
@ -666,7 +659,6 @@ extern int fixuplabelno;
msim : %(cpp_os_sim) ; \
mcall-freebsd: %(cpp_os_freebsd) ; \
mcall-linux : %(cpp_os_linux) ; \
mcall-gnu : %(cpp_os_gnu) ; \
mcall-netbsd : %(cpp_os_netbsd) ; \
mcall-openbsd: %(cpp_os_openbsd) ; \
: %(cpp_os_default) }"
@ -681,7 +673,6 @@ extern int fixuplabelno;
msim : %(startfile_sim) ; \
mcall-freebsd: %(startfile_freebsd) ; \
mcall-linux : %(startfile_linux) ; \
mcall-gnu : %(startfile_gnu) ; \
mcall-netbsd : %(startfile_netbsd) ; \
mcall-openbsd: %(startfile_openbsd) ; \
: %(startfile_default) }"
@ -696,7 +687,6 @@ extern int fixuplabelno;
msim : %(lib_sim) ; \
mcall-freebsd: %(lib_freebsd) ; \
mcall-linux : %(lib_linux) ; \
mcall-gnu : %(lib_gnu) ; \
mcall-netbsd : %(lib_netbsd) ; \
mcall-openbsd: %(lib_openbsd) ; \
: %(lib_default) }"
@ -711,7 +701,6 @@ extern int fixuplabelno;
msim : %(endfile_sim) ; \
mcall-freebsd: %(endfile_freebsd) ; \
mcall-linux : %(endfile_linux) ; \
mcall-gnu : %(endfile_gnu) ; \
mcall-netbsd : %(endfile_netbsd) ; \
mcall-openbsd: %(endfile_openbsd) ; \
: %(crtsavres_default) %(endfile_default) }"
@ -845,31 +834,6 @@ extern int fixuplabelno;
%{std=gnu*:-Dunix -D__unix -Dlinux -D__linux}}} \
-Asystem=linux -Asystem=unix -Asystem=posix %{pthread:-D_REENTRANT}"
/* GNU/Hurd support. */
#define LIB_GNU_SPEC "%{mnewlib: --start-group -lgnu -lc --end-group } \
%{!mnewlib: %{shared:-lc} %{!shared: %{pthread:-lpthread } \
%{profile:-lc_p} %{!profile:-lc}}}"
#define STARTFILE_GNU_SPEC "\
%{!shared: %{!static: %{pg:gcrt1.o%s} %{!pg:%{p:gcrt1.o%s} %{!p:crt1.o%s}}}} \
%{static: %{pg:gcrt0.o%s} %{!pg:%{p:gcrt0.o%s} %{!p:crt0.o%s}}} \
%{mnewlib: ecrti.o%s} %{!mnewlib: crti.o%s} \
%{!shared:crtbegin.o%s} %{shared:crtbeginS.o%s}"
#define ENDFILE_GNU_SPEC "%{!shared:crtend.o%s} %{shared:crtendS.o%s} \
%{mnewlib: ecrtn.o%s} %{!mnewlib: crtn.o%s}"
#define LINK_START_GNU_SPEC ""
#define LINK_OS_GNU_SPEC "-m elf32ppclinux %{!shared: %{!static: \
%{rdynamic:-export-dynamic} \
-dynamic-linker /lib/ld.so.1}}"
#define CPP_OS_GNU_SPEC "-D__unix__ -D__gnu_hurd__ -D__GNU__ \
%{!undef: \
%{!ansi: -Dunix -D__unix}} \
-Asystem=gnu -Asystem=unix -Asystem=posix %{pthread:-D_REENTRANT}"
/* NetBSD support. */
#define LIB_NETBSD_SPEC "\
-lc"
@ -931,7 +895,6 @@ ncrtn.o%s"
{ "lib_mvme", LIB_MVME_SPEC }, \
{ "lib_sim", LIB_SIM_SPEC }, \
{ "lib_freebsd", LIB_FREEBSD_SPEC }, \
{ "lib_gnu", LIB_GNU_SPEC }, \
{ "lib_linux", LIB_LINUX_SPEC }, \
{ "lib_netbsd", LIB_NETBSD_SPEC }, \
{ "lib_openbsd", LIB_OPENBSD_SPEC }, \
@ -941,7 +904,6 @@ ncrtn.o%s"
{ "startfile_mvme", STARTFILE_MVME_SPEC }, \
{ "startfile_sim", STARTFILE_SIM_SPEC }, \
{ "startfile_freebsd", STARTFILE_FREEBSD_SPEC }, \
{ "startfile_gnu", STARTFILE_GNU_SPEC }, \
{ "startfile_linux", STARTFILE_LINUX_SPEC }, \
{ "startfile_netbsd", STARTFILE_NETBSD_SPEC }, \
{ "startfile_openbsd", STARTFILE_OPENBSD_SPEC }, \
@ -951,7 +913,6 @@ ncrtn.o%s"
{ "endfile_mvme", ENDFILE_MVME_SPEC }, \
{ "endfile_sim", ENDFILE_SIM_SPEC }, \
{ "endfile_freebsd", ENDFILE_FREEBSD_SPEC }, \
{ "endfile_gnu", ENDFILE_GNU_SPEC }, \
{ "endfile_linux", ENDFILE_LINUX_SPEC }, \
{ "endfile_netbsd", ENDFILE_NETBSD_SPEC }, \
{ "endfile_openbsd", ENDFILE_OPENBSD_SPEC }, \
@ -964,7 +925,6 @@ ncrtn.o%s"
{ "link_start_mvme", LINK_START_MVME_SPEC }, \
{ "link_start_sim", LINK_START_SIM_SPEC }, \
{ "link_start_freebsd", LINK_START_FREEBSD_SPEC }, \
{ "link_start_gnu", LINK_START_GNU_SPEC }, \
{ "link_start_linux", LINK_START_LINUX_SPEC }, \
{ "link_start_netbsd", LINK_START_NETBSD_SPEC }, \
{ "link_start_openbsd", LINK_START_OPENBSD_SPEC }, \
@ -976,7 +936,6 @@ ncrtn.o%s"
{ "link_os_sim", LINK_OS_SIM_SPEC }, \
{ "link_os_freebsd", LINK_OS_FREEBSD_SPEC }, \
{ "link_os_linux", LINK_OS_LINUX_SPEC }, \
{ "link_os_gnu", LINK_OS_GNU_SPEC }, \
{ "link_os_netbsd", LINK_OS_NETBSD_SPEC }, \
{ "link_os_openbsd", LINK_OS_OPENBSD_SPEC }, \
{ "link_os_default", LINK_OS_DEFAULT_SPEC }, \
@ -989,7 +948,6 @@ ncrtn.o%s"
{ "cpp_os_mvme", CPP_OS_MVME_SPEC }, \
{ "cpp_os_sim", CPP_OS_SIM_SPEC }, \
{ "cpp_os_freebsd", CPP_OS_FREEBSD_SPEC }, \
{ "cpp_os_gnu", CPP_OS_GNU_SPEC }, \
{ "cpp_os_linux", CPP_OS_LINUX_SPEC }, \
{ "cpp_os_netbsd", CPP_OS_NETBSD_SPEC }, \
{ "cpp_os_openbsd", CPP_OS_OPENBSD_SPEC }, \

16
gcc/config/sh/sh-protos.h
View file

@ -1,6 +1,6 @@
/* Definitions of target machine for GNU compiler for Renesas / SuperH SH.
Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2003,
2004, 2005, 2006, 2007, 2008, 2009, 2010
2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
Free Software Foundation, Inc.
Contributed by Steve Chamberlain (sac@cygnus.com).
Improved by Jim Wilson (wilson@cygnus.com).
@ -170,17 +170,3 @@ extern int sh2a_is_function_vector_call (rtx);
extern void sh_fix_range (const char *);
extern bool sh_hard_regno_mode_ok (unsigned int, enum machine_mode);
#endif /* ! GCC_SH_PROTOS_H */
#ifdef SYMBIAN
extern const char * sh_symbian_strip_name_encoding (const char *);
extern bool sh_symbian_is_dllexported_name (const char *);
#ifdef TREE_CODE
extern bool sh_symbian_is_dllexported (tree);
extern int sh_symbian_import_export_class (tree, int);
extern tree sh_symbian_handle_dll_attribute (tree *, tree, tree, int, bool *);
#ifdef RTX_CODE
extern void sh_symbian_encode_section_info (tree, rtx, int);
#endif
#endif
#endif /* SYMBIAN */

42
gcc/config/sh/sh-symbian.h
View file

@ -1,42 +0,0 @@
/* header file for GCC for a Symbian OS targeted SH backend.
Copyright (C) 2004, 2005, 2007, 2009 Free Software Foundation, Inc.
Contributed by RedHat.
Most of this code is stolen from i386/winnt.c.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* A unique character to encode declspec encoded objects. */
#define SH_SYMBIAN_FLAG_CHAR "$"
/* Unique strings to prefix exported and imported objects. */
#define DLL_IMPORT_PREFIX SH_SYMBIAN_FLAG_CHAR "i."
#define DLL_EXPORT_PREFIX SH_SYMBIAN_FLAG_CHAR "e."
/* Select the level of debugging information to display.
0 for no debugging.
1 for informative messages about decisions to add attributes
2 for verbose information about what is being done. */
#define SYMBIAN_DEBUG 0
/* #define SYMBIAN_DEBUG 1 */
/* #define SYMBIAN_DEBUG 2 */
/* Functions exported from symbian-base.c. */
extern tree sh_symbian_associated_type (tree);
/* Functions exported from symbian-[c|c++].c. */
extern bool sh_symbian_is_dllimported (tree);

30
gcc/config/sh/sh.c
View file

@ -324,19 +324,6 @@ static const struct attribute_spec sh_attribute_table[] =
sh_handle_resbank_handler_attribute, false },
{ "function_vector", 1, 1, true, false, false,
sh2a_handle_function_vector_handler_attribute, false },
#ifdef SYMBIAN
/* Symbian support adds three new attributes:
dllexport - for exporting a function/variable that will live in a dll
dllimport - for importing a function/variable from a dll
Microsoft allows multiple declspecs in one __declspec, separating
them with spaces. We do NOT support this. Instead, use __declspec
multiple times. */
{ "dllimport", 0, 0, true, false, false,
sh_symbian_handle_dll_attribute, false },
{ "dllexport", 0, 0, true, false, false,
sh_symbian_handle_dll_attribute, false },
#endif
{ NULL, 0, 0, false, false, false, NULL, false }
};
@ -592,17 +579,6 @@ static const struct default_options sh_option_optimization_table[] =
#undef TARGET_ENCODE_SECTION_INFO
#define TARGET_ENCODE_SECTION_INFO sh_encode_section_info
#ifdef SYMBIAN
#undef TARGET_ENCODE_SECTION_INFO
#define TARGET_ENCODE_SECTION_INFO sh_symbian_encode_section_info
#undef TARGET_STRIP_NAME_ENCODING
#define TARGET_STRIP_NAME_ENCODING sh_symbian_strip_name_encoding
#undef TARGET_CXX_IMPORT_EXPORT_CLASS
#define TARGET_CXX_IMPORT_EXPORT_CLASS sh_symbian_import_export_class
#endif /* SYMBIAN */
#undef TARGET_SECONDARY_RELOAD
#define TARGET_SECONDARY_RELOAD sh_secondary_reload
@ -2823,12 +2799,6 @@ sh_file_start (void)
{
default_file_start ();
#ifdef SYMBIAN
/* Declare the .directive section before it is used. */
fputs ("\t.section .directive, \"SM\", @progbits, 1\n", asm_out_file);
fputs ("\t.asciz \"#<SYMEDIT>#\\n\"\n", asm_out_file);
#endif
if (TARGET_ELF)
/* We need to show the text section with the proper
attributes as in TEXT_SECTION_ASM_OP, before dwarf2out

244
gcc/config/sh/symbian-base.c
View file

@ -1,244 +0,0 @@
/* Routines for GCC for a Symbian OS targeted SH backend, shared by
both the C and C++ compilers.
Copyright (C) 2004, 2005, 2007, 2009, 2010 Free Software Foundation, Inc.
Contributed by RedHat.
Most of this code is stolen from i386/winnt.c.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "tm.h"
#include "rtl.h"
#include "output.h"
#include "flags.h"
#include "tree.h"
#include "expr.h"
#include "tm_p.h"
#include "diagnostic-core.h"
#include "sh-symbian.h"
/* Return nonzero if SYMBOL is marked as being dllexport'd. */
bool
sh_symbian_is_dllexported_name (const char *symbol)
{
return strncmp (DLL_EXPORT_PREFIX, symbol,
strlen (DLL_EXPORT_PREFIX)) == 0;
}
/* Return nonzero if SYMBOL is marked as being dllimport'd. */
static bool
sh_symbian_is_dllimported_name (const char *symbol)
{
return strncmp (DLL_IMPORT_PREFIX, symbol,
strlen (DLL_IMPORT_PREFIX)) == 0;
}
/* Return nonzero if DECL is a dllexport'd object. */
bool
sh_symbian_is_dllexported (tree decl)
{
tree exp;
if ( TREE_CODE (decl) != VAR_DECL
&& TREE_CODE (decl) != FUNCTION_DECL)
return false;
exp = lookup_attribute ("dllexport", DECL_ATTRIBUTES (decl));
/* Class members get the dllexport status of their class. */
if (exp == NULL)
{
tree class = sh_symbian_associated_type (decl);
if (class)
exp = lookup_attribute ("dllexport", TYPE_ATTRIBUTES (class));
}
#if SYMBIAN_DEBUG
if (exp)
{
print_node_brief (stderr, "dllexport:", decl, 0);
fprintf (stderr, "\n");
}
else
#if SYMBIAN_DEBUG < 2
if (TREE_CODE (decl) != FUNCTION_DECL)
#endif
{
print_node_brief (stderr, "no dllexport:", decl, 0);
fprintf (stderr, "\n");
}
#endif
return exp ? true : false;
}
/* Mark a DECL as being dllimport'd. */
static void
sh_symbian_mark_dllimport (tree decl)
{
const char *oldname;
char *newname;
tree idp;
rtx rtlname;
rtx newrtl;
rtlname = XEXP (DECL_RTL (decl), 0);
if (MEM_P (rtlname))
rtlname = XEXP (rtlname, 0);
gcc_assert (GET_CODE (rtlname) == SYMBOL_REF);
oldname = XSTR (rtlname, 0);
if (sh_symbian_is_dllexported_name (oldname))
{
error ("%qE declared as both exported to and imported from a DLL",
DECL_NAME (decl));
}
else if (sh_symbian_is_dllimported_name (oldname))
{
/* Already done, but do a sanity check to prevent assembler errors. */
if (!DECL_EXTERNAL (decl) || !TREE_PUBLIC (decl))
error ("failure in redeclaration of %q+D: dllimport%'d symbol lacks external linkage",
decl);
}
else
{
newname = (char *) alloca (strlen (DLL_IMPORT_PREFIX) + strlen (oldname) + 1);
sprintf (newname, "%s%s", DLL_IMPORT_PREFIX, oldname);
/* We pass newname through get_identifier to ensure it has a unique
address. RTL processing can sometimes peek inside the symbol ref
and compare the string's addresses to see if two symbols are
identical. */
idp = get_identifier (newname);
newrtl = gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (idp));
XEXP (DECL_RTL (decl), 0) = newrtl;
}
}
/* Mark a DECL as being dllexport'd.
Note that we override the previous setting (e.g.: dllimport). */
static void
sh_symbian_mark_dllexport (tree decl)
{
const char *oldname;
char *newname;
rtx rtlname;
tree idp;
rtlname = XEXP (DECL_RTL (decl), 0);
if (MEM_P (rtlname))
rtlname = XEXP (rtlname, 0);
gcc_assert (GET_CODE (rtlname) == SYMBOL_REF);
oldname = XSTR (rtlname, 0);
if (sh_symbian_is_dllimported_name (oldname))
{
/* Remove DLL_IMPORT_PREFIX.
Note - we do not issue a warning here. In Symbian's environment it
is legitimate for a prototype to be marked as dllimport and the
corresponding definition to be marked as dllexport. The prototypes
are in headers used everywhere and the definition is in a translation
unit which has included the header in order to ensure argument
correctness. */
oldname += strlen (DLL_IMPORT_PREFIX);
DECL_DLLIMPORT_P (decl) = 0;
}
else if (sh_symbian_is_dllexported_name (oldname))
return; /* Already done. */
newname = (char *) alloca (strlen (DLL_EXPORT_PREFIX) + strlen (oldname) + 1);
sprintf (newname, "%s%s", DLL_EXPORT_PREFIX, oldname);
/* We pass newname through get_identifier to ensure it has a unique
address. RTL processing can sometimes peek inside the symbol ref
and compare the string's addresses to see if two symbols are
identical. */
idp = get_identifier (newname);
XEXP (DECL_RTL (decl), 0) =
gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (idp));
}
void
sh_symbian_encode_section_info (tree decl, rtx rtl, int first)
{
default_encode_section_info (decl, rtl, first);
/* Mark the decl so we can tell from the rtl whether
the object is dllexport'd or dllimport'd. */
if (sh_symbian_is_dllexported (decl))
sh_symbian_mark_dllexport (decl);
else if (sh_symbian_is_dllimported (decl))
sh_symbian_mark_dllimport (decl);
/* It might be that DECL has already been marked as dllimport, but a
subsequent definition nullified that. The attribute is gone but
DECL_RTL still has (DLL_IMPORT_PREFIX) prefixed. We need to remove
that. Ditto for the DECL_DLLIMPORT_P flag. */
else if ( (TREE_CODE (decl) == FUNCTION_DECL
|| TREE_CODE (decl) == VAR_DECL)
&& DECL_RTL (decl) != NULL_RTX
&& MEM_P (DECL_RTL (decl))
&& MEM_P (XEXP (DECL_RTL (decl), 0))
&& GET_CODE (XEXP (XEXP (DECL_RTL (decl), 0), 0)) == SYMBOL_REF
&& sh_symbian_is_dllimported_name (XSTR (XEXP (XEXP (DECL_RTL (decl), 0), 0), 0)))
{
const char * oldname = XSTR (XEXP (XEXP (DECL_RTL (decl), 0), 0), 0);
/* Remove DLL_IMPORT_PREFIX. */
tree idp = get_identifier (oldname + strlen (DLL_IMPORT_PREFIX));
rtx newrtl = gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (idp));
warning (0, "%s %q+D %s after being referenced with dllimport linkage",
TREE_CODE (decl) == VAR_DECL ? "variable" : "function",
decl, (DECL_INITIAL (decl) || !DECL_EXTERNAL (decl))
? "defined locally" : "redeclared without dllimport attribute");
XEXP (DECL_RTL (decl), 0) = newrtl;
DECL_DLLIMPORT_P (decl) = 0;
}
}
/* Return the length of a function name prefix
that starts with the character 'c'. */
static int
sh_symbian_get_strip_length (int c)
{
/* XXX Assumes strlen (DLL_EXPORT_PREFIX) == strlen (DLL_IMPORT_PREFIX). */
return (c == SH_SYMBIAN_FLAG_CHAR[0]) ? strlen (DLL_EXPORT_PREFIX) : 0;
}
/* Return a pointer to a function's name with any
and all prefix encodings stripped from it. */
const char *
sh_symbian_strip_name_encoding (const char *name)
{
int skip;
while ((skip = sh_symbian_get_strip_length (*name)))
name += skip;
return name;
}

181
gcc/config/sh/symbian-c.c
View file

@ -1,181 +0,0 @@
/* Routines for C compiler part of GCC for a Symbian OS targeted SH backend.
Copyright (C) 2004, 2005, 2007, 2009, 2010 Free Software Foundation, Inc.
Contributed by RedHat.
Most of this code is stolen from i386/winnt.c.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "tm.h"
#include "rtl.h"
#include "output.h"
#include "flags.h"
#include "tree.h"
#include "expr.h"
#include "tm_p.h"
#include "diagnostic-core.h"
#include "sh-symbian.h"
/* Return the type that we should use to determine if DECL is
imported or exported. */
tree
sh_symbian_associated_type (tree decl)
{
tree t = NULL_TREE;
/* We can just take the DECL_CONTEXT as normal. */
if (DECL_CONTEXT (decl) && TYPE_P (DECL_CONTEXT (decl)))
t = DECL_CONTEXT (decl);
return t;
}
/* Return nonzero if DECL is a dllimport'd object. */
bool
sh_symbian_is_dllimported (tree decl)
{
tree imp;
if ( TREE_CODE (decl) != VAR_DECL
&& TREE_CODE (decl) != FUNCTION_DECL)
return false;
imp = lookup_attribute ("dllimport", DECL_ATTRIBUTES (decl));
if (imp)
return true;
/* Class members get the dllimport status of their class. */
imp = sh_symbian_associated_type (decl);
if (! imp)
return false;
imp = lookup_attribute ("dllimport", TYPE_ATTRIBUTES (imp));
if (!imp)
return false;
/* Don't mark defined functions as dllimport. If the definition itself
was marked with dllimport, then sh_symbian_handle_dll_attribute reports
an error. This handles the case when the definition overrides an
earlier declaration. */
if (TREE_CODE (decl) == FUNCTION_DECL
&& DECL_INITIAL (decl)
&& ! DECL_DECLARED_INLINE_P (decl))
{
warning (OPT_Wattributes, "function %q+D is defined after prior "
"declaration as dllimport: attribute ignored",
decl);
return false;
}
/* Don't allow definitions of static data members in dllimport
class. Just ignore the attribute for vtable data. */
else if (TREE_CODE (decl) == VAR_DECL
&& TREE_STATIC (decl)
&& TREE_PUBLIC (decl)
&& !DECL_EXTERNAL (decl))
{
error ("definition of static data member %q+D of dllimport%'d class",
decl);
return false;
}
return true;
}
/* Handle a "dllimport" or "dllexport" attribute;
arguments as in struct attribute_spec.handler. */
tree
sh_symbian_handle_dll_attribute (tree *pnode, tree name, tree args,
int flags, bool *no_add_attrs)
{
tree node = *pnode;
const char *attr = IDENTIFIER_POINTER (name);
/* These attributes may apply to structure and union types being
created, but otherwise should pass to the declaration involved. */
if (!DECL_P (node))
{
if (flags & ((int) ATTR_FLAG_DECL_NEXT
| (int) ATTR_FLAG_FUNCTION_NEXT
| (int) ATTR_FLAG_ARRAY_NEXT))
{
warning (OPT_Wattributes, "%qs attribute ignored", attr);
*no_add_attrs = true;
return tree_cons (name, args, NULL_TREE);
}
if (TREE_CODE (node) != RECORD_TYPE && TREE_CODE (node) != UNION_TYPE)
{
warning (OPT_Wattributes, "%qs attribute ignored", attr);
*no_add_attrs = true;
}
return NULL_TREE;
}
/* Report error on dllimport ambiguities
seen now before they cause any damage. */
else if (is_attribute_p ("dllimport", name))
{
if (TREE_CODE (node) == VAR_DECL)
{
if (DECL_INITIAL (node))
{
error ("variable %q+D definition is marked dllimport",
node);
*no_add_attrs = true;
}
/* `extern' needn't be specified with dllimport.
Specify `extern' now and hope for the best. Sigh. */
DECL_EXTERNAL (node) = 1;
/* Also, implicitly give dllimport'd variables declared within
a function global scope, unless declared static. */
if (current_function_decl != NULL_TREE && ! TREE_STATIC (node))
TREE_PUBLIC (node) = 1;
}
}
/* Report error if symbol is not accessible at global scope. */
if (!TREE_PUBLIC (node)
&& ( TREE_CODE (node) == VAR_DECL
|| TREE_CODE (node) == FUNCTION_DECL))
{
error ("external linkage required for symbol %q+D because of %qE attribute",
node, name);
*no_add_attrs = true;
}
#if SYMBIAN_DEBUG
print_node_brief (stderr, "mark node", node, 0);
fprintf (stderr, " as %s\n", attr);
#endif
return NULL_TREE;
}
int
sh_symbian_import_export_class (tree ctype ATTRIBUTE_UNUSED, int import_export)
{
return import_export;
}

662
gcc/config/sh/symbian-cxx.c
View file

@ -1,662 +0,0 @@
/* Routines for C++ support for GCC for a Symbian OS targeted SH backend.
Copyright (C) 2004, 2005, 2007, 2009, 2010 Free Software Foundation, Inc.
Contributed by RedHat.
Most of this code is stolen from i386/winnt.c.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "tm.h"
#include "rtl.h"
#include "output.h"
#include "flags.h"
#include "tree.h"
#include "expr.h"
#include "tm_p.h"
#include "cp/cp-tree.h" /* We need access to the OVL_... macros. */
#include "diagnostic-core.h"
#include "sh-symbian.h"
/* Return the type that we should use to determine if DECL is
imported or exported. */
tree
sh_symbian_associated_type (tree decl)
{
tree t = NULL_TREE;
if (TREE_CODE (TREE_TYPE (decl)) == METHOD_TYPE)
/* Methods now inherit their dllimport/dllexport attributes correctly
so there is no need to check their class. In fact it is wrong to
check their class since a method can remain unexported from an
exported class. */
return t;
/* Otherwise we can just take the DECL_CONTEXT as normal. */
if (DECL_CONTEXT (decl) && TYPE_P (DECL_CONTEXT (decl)))
t = DECL_CONTEXT (decl);
return t;
}
/* Return nonzero if DECL is a dllimport'd object. */
bool
sh_symbian_is_dllimported (tree decl)
{
tree imp;
if ( TREE_CODE (decl) != VAR_DECL
&& TREE_CODE (decl) != FUNCTION_DECL)
return false;
imp = lookup_attribute ("dllimport", DECL_ATTRIBUTES (decl));
if (imp)
return true;
/* Class members get the dllimport status of their class. */
imp = sh_symbian_associated_type (decl);
if (! imp)
return false;
imp = lookup_attribute ("dllimport", TYPE_ATTRIBUTES (imp));
if (!imp)
return false;
/* Don't mark defined functions as dllimport. If the definition itself
was marked with dllimport, then sh_symbian_handle_dll_attribute reports
an error. This handles the case when the definition overrides an
earlier declaration. */
if (TREE_CODE (decl) == FUNCTION_DECL
&& DECL_INITIAL (decl)
&& ! DECL_DECLARED_INLINE_P (decl))
{
/* Don't warn about artificial methods. */
if (!DECL_ARTIFICIAL (decl))
warning (OPT_Wattributes, "function %q+D is defined after prior "
"declaration as dllimport: attribute ignored",
decl);
return false;
}
/* We ignore the dllimport attribute for inline member functions.
This differs from MSVC behavior which treats it like GNUC
'extern inline' extension. */
else if (TREE_CODE (decl) == FUNCTION_DECL && DECL_DECLARED_INLINE_P (decl))
{
if (extra_warnings)
warning (OPT_Wattributes, "inline function %q+D is declared as "
"dllimport: attribute ignored",
decl);
return false;
}
/* Don't allow definitions of static data members in dllimport
class. Just ignore the attribute for vtable data. */
else if (TREE_CODE (decl) == VAR_DECL
&& TREE_STATIC (decl)
&& TREE_PUBLIC (decl)
&& !DECL_EXTERNAL (decl))
{
if (!DECL_VIRTUAL_P (decl))
error ("definition of static data member %q+D of dllimport%'d class",
decl);
return false;
}
/* Since we can't treat a pointer to a dllimport'd symbol as a
constant address, we turn off the attribute on C++ virtual
methods to allow creation of vtables using thunks. Don't mark
artificial methods either (in sh_symbian_associated_type, only
COMDAT artificial method get import status from class context). */
else if (TREE_CODE (TREE_TYPE (decl)) == METHOD_TYPE
&& (DECL_VIRTUAL_P (decl) || DECL_ARTIFICIAL (decl)))
return false;
return true;
}
/* This code implements a specification for exporting the vtable and rtti of
classes that have members with the dllexport or dllexport attributes.
This specification is defined here:
http://www.armdevzone.com/EABI/exported_class.txt
Basically it says that a class's vtable and rtti should be exported if
the following rules apply:
- If it has any non-inline non-pure virtual functions,
at least one of these need to be declared dllimport
OR any of the constructors is declared dllimport.
AND
- The class has an inline constructor/destructor and
a key-function (placement of vtable uniquely defined) that
is defined in this translation unit.
The specification also says that for classes which will have their
vtables and rtti exported that their base class(es) might also need a
similar exporting if:
- Every base class needs to have its vtable & rtti exported
as well, if the following the conditions hold true:
+ The base class has a non-inline declared non-pure virtual function
+ The base class is polymorphic (has or inherits any virtual functions)
or the base class has any virtual base classes. */
/* Decide if a base class of a class should
also have its vtable and rtti exported. */
static void
sh_symbian_possibly_export_base_class (tree base_class)
{
VEC(tree,gc) *method_vec;
int len;
if (! (TYPE_CONTAINS_VPTR_P (base_class)))
return;
method_vec = CLASSTYPE_METHOD_VEC (base_class);
len = method_vec ? VEC_length (tree, method_vec) : 0;
for (;len --;)
{
tree member = VEC_index (tree, method_vec, len);
if (! member)
continue;
for (member = OVL_CURRENT (member); member; member = OVL_NEXT (member))
{
if (TREE_CODE (member) != FUNCTION_DECL)
continue;
if (DECL_CONSTRUCTOR_P (member) || DECL_DESTRUCTOR_P (member))
continue;
if (! DECL_VIRTUAL_P (member))
continue;
if (DECL_PURE_VIRTUAL_P (member))
continue;
if (DECL_DECLARED_INLINE_P (member))
continue;
break;
}
if (member)
break;
}
if (len < 0)
return;
/* FIXME: According to the spec this base class should be exported, but
a) how do we do this ? and
b) it does not appear to be necessary for compliance with the Symbian
OS which so far is the only consumer of this code. */
#if SYMBIAN_DEBUG
print_node_brief (stderr, "", base_class, 0);
fprintf (stderr, " EXPORTed [base class of exported class]\n");
#endif
}
/* Add the named attribute to the given node. Copes with both DECLs and
TYPEs. Will only add the attribute if it is not already present. */
static void
sh_symbian_add_attribute (tree node, const char *attr_name)
{
tree attrs;
tree attr;
attrs = DECL_P (node) ? DECL_ATTRIBUTES (node) : TYPE_ATTRIBUTES (node);
if (lookup_attribute (attr_name, attrs) != NULL_TREE)
return;
attr = get_identifier (attr_name);
if (DECL_P (node))
DECL_ATTRIBUTES (node) = tree_cons (attr, NULL_TREE, attrs);
else
TYPE_ATTRIBUTES (node) = tree_cons (attr, NULL_TREE, attrs);
#if SYMBIAN_DEBUG
fprintf (stderr, "propagate %s attribute", attr_name);
print_node_brief (stderr, " to", node, 0);
fprintf (stderr, "\n");
#endif
}
/* Add the named attribute to a class and its vtable and rtti. */
static void
sh_symbian_add_attribute_to_class_vtable_and_rtti (tree ctype, const char *attr_name)
{
sh_symbian_add_attribute (ctype, attr_name);
/* If the vtable exists then they need annotating as well. */
if (CLASSTYPE_VTABLES (ctype))
/* XXX - Do we need to annotate any vtables other than the primary ? */
sh_symbian_add_attribute (CLASSTYPE_VTABLES (ctype), attr_name);
/* If the rtti exists then it needs annotating as well. */
if (TYPE_MAIN_VARIANT (ctype)
&& CLASSTYPE_TYPEINFO_VAR (TYPE_MAIN_VARIANT (ctype)))
sh_symbian_add_attribute (CLASSTYPE_TYPEINFO_VAR (TYPE_MAIN_VARIANT (ctype)),
attr_name);
}
/* Decide if a class needs to have an attribute because
one of its member functions has the attribute. */
static bool
sh_symbian_class_needs_attribute (tree ctype, const char *attribute_name)
{
VEC(tree,gc) *method_vec;
method_vec = CLASSTYPE_METHOD_VEC (ctype);
/* If the key function has the attribute then the class needs it too. */
if (TYPE_POLYMORPHIC_P (ctype)
&& method_vec
&& tree_contains_struct [TREE_CODE (ctype), TS_DECL_COMMON] == 1
&& lookup_attribute (attribute_name,
DECL_ATTRIBUTES (VEC_index (tree, method_vec, 0))))
return true;
/* Check the class's member functions. */
if (TREE_CODE (ctype) == RECORD_TYPE)
{
unsigned int len;
len = method_vec ? VEC_length (tree, method_vec) : 0;
for (;len --;)
{
tree member = VEC_index (tree, method_vec, len);
if (! member)
continue;
for (member = OVL_CURRENT (member);
member;
member = OVL_NEXT (member))
{
if (TREE_CODE (member) != FUNCTION_DECL)
continue;
if (DECL_PURE_VIRTUAL_P (member))
continue;
if (! DECL_VIRTUAL_P (member))
continue;
if (lookup_attribute (attribute_name, DECL_ATTRIBUTES (member)))
{
#if SYMBIAN_DEBUG
print_node_brief (stderr, "", ctype, 0);
fprintf (stderr, " inherits %s because", attribute_name);
print_node_brief (stderr, "", member, 0);
fprintf (stderr, " has it.\n");
#endif
return true;
}
}
}
}
#if SYMBIAN_DEBUG
print_node_brief (stderr, "", ctype, 0);
fprintf (stderr, " does not inherit %s\n", attribute_name);
#endif
return false;
}
/* Decide if a class needs its vtable and rtti exporting. */
static bool
symbian_export_vtable_and_rtti_p (tree ctype)
{
bool inline_ctor_dtor;
bool dllimport_ctor_dtor;
bool dllimport_member;
tree binfo, base_binfo;
VEC(tree,gc) *method_vec;
tree key;
int i;
int len;
/* Make sure that we are examining a class... */
if (TREE_CODE (ctype) != RECORD_TYPE)
{
#if SYMBIAN_DEBUG
print_node_brief (stderr, "", ctype, 0);
fprintf (stderr, " does NOT need to be EXPORTed [not a class]\n");
#endif
return false;
}
/* If the class does not have a key function it
does not need to have its vtable exported. */
if ((key = CLASSTYPE_KEY_METHOD (ctype)) == NULL_TREE)
{
#if SYMBIAN_DEBUG
print_node_brief (stderr, "", ctype, 0);
fprintf (stderr, " does NOT need to be EXPORTed [no key function]\n");
#endif
return false;
}
/* If the key fn has not been defined
then the class should not be exported. */
if (! TREE_ASM_WRITTEN (key))
{
#if SYMBIAN_DEBUG
print_node_brief (stderr, "", ctype, 0);
fprintf (stderr, " does NOT need to be EXPORTed [key function not defined]\n");
#endif
return false;
}
/* Check the class's member functions. */
inline_ctor_dtor = false;
dllimport_ctor_dtor = false;
dllimport_member = false;
method_vec = CLASSTYPE_METHOD_VEC (ctype);
len = method_vec ? VEC_length (tree, method_vec) : 0;
for (;len --;)
{
tree member = VEC_index (tree, method_vec, len);
if (! member)
continue;
for (member = OVL_CURRENT (member); member; member = OVL_NEXT (member))
{
if (TREE_CODE (member) != FUNCTION_DECL)
continue;
if (DECL_CONSTRUCTOR_P (member) || DECL_DESTRUCTOR_P (member))
{
if (DECL_DECLARED_INLINE_P (member)
/* Ignore C++ backend created inline ctors/dtors. */
&& ( DECL_MAYBE_IN_CHARGE_CONSTRUCTOR_P (member)
|| DECL_MAYBE_IN_CHARGE_DESTRUCTOR_P (member)))
inline_ctor_dtor = true;
if (lookup_attribute ("dllimport", DECL_ATTRIBUTES (member)))
dllimport_ctor_dtor = true;
}
else
{
if (DECL_PURE_VIRTUAL_P (member))
continue;
if (! DECL_VIRTUAL_P (member))
continue;
if (DECL_DECLARED_INLINE_P (member))
continue;
if (lookup_attribute ("dllimport", DECL_ATTRIBUTES (member)))
dllimport_member = true;
}
}
}
if (! dllimport_member && ! dllimport_ctor_dtor)
{
#if SYMBIAN_DEBUG
print_node_brief (stderr, "", ctype, 0);
fprintf (stderr,
" does NOT need to be EXPORTed [no non-pure virtuals or ctors/dtors with dllimport]\n");
#endif
return false;
}
if (! inline_ctor_dtor)
{
#if SYMBIAN_DEBUG
print_node_brief (stderr, "", ctype, 0);
fprintf (stderr,
" does NOT need to be EXPORTed [no inline ctor/dtor]\n");
#endif
return false;
}
#if SYMBIAN_DEBUG
print_node_brief (stderr, "", ctype, 0);
fprintf (stderr, " DOES need to be EXPORTed\n");
#endif
/* Now we must check and possibly export the base classes. */
for (i = 0, binfo = TYPE_BINFO (ctype);
BINFO_BASE_ITERATE (binfo, i, base_binfo); i++)
sh_symbian_possibly_export_base_class (BINFO_TYPE (base_binfo));
return true;
}
/* Possibly override the decision to export class TYPE. Upon entry
IMPORT_EXPORT will contain 1 if the class is going to be exported,
-1 if it is going to be imported and 0 otherwise. This function
should return the modified value and perform any other actions
necessary to support the backend's targeted operating system. */
int
sh_symbian_import_export_class (tree ctype, int import_export)
{
const char *attr_name = NULL;
/* If we are exporting the class but it does not have the dllexport
attribute then we may need to add it. Similarly imported classes
may need the dllimport attribute. */
switch (import_export)
{
case 1: attr_name = "dllexport"; break;
case -1: attr_name = "dllimport"; break;
default: break;
}
if (attr_name
&& ! lookup_attribute (attr_name, TYPE_ATTRIBUTES (ctype)))
{
if (sh_symbian_class_needs_attribute (ctype, attr_name))
sh_symbian_add_attribute_to_class_vtable_and_rtti (ctype, attr_name);
/* Classes can be forced to export their
vtable and rtti under certain conditions. */
if (symbian_export_vtable_and_rtti_p (ctype))
{
sh_symbian_add_attribute_to_class_vtable_and_rtti (ctype, "dllexport");
/* Make sure that the class and its vtable are exported. */
import_export = 1;
if (CLASSTYPE_VTABLES (ctype))
DECL_EXTERNAL (CLASSTYPE_VTABLES (ctype)) = 1;
/* Check to make sure that if the class has a key method that
it is now on the list of keyed classes. That way its vtable
will be emitted. */
if (CLASSTYPE_KEY_METHOD (ctype))
{
tree class;
for (class = keyed_classes; class; class = TREE_CHAIN (class))
if (class == ctype)
break;
if (class == NULL_TREE)
{
#if SYMBIAN_DEBUG
print_node_brief (stderr, "Add node", ctype, 0);
fprintf (stderr, " to the keyed classes list\n");
#endif
keyed_classes = tree_cons (NULL_TREE, ctype, keyed_classes);
}
}
/* Make sure that the typeinfo will be emitted as well. */
if (CLASS_TYPE_P (ctype))
TYPE_NEEDS_CONSTRUCTING (TREE_TYPE (CLASSTYPE_TYPEINFO_VAR (TYPE_MAIN_VARIANT (ctype)))) = 1;
}
}
return import_export;
}
/* Handle a "dllimport" or "dllexport" attribute;
arguments as in struct attribute_spec.handler. */
tree
sh_symbian_handle_dll_attribute (tree *pnode, tree name, tree args,
int flags, bool *no_add_attrs)
{
tree thunk;
tree node = *pnode;
const char *attr = IDENTIFIER_POINTER (name);
/* These attributes may apply to structure and union types being
created, but otherwise should pass to the declaration involved. */
if (!DECL_P (node))
{
if (flags & ((int) ATTR_FLAG_DECL_NEXT
| (int) ATTR_FLAG_FUNCTION_NEXT
| (int) ATTR_FLAG_ARRAY_NEXT))
{
warning (OPT_Wattributes, "%qs attribute ignored", attr);
*no_add_attrs = true;
return tree_cons (name, args, NULL_TREE);
}
if (TREE_CODE (node) != RECORD_TYPE && TREE_CODE (node) != UNION_TYPE)
{
warning (OPT_Wattributes, "%qs attribute ignored", attr);
*no_add_attrs = true;
}
return NULL_TREE;
}
/* Report error on dllimport ambiguities
seen now before they cause any damage. */
else if (is_attribute_p ("dllimport", name))
{
if (TREE_CODE (node) == VAR_DECL)
{
if (DECL_INITIAL (node))
{
error ("variable %q+D definition is marked dllimport",
node);
*no_add_attrs = true;
}
/* `extern' needn't be specified with dllimport.
Specify `extern' now and hope for the best. Sigh. */
DECL_EXTERNAL (node) = 1;
/* Also, implicitly give dllimport'd variables declared within
a function global scope, unless declared static. */
if (current_function_decl != NULL_TREE && ! TREE_STATIC (node))
TREE_PUBLIC (node) = 1;
}
}
/* If the node is an overloaded constructor or destructor, then we must
make sure that the attribute is propagated along the overload chain,
as it is these overloaded functions which will be emitted, rather than
the user declared constructor itself. */
if (TREE_CODE (TREE_TYPE (node)) == METHOD_TYPE
&& (DECL_CONSTRUCTOR_P (node) || DECL_DESTRUCTOR_P (node)))
{
tree overload;
for (overload = OVL_CHAIN (node); overload; overload = OVL_CHAIN (overload))
{
tree node_args;
tree func_args;
tree function = OVL_CURRENT (overload);
if (! function
|| ! DECL_P (function)
|| (DECL_CONSTRUCTOR_P (node) && ! DECL_CONSTRUCTOR_P (function))
|| (DECL_DESTRUCTOR_P (node) && ! DECL_DESTRUCTOR_P (function)))
continue;
/* The arguments must match as well. */
for (node_args = DECL_ARGUMENTS (node), func_args = DECL_ARGUMENTS (function);
node_args && func_args;
node_args = TREE_CHAIN (node_args), func_args = TREE_CHAIN (func_args))
if (TREE_TYPE (node_args) != TREE_TYPE (func_args))
break;
if (node_args || func_args)
{
/* We can ignore an extraneous __in_chrg arguments in the node.
GCC generated destructors, for example, will have this. */
if ((node_args == NULL_TREE
|| func_args != NULL_TREE)
&& strcmp (IDENTIFIER_POINTER (DECL_NAME (node)), "__in_chrg") != 0)
continue;
}
sh_symbian_add_attribute (function, attr);
/* Propagate the attribute to any function thunks as well. */
for (thunk = DECL_THUNKS (function); thunk; thunk = DECL_CHAIN (thunk))
if (TREE_CODE (thunk) == FUNCTION_DECL)
sh_symbian_add_attribute (thunk, attr);
}
}
if (TREE_CODE (node) == FUNCTION_DECL && DECL_VIRTUAL_P (node))
{
/* Propagate the attribute to any thunks of this function. */
for (thunk = DECL_THUNKS (node); thunk; thunk = DECL_CHAIN (thunk))
if (TREE_CODE (thunk) == FUNCTION_DECL)
sh_symbian_add_attribute (thunk, attr);
}
/* Report error if symbol is not accessible at global scope. */
if (!TREE_PUBLIC (node)
&& ( TREE_CODE (node) == VAR_DECL
|| TREE_CODE (node) == FUNCTION_DECL))
{
error ("external linkage required for symbol %q+D because of %qE attribute",
node, name);
*no_add_attrs = true;
}
#if SYMBIAN_DEBUG
print_node_brief (stderr, "mark node", node, 0);
fprintf (stderr, " as %s\n", attr);
#endif
return NULL_TREE;
}

88
gcc/config/sh/symbian-post.h
View file

@ -1,88 +0,0 @@
/* Definitions for the Symbian OS running on an SH part.
This file is included after all the other target specific headers.
Copyright (C) 2004, 2007 Free Software Foundation, Inc.
Contributed by Red Hat.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#undef TARGET_VERSION
#define TARGET_VERSION \
fputs (" (Renesas SH for Symbian OS)", stderr);
#undef LINK_EMUL_PREFIX
#define LINK_EMUL_PREFIX "shlsymbian"
#define SYMBIAN_EXPORT_NAME(NAME,FILE,DECL) \
do \
{ \
if ((DECL && sh_symbian_is_dllexported (DECL)) \
|| sh_symbian_is_dllexported_name (NAME)) \
{ \
fprintf ((FILE), "\t.pushsection .directive\n"); \
fprintf ((FILE), "\t.asciz \"EXPORT %s\\n\"\n", \
sh_symbian_strip_name_encoding (NAME)); \
fprintf ((FILE), "\t.popsection\n"); \
} \
} \
while (0)
/* Output a function definition label. */
#undef ASM_DECLARE_FUNCTION_NAME
#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
do \
{ \
SYMBIAN_EXPORT_NAME ((NAME), (FILE), (DECL)); \
ASM_OUTPUT_TYPE_DIRECTIVE ((FILE), (NAME), "function"); \
ASM_DECLARE_RESULT ((FILE), DECL_RESULT (DECL)); \
ASM_OUTPUT_LABEL ((FILE), (NAME)); \
} \
while (0)
/* Output the label for an initialized variable. */
#undef ASM_DECLARE_OBJECT_NAME
#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
do \
{ \
HOST_WIDE_INT size; \
\
SYMBIAN_EXPORT_NAME ((NAME), (FILE), (DECL)); \
ASM_OUTPUT_TYPE_DIRECTIVE ((FILE), (NAME), "object"); \
\
size_directive_output = 0; \
if (!flag_inhibit_size_directive \
&& (DECL) \
&& DECL_SIZE (DECL)) \
{ \
size_directive_output = 1; \
size = int_size_in_bytes (TREE_TYPE (DECL)); \
ASM_OUTPUT_SIZE_DIRECTIVE ((FILE), (NAME), size); \
} \
\
ASM_OUTPUT_LABEL ((FILE), (NAME)); \
} \
while (0)
#undef ASM_OUTPUT_LABELREF
#define ASM_OUTPUT_LABELREF(FILE, NAME) \
do \
{ \
asm_fprintf ((FILE), "%U%s", \
sh_symbian_strip_name_encoding (NAME)); \
} \
while (0)

40
gcc/config/sh/symbian-pre.h
View file

@ -1,40 +0,0 @@
/* Definitions for the Symbian OS running on an SH part.
This file is included before any other target specific headers.
Copyright (C) 2004, 2005, 2007 Free Software Foundation, Inc.
Contributed by Red Hat.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* Enable Symbian specific code. */
#define SYMBIAN 1
/* Default to using the Renesas ABI. */
#define TARGET_ABI_DEFAULT MASK_HITACHI
#define SUBTARGET_CPP_SPEC ""
/* Get tree.c to declare merge_dllimport_decl_attributes(). */
#define TARGET_DLLIMPORT_DECL_ATTRIBUTES 1
/* The Symbian OS currently does not support exception handling. */
#define SUBTARGET_CC1PLUS_SPEC "-fno-exceptions"
/* Create constructor/destructor sections without the writable flag.
Symbian puts them into the text segment and munges them later on. */
#define CTORS_SECTION_ASM_OP "\t.section\t.ctors,\"ax\",@progbits"
#define DTORS_SECTION_ASM_OP "\t.section\t.dtors,\"ax\",@progbits"

81
gcc/config/sh/t-symbian
View file

@ -1,81 +0,0 @@
# Copyright (C) 2004, 2006, 2008, 2009 Free Software Foundation, Inc.
#
# This file is part of GCC.
#
# GCC is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3, or (at your option)
# any later version.
#
# GCC is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
sh-c.o: $(srcdir)/config/sh/sh-c.c \
$(CONFIG_H) $(SYSTEM_H) $(TREE_H) $(TM_H) $(TM_P_H) coretypes.h
$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
$(srcdir)/config/sh/sh-c.c
symbian-cxx.o: \
$(srcdir)/config/sh/symbian-cxx.c \
$(srcdir)/config/sh/sh-symbian.h \
$(CONFIG_H) $(SYSTEM_H) $(TM_H) $(TREE_H) $(RTL_H) \
toplev.h output.h coretypes.h flags.h expr.h
$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $<
symbian-c.o: \
$(srcdir)/config/sh/symbian-c.c \
$(srcdir)/config/sh/sh-symbian.h \
$(CONFIG_H) $(SYSTEM_H) $(TM_H) $(TREE_H) $(RTL_H) \
toplev.h output.h coretypes.h flags.h expr.h
$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $<
symbian-base.o: \
$(srcdir)/config/sh/symbian-base.c \
$(srcdir)/config/sh/sh-symbian.h \
$(CONFIG_H) $(SYSTEM_H) $(TM_H) $(TREE_H) $(RTL_H) \
toplev.h output.h coretypes.h flags.h expr.h
$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $<
LIB1ASMSRC = sh/lib1funcs.asm
LIB1ASMFUNCS = _ashiftrt _ashiftrt_n _ashiftlt _lshiftrt _movstr \
_movstr_i4 _mulsi3 _sdivsi3 _sdivsi3_i4 _udivsi3 _udivsi3_i4 _set_fpscr \
$(LIB1ASMFUNCS_CACHE)
# We want fine grained libraries, so use the new code to build the
# floating point emulation libraries.
FPBIT = fp-bit.c
DPBIT = dp-bit.c
dp-bit.c: $(srcdir)/config/fp-bit.c
cat $(srcdir)/config/fp-bit.c >> dp-bit.c
fp-bit.c: $(srcdir)/config/fp-bit.c
echo '#define FLOAT' > fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c
$(T)crt1.o: $(srcdir)/config/sh/crt1.asm $(GCC_PASSES)
$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)crt1.o -x assembler-with-cpp $(srcdir)/config/sh/crt1.asm
$(T)crti.o: $(srcdir)/config/sh/crti.asm $(GCC_PASSES)
$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/sh/crti.asm
$(T)crtn.o: $(srcdir)/config/sh/crtn.asm $(GCC_PASSES)
$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/sh/crtn.asm
$(out_object_file): gt-sh.h
gt-sh.h : s-gtype ; @true
symbian.o: $(srcdir)/config/sh/symbian.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \
$(RTL_H) output.h flags.h $(TREE_H) expr.h toplev.h $(TM_P_H)
$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
$(srcdir)/config/sh/symbian.c
# Local Variables:
# mode: Makefile
# End:

146
gcc/config/svr3.h
View file

@ -1,146 +0,0 @@
/* Operating system specific defines to be used when targeting GCC for
generic System V Release 3 system.
Copyright (C) 1991, 1996, 2000, 2002, 2004, 2007, 2010
Free Software Foundation, Inc.
Contributed by Ron Guilmette (rfg@monkeys.com).
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* Define a symbol indicating that we are using svr3.h. */
#define USING_SVR3_H
/* Define a symbol so that libgcc* can know what sort of operating
environment and assembler syntax we are targeting for. */
#define SVR3_target
/* Assembler, linker, library, and startfile spec's. */
/* The .file command should always begin the output. */
#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
/* This says how to output an assembler line
to define a global common symbol. */
/* We don't use ROUNDED because the standard compiler doesn't,
and the linker gives error messages if a common symbol
has more than one length value. */
#undef ASM_OUTPUT_COMMON
#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
( fputs (".comm ", (FILE)), \
assemble_name ((FILE), (NAME)), \
fprintf ((FILE), ",%lu\n", (unsigned long)(SIZE)))
/* This says how to output an assembler line
to define a local common symbol. */
/* Note that using bss_section here caused errors
in building shared libraries on system V.3. */
#undef ASM_OUTPUT_LOCAL
#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
do { \
int align = exact_log2 (ROUNDED); \
if (align > 2) align = 2; \
switch_to_section (data_section); \
ASM_OUTPUT_ALIGN ((FILE), align == -1 ? 2 : align); \
ASM_OUTPUT_LABEL ((FILE), (NAME)); \
fprintf ((FILE), "\t.set .,.+%u\n", (int)(ROUNDED)); \
} while (0)
/* Output #ident as a .ident. */
#undef ASM_OUTPUT_IDENT
#define ASM_OUTPUT_IDENT(FILE, NAME) \
fprintf (FILE, "\t.ident \"%s\"\n", NAME);
/* Use periods rather than dollar signs in special g++ assembler names. */
#define NO_DOLLAR_IN_LABEL
/* System V Release 3 uses COFF debugging info. */
#define SDB_DEBUGGING_INFO 1
/* We don't want to output DBX debugging information. */
#undef DBX_DEBUGGING_INFO
/* The prefix to add to user-visible assembler symbols.
For System V Release 3 the convention is to prepend a leading
underscore onto user-level symbol names. */
#undef USER_LABEL_PREFIX
#define USER_LABEL_PREFIX "_"
/* This is how to store into the string LABEL
the symbol_ref name of an internal numbered label where
PREFIX is the class of label and NUM is the number within the class.
This is suitable for output with `assemble_name'.
For most svr3 systems, the convention is that any symbol which begins
with a period is not put into the linker symbol table by the assembler. */
#undef ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
sprintf (LABEL, "*%s%s%ld", LOCAL_LABEL_PREFIX, PREFIX, (long)(NUM))
/* We want local labels to start with period if made with asm_fprintf. */
#undef LOCAL_LABEL_PREFIX
#define LOCAL_LABEL_PREFIX "."
/* Support const sections and the ctors and dtors sections for g++. */
/* Define a few machine-specific details of the implementation of
constructors.
The __CTORS_LIST__ goes in the .init section. Define CTOR_LIST_BEGIN
and CTOR_LIST_END to contribute to the .init section an instruction to
push a word containing 0 (or some equivalent of that).
Define TARGET_ASM_CONSTRUCTOR to push the address of the constructor. */
#define INIT_SECTION_ASM_OP "\t.section\t.init"
#define FINI_SECTION_ASM_OP "\t.section .fini,\"x\""
#define DTORS_SECTION_ASM_OP FINI_SECTION_ASM_OP
/* CTOR_LIST_BEGIN and CTOR_LIST_END are machine-dependent
because they push on the stack. */
#ifndef STACK_GROWS_DOWNWARD
/* Constructor list on stack is in reverse order. Go to the end of the
list and go backwards to call constructors in the right order. */
#define DO_GLOBAL_CTORS_BODY \
do { \
func_ptr *p, *beg = alloca (0); \
for (p = beg; *p; p++) \
; \
while (p != beg) \
(*--p) (); \
} while (0)
#else
/* Constructor list on stack is in correct order. Just call them. */
#define DO_GLOBAL_CTORS_BODY \
do { \
func_ptr *p, *beg = alloca (0); \
for (p = beg; *p; ) \
(*p++) (); \
} while (0)
#endif /* STACK_GROWS_DOWNWARD */

47
gcc/config/vax/netbsd.h
View file

@ -1,47 +0,0 @@
/* Definitions of target machine for GNU compiler.
NetBSD/vax a.out version.
Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2007
Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#define TARGET_OS_CPP_BUILTINS() \
do \
{ \
NETBSD_OS_CPP_BUILTINS_AOUT(); \
} \
while (0)
#undef CPP_SPEC
#define CPP_SPEC NETBSD_CPP_SPEC
/* Make gcc agree with <machine/ansi.h> */
#undef SIZE_TYPE
#define SIZE_TYPE "unsigned int"
#undef PTRDIFF_TYPE
#define PTRDIFF_TYPE "int"
/* Until they use ELF or something that handles dwarf2 unwinds
and initialization stuff better. Use sjlj exceptions. */
#undef DWARF2_UNWIND_INFO
/* We use gas, not the UNIX assembler. */
#undef TARGET_DEFAULT
#define TARGET_DEFAULT 0

1
gcc/configure vendored
View file

@ -25837,7 +25837,6 @@ $as_echo "$have_sys_sdt_h" >&6; }
# and later they can use TFmode.
case "$target" in
powerpc*-*-linux* | \
powerpc*-*-gnu* | \
sparc*-*-linux* | \
s390*-*-linux* | \
alpha*-*-linux*)

1
gcc/configure.ac
View file

@ -4421,7 +4421,6 @@ AC_MSG_RESULT($have_sys_sdt_h)
# and later they can use TFmode.
case "$target" in
powerpc*-*-linux* | \
powerpc*-*-gnu* | \
sparc*-*-linux* | \
s390*-*-linux* | \
alpha*-*-linux*)

2
gcc/doc/extend.texi
View file

@ -2551,7 +2551,7 @@ This attribute is ignored for R8C target.
@item interrupt
@cindex interrupt handler functions
Use this attribute on the ARM, AVR, CRX, M32C, M32R/D, m68k, MeP, MIPS,
Use this attribute on the ARM, AVR, M32C, M32R/D, m68k, MeP, MIPS,
RX and Xstormy16 ports to indicate that the specified function is an
interrupt handler. The compiler will generate function entry and exit
sequences suitable for use in an interrupt handler when this attribute

5
gcc/doc/install-old.texi
View file

@ -1,4 +1,5 @@
@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
@c 1999, 2000, 2001, 2002, 2003, 2011 Free Software Foundation, Inc.
@c This is part of the GCC manual.
@c For copying conditions, see the file install.texi.
@ -102,7 +103,7 @@ Here are the possible CPU types:
@c gmicro, fx80, spur and tahoe omitted since they don't work.
1750a, a29k, alpha, arm, avr, c@var{n}, clipper, dsp16xx, elxsi, fr30, h8300,
hppa1.0, hppa1.1, i370, i386, i486, i586, i686, i786, i860, i960, ip2k, m32r,
m68000, m68k, m6811, m6812, m88k, mcore, mips, mipsel, mips64, mips64el,
m68000, m68k, m88k, mcore, mips, mipsel, mips64, mips64el,
mn10200, mn10300, ns32k, pdp11, powerpc, powerpcle, romp, rs6000, sh, sparc,
sparclite, sparc64, v850, vax, we32k.
@end quotation

63
gcc/doc/install.texi
View file

@ -1012,9 +1012,6 @@ predefined set of them.
Some targets provide finer-grained control over which multilibs are built
(e.g., @option{--disable-softfloat}):
@table @code
@item arc-*-elf*
biendian.
@item arm-*-*
fpu, 26bit, underscore, interwork, biendian, nofmult.
@ -2940,8 +2937,6 @@ information are.
@item
@uref{#alpha-dec-osf51,,alpha*-dec-osf5.1}
@item
@uref{#arc-x-elf,,arc-*-elf}
@item
@uref{#arm-x-elf,,arm-*-elf}
@item
@uref{#avr,,avr}
@ -2984,10 +2979,6 @@ information are.
@item
@uref{#m32r-x-elf,,m32r-*-elf}
@item
@uref{#m6811-elf,,m6811-elf}
@item
@uref{#m6812-elf,,m6812-elf}
@item
@uref{#m68k-x-x,,m68k-*-*}
@item
@uref{#m68k-uclinux,,m68k-uclinux}
@ -3137,13 +3128,6 @@ provide a fix shortly.
@c FIXME: still applicable?
@html
<hr />
@end html
@heading @anchor{arc-x-elf}arc-*-elf
Argonaut ARC processor.
This configuration is intended for embedded systems.
@html
<hr />
@end html
@ -3242,35 +3226,6 @@ Pre-packaged tools can be obtained from
information about this platform is available at
@uref{http://developer.axis.com/}.
@html
<hr />
@end html
@heading @anchor{crx}CRX
The CRX CompactRISC architecture is a low-power 32-bit architecture with
fast context switching and architectural extensibility features.
@ifnothtml
@xref{CRX Options,, CRX Options, gcc, Using and Porting the GNU Compiler
Collection (GCC)},
@end ifnothtml
@ifhtml
See ``CRX Options'' in the main manual for a list of CRX-specific options.
@end ifhtml
Use @samp{configure --target=crx-elf --enable-languages=c,c++} to configure
GCC@ for building a CRX cross-compiler. The option @samp{--target=crx-elf}
is also used to build the @samp{newlib} C library for CRX.
It is also possible to build libstdc++-v3 for the CRX architecture. This
needs to be done in a separate step with the following configure settings:
@smallexample
gcc/libstdc++-v3/configure --host=crx-elf --with-newlib \
--enable-sjlj-exceptions --enable-cxx-flags='-fexceptions -frtti'
@end smallexample
@html
<hr />
@end html
@ -3792,20 +3747,6 @@ This configuration is intended for embedded systems.
Renesas M32R processor.
This configuration is intended for embedded systems.
@html
<hr />
@end html
@heading @anchor{m6811-elf}m6811-elf
Motorola 68HC11 family micro controllers. These are used in embedded
applications. There are no standard Unix configurations.
@html
<hr />
@end html
@heading @anchor{m6812-elf}m6812-elf
Motorola 68HC12 family micro controllers. These are used in embedded
applications. There are no standard Unix configurations.
@html
<hr />
@end html
@ -3839,9 +3780,7 @@ be a @option{-mcpu} argument or one of the following values:
GCC 4.3 changed the uClinux configuration so that it uses the
@samp{m68k-linux-gnu} ABI rather than the @samp{m68k-elf} ABI.
It also added improved support for C++ and flat shared libraries,
both of which were ABI changes. However, you can still use the
original ABI by configuring for @samp{m68k-uclinuxoldabi} or
@samp{m68k-@var{vendor}-uclinuxoldabi}.
both of which were ABI changes.
@html

146
gcc/doc/invoke.texi
View file

@ -445,11 +445,6 @@ Objective-C and Objective-C++ Dialects}.
@c Try and put the significant identifier (CPU or system) first,
@c so users have a clue at guessing where the ones they want will be.
@emph{ARC Options}
@gccoptlist{-EB -EL @gol
-mmangle-cpu -mcpu=@var{cpu} -mtext=@var{text-section} @gol
-mdata=@var{data-section} -mrodata=@var{readonly-data-section}}
@emph{ARM Options}
@gccoptlist{-mapcs-frame -mno-apcs-frame @gol
-mabi=@var{name} @gol
@ -501,9 +496,6 @@ Objective-C and Objective-C++ Dialects}.
-melf -maout -melinux -mlinux -sim -sim2 @gol
-mmul-bug-workaround -mno-mul-bug-workaround}
@emph{CRX Options}
@gccoptlist{-mmac -mpush-args}
@emph{Darwin Options}
@gccoptlist{-all_load -allowable_client -arch -arch_errors_fatal @gol
-arch_only -bind_at_load -bundle -bundle_loader @gol
@ -668,11 +660,6 @@ Objective-C and Objective-C++ Dialects}.
-mshared-library-id=n -mid-shared-library -mno-id-shared-library @gol
-mxgot -mno-xgot}
@emph{M68hc1x Options}
@gccoptlist{-m6811 -m6812 -m68hc11 -m68hc12 -m68hcs12 @gol
-mauto-incdec -minmax -mlong-calls -mshort @gol
-msoft-reg-count=@var{count}}
@emph{MCore Options}
@gccoptlist{-mhardlit -mno-hardlit -mdiv -mno-div -mrelax-immediates @gol
-mno-relax-immediates -mwide-bitfields -mno-wide-bitfields @gol
@ -9962,12 +9949,10 @@ platform.
@c in Machine Dependent Options
@menu
* ARC Options::
* ARM Options::
* AVR Options::
* Blackfin Options::
* CRIS Options::
* CRX Options::
* Darwin Options::
* DEC Alpha Options::
* DEC Alpha/VMS Options::
@ -9984,7 +9969,6 @@ platform.
* M32C Options::
* M32R/D Options::
* M680x0 Options::
* M68hc1x Options::
* MCore Options::
* MeP Options::
* MicroBlaze Options::
@ -10012,49 +9996,6 @@ platform.
* zSeries Options::
@end menu
@node ARC Options
@subsection ARC Options
@cindex ARC Options
These options are defined for ARC implementations:
@table @gcctabopt
@item -EL
@opindex EL
Compile code for little endian mode. This is the default.
@item -EB
@opindex EB
Compile code for big endian mode.
@item -mmangle-cpu
@opindex mmangle-cpu
Prepend the name of the CPU to all public symbol names.
In multiple-processor systems, there are many ARC variants with different
instruction and register set characteristics. This flag prevents code
compiled for one CPU to be linked with code compiled for another.
No facility exists for handling variants that are ``almost identical''.
This is an all or nothing option.
@item -mcpu=@var{cpu}
@opindex mcpu
Compile code for ARC variant @var{cpu}.
Which variants are supported depend on the configuration.
All variants support @option{-mcpu=base}, this is the default.
@item -mtext=@var{text-section}
@itemx -mdata=@var{data-section}
@itemx -mrodata=@var{readonly-data-section}
@opindex mtext
@opindex mdata
@opindex mrodata
Put functions, data, and readonly data in @var{text-section},
@var{data-section}, and @var{readonly-data-section} respectively
by default. This can be overridden with the @code{section} attribute.
@xref{Variable Attributes}.
@end table
@node ARM Options
@subsection ARM Options
@cindex ARM options
@ -10795,24 +10736,6 @@ Like @option{-sim}, but pass linker options to locate initialized data at
0x40000000 and zero-initialized data at 0x80000000.
@end table
@node CRX Options
@subsection CRX Options
@cindex CRX Options
These options are defined specifically for the CRX ports.
@table @gcctabopt
@item -mmac
@opindex mmac
Enable the use of multiply-accumulate instructions. Disabled by default.
@item -mpush-args
@opindex mpush-args
Push instructions will be used to pass outgoing arguments when functions
are called. Enabled by default.
@end table
@node Darwin Options
@subsection Darwin Options
@cindex Darwin options
@ -13685,68 +13608,6 @@ position-independent code.
@end table
@node M68hc1x Options
@subsection M68hc1x Options
@cindex M68hc1x options
These are the @samp{-m} options defined for the 68hc11 and 68hc12
microcontrollers. The default values for these options depends on
which style of microcontroller was selected when the compiler was configured;
the defaults for the most common choices are given below.
@table @gcctabopt
@item -m6811
@itemx -m68hc11
@opindex m6811
@opindex m68hc11
Generate output for a 68HC11. This is the default
when the compiler is configured for 68HC11-based systems.
@item -m6812
@itemx -m68hc12
@opindex m6812
@opindex m68hc12
Generate output for a 68HC12. This is the default
when the compiler is configured for 68HC12-based systems.
@item -m68S12
@itemx -m68hcs12
@opindex m68S12
@opindex m68hcs12
Generate output for a 68HCS12.
@item -mauto-incdec
@opindex mauto-incdec
Enable the use of 68HC12 pre and post auto-increment and auto-decrement
addressing modes.
@item -minmax
@itemx -mnominmax
@opindex minmax
@opindex mnominmax
Enable the use of 68HC12 min and max instructions.
@item -mlong-calls
@itemx -mno-long-calls
@opindex mlong-calls
@opindex mno-long-calls
Treat all calls as being far away (near). If calls are assumed to be
far away, the compiler will use the @code{call} instruction to
call a function and the @code{rtc} instruction for returning.
@item -mshort
@opindex mshort
Consider type @code{int} to be 16 bits wide, like @code{short int}.
@item -msoft-reg-count=@var{count}
@opindex msoft-reg-count
Specify the number of pseudo-soft registers which are used for the
code generation. The maximum number is 32. Using more pseudo-soft
register may or may not result in better code depending on the program.
The default is 4 for 68HC11 and 2 for 68HC12.
@end table
@node MCore Options
@subsection MCore Options
@cindex MCore options
@ -15910,11 +15771,6 @@ operating system.
On System V.4 and embedded PowerPC systems compile code for the
Linux-based GNU system.
@item -mcall-gnu
@opindex mcall-gnu
On System V.4 and embedded PowerPC systems compile code for the
Hurd-based GNU system.
@item -mcall-freebsd
@opindex mcall-freebsd
On System V.4 and embedded PowerPC systems compile code for the
@ -16748,7 +16604,7 @@ Comply with the calling conventions defined by Renesas.
@opindex mhitachi
Comply with the calling conventions defined for GCC before the Renesas
conventions were available. This option is the default for all
targets of the SH toolchain except for @samp{sh-symbianelf}.
targets of the SH toolchain.
@item -mnomacsave
@opindex mnomacsave

89
gcc/doc/md.texi
View file

@ -1775,37 +1775,6 @@ Integer constant in the range @minus{}6 @dots{} 5.
A memory address based on Y or Z pointer with displacement.
@end table
@item CRX Architecture---@file{config/crx/crx.h}
@table @code
@item b
Registers from r0 to r14 (registers without stack pointer)
@item l
Register r16 (64-bit accumulator lo register)
@item h
Register r17 (64-bit accumulator hi register)
@item k
Register pair r16-r17. (64-bit accumulator lo-hi pair)
@item I
Constant that fits in 3 bits
@item J
Constant that fits in 4 bits
@item K
Constant that fits in 5 bits
@item L
Constant that is one of @minus{}1, 4, @minus{}4, 7, 8, 12, 16, 20, 32, 48
@item G
Floating point constant that is legal for store immediate
@end table
@item Hewlett-Packard PA-RISC---@file{config/pa/pa.h}
@table @code
@item a
@ -2868,64 +2837,6 @@ Non-register operands allowed in clr
@end table
@item Motorola 68HC11 & 68HC12 families---@file{config/m68hc11/m68hc11.h}
@table @code
@item a
Register `a'
@item b
Register `b'
@item d
Register `d'
@item q
An 8-bit register
@item t
Temporary soft register _.tmp
@item u
A soft register _.d1 to _.d31
@item w
Stack pointer register
@item x
Register `x'
@item y
Register `y'
@item z
Pseudo register `z' (replaced by `x' or `y' at the end)
@item A
An address register: x, y or z
@item B
An address register: x or y
@item D
Register pair (x:d) to form a 32-bit value
@item L
Constants in the range @minus{}65536 to 65535
@item M
Constants whose 16-bit low part is zero
@item N
Constant integer 1 or @minus{}1
@item O
Constant integer 16
@item P
Constants in the range @minus{}8 to 2
@end table
@item Moxie---@file{config/moxie/constraints.md}
@table @code
@item A

22
gcc/testsuite/ChangeLog
View file

@ -1,3 +1,25 @@
2011-03-22 Joseph Myers <joseph@codesourcery.com>
* gcc.c-torture/execute/920501-8.x: Remove.
* gcc.c-torture/execute/930513-1.x: Remove.
* gcc.c-torture/execute/960312-1.x: Remove.
* gcc.c-torture/compile/20000804-1.c,
gcc.c-torture/compile/20001205-1.c,
gcc.c-torture/compile/20001226-1.c,
gcc.c-torture/compile/20010518-2.c,
gcc.c-torture/compile/20020312-1.c,
gcc.c-torture/compile/20020604-1.c,
gcc.c-torture/compile/920501-12.c,
gcc.c-torture/compile/920501-4.c,
gcc.c-torture/compile/920520-1.c,
gcc.c-torture/compile/980506-1.c,
gcc.c-torture/execute/980709-1.x,
gcc.c-torture/execute/990826-0.x: Don't XFAIL or use special
options for m68hc11.
* gcc.dg/cpp/assert4.c: Don't handle ARC.
* gcc.dg/sibcall-3.c, gcc.dg/sibcall-4.c: Don't XFAIL for arc or
m68hc11.
2011-03-22 Nick Clifton <nickc@redhat.com>
* lib/target-supports.exp (check_profiling_available): Add MN10300

4
gcc/testsuite/gcc.c-torture/compile/20000804-1.c
View file

@ -1,10 +1,10 @@
/* This does not work on m68hc11 or h8300 due to the use of an asm
/* This does not work on h8300 due to the use of an asm
statement to force a 'long long' (64-bits) to go in a register. */
/* { dg-do assemble } */
/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && { ilp32 && { ! nonpic } } } { "*" } { "" } } */
/* { dg-skip-if "No 64-bit registers" { m32c-*-* } { "*" } { "" } } */
/* { dg-skip-if "Not enough 64-bit registers" { pdp11-*-* } { "-O0" } { "" } } */
/* { dg-xfail-if "" { m6811-*-* m6812-*-* h8300-*-* } { "*" } { "" } } */
/* { dg-xfail-if "" { h8300-*-* } { "*" } { "" } } */
/* Copyright (C) 2000, 2003 Free Software Foundation */
__complex__ long long f ()

3
gcc/testsuite/gcc.c-torture/compile/20001205-1.c
View file

@ -1,7 +1,4 @@
/* This does not work on m68hc11 due to the asm statement which forces
two 'long' (32-bits) variables to go in registers. */
/* { dg-do assemble } */
/* { dg-xfail-if "" { m6811-*-* m6812-*-* } { "*" } { "" } } */
static inline unsigned long rdfpcr(void)
{

3
gcc/testsuite/gcc.c-torture/compile/20001226-1.c
View file

@ -1,7 +1,4 @@
/* This does not assemble on m68hc11 because the function is larger
than 64K. */
/* { dg-do assemble } */
/* { dg-xfail-if "function larger than 64K" { m6811-*-* } { "*" } { "" } } */
/* { dg-skip-if "too much code for avr" { "avr-*-*" } { "*" } { "" } } */
/* { dg-skip-if "too much code for pdp11" { "pdp11-*-*" } { "*" } { "" } } */
/* { dg-xfail-if "jump beyond 128K not supported" { xtensa*-*-* } { "-O0" } { "" } } */

5
gcc/testsuite/gcc.c-torture/compile/20010518-2.c
View file

@ -1,10 +1,5 @@
/* { dg-do compile } */
/* This test fails on HC11/HC12 when it is compiled without -mshort because
the array is too large (INT_MAX/2 > 64K). Force to use 16-bit ints
for it. */
/* { dg-options "-w -mshort" { target m6811-*-* m6812-*-* } } */
/* Large static storage. */
#include <limits.h>

3
gcc/testsuite/gcc.c-torture/compile/20020312-1.c
View file

@ -1,7 +1,4 @@
/* This does not compile on HC11/HC12 due to the asm which requires
two 32-bit registers. */
/* { dg-do assemble } */
/* { dg-xfail-if "" { m6811-*-* m6812-*-* } { "*" } { "" } } */
/* { dg-skip-if "" { pdp11-*-* } { "-O0" } { "" } } */
/* PR optimization/5892 */

1
gcc/testsuite/gcc.c-torture/compile/20020604-1.c
View file

@ -1,5 +1,4 @@
/* { dg-do assemble } */
/* { dg-xfail-if "The array is too big" { "m6811-*-* m6812-*-*" } { "*" } { "" } } */
/* { dg-skip-if "The array is too big" { "avr-*-*" "pdp11-*-*" } { "*" } { "" } } */
/* { dg-xfail-if "The array too big" { "h8300-*-*" } { "-mno-h" "-mn" } { "" } } */
/* { dg-skip-if "" { m32c-*-* } { } { } } */

3
gcc/testsuite/gcc.c-torture/compile/920501-12.c
View file

@ -1,7 +1,4 @@
/* This test fails on HC11/HC12 when it is compiled without -mshort because
the stack arrays are too large. Force to use 16-bit ints for it. */
/* { dg-do assemble } */
/* { dg-xfail-if "" { m6811-*-* m6812-*-* } { "*" } { "-mshort" } } */
x(x){ return 3 + x;}
a(x){int y[994]; return 3 + x;}

3
gcc/testsuite/gcc.c-torture/compile/920501-4.c
View file

@ -1,7 +1,4 @@
/* This test fails on HC11/HC12 when it is compiled without -mshort because
the 'r0' array is too large. Force to use 16-bit ints for it. */
/* { dg-do assemble } */
/* { dg-xfail-if "" { m6811-*-* m6812-*-* } { "*" } { "-mshort" } } */
foo ()
{

1
gcc/testsuite/gcc.c-torture/compile/920520-1.c
View file

@ -1,5 +1,4 @@
/* { dg-do compile } */
/* { dg-xfail-if "" { m6811-*-* m6812-*-* } { "*" } { "" } } */
/* { dg-skip-if "" { pdp11-*-* } { "*" } { "" } } */
f(){asm("%0"::"r"(1.5F));}g(){asm("%0"::"r"(1.5));}

1
gcc/testsuite/gcc.c-torture/compile/980506-1.c
View file

@ -1,7 +1,6 @@
/* The arrays are too large for the xstormy16 - won't fit in 16 bits. */
/* { dg-do assemble } */
/* { dg-require-effective-target size32plus } */
/* { dg-xfail-if "The array too big" { m6811-*-* m6812-*-* } { "*" } { "" } } /*
/* { dg-skip-if "Array too big" { "avr-*-*" } { "*" } { "" } } */
/* { dg-xfail-if "The array too big" { h8300-*-* } { "-mno-h" "-mn" } { "" } } */

5
gcc/testsuite/gcc.c-torture/execute/920501-8.x
View file

@ -1,5 +0,0 @@
# sprintf() does not support %f on m6811/m6812 target.
if { [istarget "m6811-*-*"] || [istarget "m6812-*-*"]} {
return 1
}
return 0

5
gcc/testsuite/gcc.c-torture/execute/930513-1.x
View file

@ -1,5 +0,0 @@
# sprintf() does not support %f on m6811/m6812 target.
if { [istarget "m6811-*-*"] || [istarget "m6812-*-*"]} {
return 1
}
return 0

7
gcc/testsuite/gcc.c-torture/execute/960312-1.x
View file

@ -1,7 +0,0 @@
# This test fails on HC11/HC12 when it is compiled without -mshort because
# is uses an asm that requires two 32-bit registers (int). It passes
# when using -mshort because there are enough registers; force -mshort.
if { [istarget "m6811-*-*"] || [istarget "m6812-*-*"] } {
set options "-mshort"
}
return 0

4
gcc/testsuite/gcc.c-torture/execute/980709-1.x
View file

@ -1,7 +1,3 @@
# pow() is not available on m6811/m6812 target, this test will not link.
if { [istarget "m6811-*-*"] || [istarget "m6812-*-*"]} {
return 1
}
# XFAIL this test for AIX using -msoft-float.
# This test calls the system libm.a function pow.
# A false failure is reported if -msoft-float is used.

4
gcc/testsuite/gcc.c-torture/execute/990826-0.x
View file

@ -1,7 +1,3 @@
# floor() is not available on m6811/m6812 target, this test will not link.
if { [istarget "m6811-*-*"] || [istarget "m6812-*-*"]} {
return 1
}
# XFAIL this test for AIX using -msoft-float.
# This test calls the system libm.a function floor.
# A false failure is reported if -msoft-float is used.

8
gcc/testsuite/gcc.dg/cpp/assert4.c
View file

@ -139,14 +139,6 @@
/* Check for #cpu and #machine assertions. */
#if defined __arc__
# if !#cpu(arc) || !#machine(arc)
# error
# endif
#elif #cpu(arc) || #machine(arc)
# error
#endif
#if defined __alpha__
# if !#cpu(alpha) || !#machine(alpha) \
|| (defined __alpha_cix__ && !#cpu(cix)) \

2
gcc/testsuite/gcc.dg/sibcall-3.c
View file

@ -5,7 +5,7 @@
Copyright (C) 2002 Free Software Foundation Inc.
Contributed by Hans-Peter Nilsson <hp@bitrange.com> */
/* { dg-do run { xfail { { arc-*-* avr-*-* cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* m68hc1?-*-* mcore-*-* mn10300-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
/* { dg-do run { xfail { { avr-*-* cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
/* -mlongcall disables sibcall patterns. */
/* { dg-skip-if "" { powerpc*-*-* } { "-mlongcall" } { "" } } */
/* { dg-options "-O2 -foptimize-sibling-calls" } */

2
gcc/testsuite/gcc.dg/sibcall-4.c
View file

@ -5,7 +5,7 @@
Copyright (C) 2002 Free Software Foundation Inc.
Contributed by Hans-Peter Nilsson <hp@bitrange.com> */
/* { dg-do run { xfail { { arc-*-* avr-*-* cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* m68hc1?-*-* mcore-*-* mn10300-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
/* { dg-do run { xfail { { avr-*-* cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
/* -mlongcall disables sibcall patterns. */
/* { dg-skip-if "" { powerpc*-*-* } { "-mlongcall" } { "" } } */
/* { dg-options "-O2 -foptimize-sibling-calls" } */

9
libgcc/ChangeLog
View file

@ -1,3 +1,12 @@
2011-03-22 Joseph Myers <joseph@codesourcery.com>
* config.host (alpha*-*-gnu*, arc-*-elf*, arm*-*-netbsd*,
arm-*-pe*, crx-*-elf, i[34567]86-*-netbsd*, i[34567]86-*-pe,
m68hc11-*-*|m6811-*-*, m68hc12-*-*|m6812-*-*, mcore-*-pe*,
powerpc64-*-gnu*, powerpc-*-gnu-gnualtivec*, powerpc-*-gnu*,
sh-*-symbianelf* | sh[12346l]*-*-symbianelf*, vax-*-netbsd*):
Remove cases.
2011-03-14 Andreas Tobler <andreast@fgznet.ch>
* config.host (cpu_type): Add FreeBSD PowerPC specific parts.

32
libgcc/config.host
View file

@ -182,7 +182,7 @@ case ${host} in
then tmake_file=${cpu_type}/t-$rest
fi
;;
alpha*-*-linux* | alpha*-*-gnu*)
alpha*-*-linux*)
tmake_file="${tmake_file} alpha/t-crtfm"
extra_parts="$extra_parts crtfastmath.o"
;;
@ -200,16 +200,12 @@ alpha64-dec-*vms*)
alpha*-dec-*vms*)
tmake_file="vms/t-vms alpha/t-vms"
;;
arc-*-elf*)
;;
arm-wrs-vxworks)
;;
arm*-*-freebsd*)
;;
arm*-*-netbsdelf*)
;;
arm*-*-netbsd*)
;;
arm*-*-linux*) # ARM GNU/Linux with ELF
;;
arm*-*-uclinux*) # ARM ucLinux
@ -224,8 +220,6 @@ arm*-*-elf)
;;
arm*-wince-pe*)
;;
arm-*-pe*)
;;
avr-*-rtems*)
;;
avr-*-*)
@ -248,8 +242,6 @@ crisv32-*-elf | crisv32-*-none | cris-*-elf | cris-*-none)
;;
cris-*-linux* | crisv32-*-linux*)
;;
crx-*-elf)
;;
fido-*-elf)
;;
fr30-*-elf)
@ -289,8 +281,6 @@ x86_64-*-freebsd*)
;;
i[34567]86-*-netbsdelf*)
;;
i[34567]86-*-netbsd*)
;;
x86_64-*-netbsd*)
;;
i[34567]86-*-openbsd2.*|i[34567]86-*openbsd3.[0123])
@ -335,8 +325,6 @@ i[34567]86-*-solaris2*)
;;
i[4567]86-wrs-vxworks|i[4567]86-wrs-vxworksae)
;;
i[34567]86-*-pe)
;;
i[34567]86-*-cygwin* | i[34567]86-*-mingw*)
extra_parts="crtbegin.o crtend.o crtfastmath.o"
tmake_file="i386/t-cygming i386/t-crtfm"
@ -380,10 +368,6 @@ m32r-*-linux*)
;;
m32rle-*-linux*)
;;
m68hc11-*-*|m6811-*-*)
;;
m68hc12-*-*|m6812-*-*)
;;
m68k-*-elf*)
;;
m68k*-*-netbsdelf*)
@ -400,8 +384,6 @@ m68k-*-rtems*)
;;
mcore-*-elf)
;;
mcore-*-pe*)
;;
microblaze*-*-*)
tmake_file="microblaze/t-microblaze"
;;
@ -487,15 +469,6 @@ powerpc-*-rtems*)
powerpc-*-linux* | powerpc64-*-linux*)
tmake_file="${tmake_file} rs6000/t-ppccomm rs6000/t-ldbl128 t-softfp"
;;
powerpc64-*-gnu*)
tmake_file="${tmake_file} rs6000/t-ldbl128 t-softfp"
;;
powerpc-*-gnu-gnualtivec*)
tmake_file="${tmake_file} rs6000/t-ldbl128"
;;
powerpc-*-gnu*)
tmake_file="${tmake_file} rs6000/t-ldbl128"
;;
powerpc-wrs-vxworks|powerpc-wrs-vxworksae)
;;
powerpc-*-lynxos*)
@ -528,7 +501,6 @@ s390x-ibm-tpf*)
score-*-elf)
;;
sh-*-elf* | sh[12346l]*-*-elf* | \
sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \
sh-*-linux* | sh[2346lbe]*-*-linux* | \
sh-*-netbsdelf* | shl*-*-netbsdelf* | sh5-*-netbsd* | sh5l*-*-netbsd* | \
sh64-*-netbsd* | sh64l*-*-netbsd*)
@ -582,8 +554,6 @@ vax-*-linux*)
;;
vax-*-netbsdelf*)
;;
vax-*-netbsd*)
;;
vax-*-openbsd*)
;;
xstormy16-*-elf)

5
libstdc++-v3/ChangeLog
View file

@ -1,3 +1,8 @@
2011-03-22 Joseph Myers <joseph@codesourcery.com>
* configure.ac: Don't handle powerpc*-*-gnu*.
* configure: Regenerate.
2011-03-22 Paolo Carlini <paolo.carlini@oracle.com>
* testsuite/21_strings/basic_string/cons/char/moveable2.cc: Tweak

1
libstdc++-v3/configure vendored
View file

@ -64486,7 +64486,6 @@ $as_echo "$as_me: visibility supported: $enable_visibility" >&6;}
ac_ldbl_compat=no
case "$target" in
powerpc*-*-linux* | \
powerpc*-*-gnu* | \
sparc*-*-linux* | \
s390*-*-linux* | \
alpha*-*-linux*)

1
libstdc++-v3/configure.ac
View file

@ -308,7 +308,6 @@ GLIBCXX_ENABLE_VISIBILITY([yes])
ac_ldbl_compat=no
case "$target" in
powerpc*-*-linux* | \
powerpc*-*-gnu* | \
sparc*-*-linux* | \
s390*-*-linux* | \
alpha*-*-linux*)