RISC-V: Add vloxei64 C++ API intrinsic testcase
gcc/testsuite/ChangeLog: * g++.target/riscv/rvv/base/vloxei64-1.C: New test. * g++.target/riscv/rvv/base/vloxei64-2.C: New test. * g++.target/riscv/rvv/base/vloxei64-3.C: New test. * g++.target/riscv/rvv/base/vloxei64_mu-1.C: New test. * g++.target/riscv/rvv/base/vloxei64_mu-2.C: New test. * g++.target/riscv/rvv/base/vloxei64_mu-3.C: New test. * g++.target/riscv/rvv/base/vloxei64_tu-1.C: New test. * g++.target/riscv/rvv/base/vloxei64_tu-2.C: New test. * g++.target/riscv/rvv/base/vloxei64_tu-3.C: New test. * g++.target/riscv/rvv/base/vloxei64_tum-1.C: New test. * g++.target/riscv/rvv/base/vloxei64_tum-2.C: New test. * g++.target/riscv/rvv/base/vloxei64_tum-3.C: New test. * g++.target/riscv/rvv/base/vloxei64_tumu-1.C: New test. * g++.target/riscv/rvv/base/vloxei64_tumu-2.C: New test. * g++.target/riscv/rvv/base/vloxei64_tumu-3.C: New test.
This commit is contained in:
Ju-Zhe Zhong
Kito Cheng
parent
e5ce6efaab
commit
e9b5a85238
15 changed files with 4698 additions and 0 deletions
518
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64-1.C
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518
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64-1.C
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/* { dg-do compile } */
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/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
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#include "riscv_vector.h"
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vint8mf8_t test___riscv_vloxei64(const int8_t* base,vuint64m1_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vint8mf4_t test___riscv_vloxei64(const int8_t* base,vuint64m2_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vint8mf2_t test___riscv_vloxei64(const int8_t* base,vuint64m4_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vint8m1_t test___riscv_vloxei64(const int8_t* base,vuint64m8_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vint16mf4_t test___riscv_vloxei64(const int16_t* base,vuint64m1_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vint16mf2_t test___riscv_vloxei64(const int16_t* base,vuint64m2_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vint16m1_t test___riscv_vloxei64(const int16_t* base,vuint64m4_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vint16m2_t test___riscv_vloxei64(const int16_t* base,vuint64m8_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vint32mf2_t test___riscv_vloxei64(const int32_t* base,vuint64m1_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vint32m1_t test___riscv_vloxei64(const int32_t* base,vuint64m2_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vint32m2_t test___riscv_vloxei64(const int32_t* base,vuint64m4_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vint32m4_t test___riscv_vloxei64(const int32_t* base,vuint64m8_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vint64m1_t test___riscv_vloxei64(const int64_t* base,vuint64m1_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vint64m2_t test___riscv_vloxei64(const int64_t* base,vuint64m2_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vint64m4_t test___riscv_vloxei64(const int64_t* base,vuint64m4_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vint64m8_t test___riscv_vloxei64(const int64_t* base,vuint64m8_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vuint8mf8_t test___riscv_vloxei64(const uint8_t* base,vuint64m1_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vuint8mf4_t test___riscv_vloxei64(const uint8_t* base,vuint64m2_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vuint8mf2_t test___riscv_vloxei64(const uint8_t* base,vuint64m4_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vuint8m1_t test___riscv_vloxei64(const uint8_t* base,vuint64m8_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vuint16mf4_t test___riscv_vloxei64(const uint16_t* base,vuint64m1_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vuint16mf2_t test___riscv_vloxei64(const uint16_t* base,vuint64m2_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vuint16m1_t test___riscv_vloxei64(const uint16_t* base,vuint64m4_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vuint16m2_t test___riscv_vloxei64(const uint16_t* base,vuint64m8_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vuint32mf2_t test___riscv_vloxei64(const uint32_t* base,vuint64m1_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vuint32m1_t test___riscv_vloxei64(const uint32_t* base,vuint64m2_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vuint32m2_t test___riscv_vloxei64(const uint32_t* base,vuint64m4_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vuint32m4_t test___riscv_vloxei64(const uint32_t* base,vuint64m8_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vuint64m1_t test___riscv_vloxei64(const uint64_t* base,vuint64m1_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vuint64m2_t test___riscv_vloxei64(const uint64_t* base,vuint64m2_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vuint64m4_t test___riscv_vloxei64(const uint64_t* base,vuint64m4_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vuint64m8_t test___riscv_vloxei64(const uint64_t* base,vuint64m8_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vfloat32mf2_t test___riscv_vloxei64(const float* base,vuint64m1_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vfloat32m1_t test___riscv_vloxei64(const float* base,vuint64m2_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vfloat32m2_t test___riscv_vloxei64(const float* base,vuint64m4_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vfloat32m4_t test___riscv_vloxei64(const float* base,vuint64m8_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vfloat64m1_t test___riscv_vloxei64(const double* base,vuint64m1_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vfloat64m2_t test___riscv_vloxei64(const double* base,vuint64m2_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vfloat64m4_t test___riscv_vloxei64(const double* base,vuint64m4_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vfloat64m8_t test___riscv_vloxei64(const double* base,vuint64m8_t bindex,size_t vl)
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{
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return __riscv_vloxei64(base,bindex,vl);
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}
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vint8mf8_t test___riscv_vloxei64(vbool64_t mask,const int8_t* base,vuint64m1_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vint8mf4_t test___riscv_vloxei64(vbool32_t mask,const int8_t* base,vuint64m2_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vint8mf2_t test___riscv_vloxei64(vbool16_t mask,const int8_t* base,vuint64m4_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vint8m1_t test___riscv_vloxei64(vbool8_t mask,const int8_t* base,vuint64m8_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vint16mf4_t test___riscv_vloxei64(vbool64_t mask,const int16_t* base,vuint64m1_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vint16mf2_t test___riscv_vloxei64(vbool32_t mask,const int16_t* base,vuint64m2_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vint16m1_t test___riscv_vloxei64(vbool16_t mask,const int16_t* base,vuint64m4_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vint16m2_t test___riscv_vloxei64(vbool8_t mask,const int16_t* base,vuint64m8_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vint32mf2_t test___riscv_vloxei64(vbool64_t mask,const int32_t* base,vuint64m1_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vint32m1_t test___riscv_vloxei64(vbool32_t mask,const int32_t* base,vuint64m2_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vint32m2_t test___riscv_vloxei64(vbool16_t mask,const int32_t* base,vuint64m4_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vint32m4_t test___riscv_vloxei64(vbool8_t mask,const int32_t* base,vuint64m8_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vint64m1_t test___riscv_vloxei64(vbool64_t mask,const int64_t* base,vuint64m1_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vint64m2_t test___riscv_vloxei64(vbool32_t mask,const int64_t* base,vuint64m2_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vint64m4_t test___riscv_vloxei64(vbool16_t mask,const int64_t* base,vuint64m4_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vint64m8_t test___riscv_vloxei64(vbool8_t mask,const int64_t* base,vuint64m8_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vuint8mf8_t test___riscv_vloxei64(vbool64_t mask,const uint8_t* base,vuint64m1_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vuint8mf4_t test___riscv_vloxei64(vbool32_t mask,const uint8_t* base,vuint64m2_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vuint8mf2_t test___riscv_vloxei64(vbool16_t mask,const uint8_t* base,vuint64m4_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vuint8m1_t test___riscv_vloxei64(vbool8_t mask,const uint8_t* base,vuint64m8_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vuint16mf4_t test___riscv_vloxei64(vbool64_t mask,const uint16_t* base,vuint64m1_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vuint16mf2_t test___riscv_vloxei64(vbool32_t mask,const uint16_t* base,vuint64m2_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vuint16m1_t test___riscv_vloxei64(vbool16_t mask,const uint16_t* base,vuint64m4_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vuint16m2_t test___riscv_vloxei64(vbool8_t mask,const uint16_t* base,vuint64m8_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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vuint32mf2_t test___riscv_vloxei64(vbool64_t mask,const uint32_t* base,vuint64m1_t bindex,size_t vl)
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{
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return __riscv_vloxei64(mask,base,bindex,vl);
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}
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||||
|
||||
|
||||
vuint32m1_t test___riscv_vloxei64(vbool32_t mask,const uint32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint32m2_t test___riscv_vloxei64(vbool16_t mask,const uint32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint32m4_t test___riscv_vloxei64(vbool8_t mask,const uint32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m1_t test___riscv_vloxei64(vbool64_t mask,const uint64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m2_t test___riscv_vloxei64(vbool32_t mask,const uint64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m4_t test___riscv_vloxei64(vbool16_t mask,const uint64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m8_t test___riscv_vloxei64(vbool8_t mask,const uint64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32mf2_t test___riscv_vloxei64(vbool64_t mask,const float* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m1_t test___riscv_vloxei64(vbool32_t mask,const float* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m2_t test___riscv_vloxei64(vbool16_t mask,const float* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m4_t test___riscv_vloxei64(vbool8_t mask,const float* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m1_t test___riscv_vloxei64(vbool64_t mask,const double* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m2_t test___riscv_vloxei64(vbool32_t mask,const double* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m4_t test___riscv_vloxei64(vbool16_t mask,const double* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m8_t test___riscv_vloxei64(vbool8_t mask,const double* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
518
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64-2.C
Normal file
518
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64-2.C
Normal file
|
|
@ -0,0 +1,518 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
|
||||
|
||||
#include "riscv_vector.h"
|
||||
|
||||
vint8mf8_t test___riscv_vloxei64(const int8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint8mf4_t test___riscv_vloxei64(const int8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint8mf2_t test___riscv_vloxei64(const int8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint8m1_t test___riscv_vloxei64(const int8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16mf4_t test___riscv_vloxei64(const int16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16mf2_t test___riscv_vloxei64(const int16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16m1_t test___riscv_vloxei64(const int16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16m2_t test___riscv_vloxei64(const int16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32mf2_t test___riscv_vloxei64(const int32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32m1_t test___riscv_vloxei64(const int32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32m2_t test___riscv_vloxei64(const int32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32m4_t test___riscv_vloxei64(const int32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m1_t test___riscv_vloxei64(const int64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m2_t test___riscv_vloxei64(const int64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m4_t test___riscv_vloxei64(const int64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m8_t test___riscv_vloxei64(const int64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf8_t test___riscv_vloxei64(const uint8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf4_t test___riscv_vloxei64(const uint8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf2_t test___riscv_vloxei64(const uint8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8m1_t test___riscv_vloxei64(const uint8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf4_t test___riscv_vloxei64(const uint16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf2_t test___riscv_vloxei64(const uint16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16m1_t test___riscv_vloxei64(const uint16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16m2_t test___riscv_vloxei64(const uint16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32mf2_t test___riscv_vloxei64(const uint32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32m1_t test___riscv_vloxei64(const uint32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32m2_t test___riscv_vloxei64(const uint32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32m4_t test___riscv_vloxei64(const uint32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m1_t test___riscv_vloxei64(const uint64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m2_t test___riscv_vloxei64(const uint64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m4_t test___riscv_vloxei64(const uint64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m8_t test___riscv_vloxei64(const uint64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32mf2_t test___riscv_vloxei64(const float* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m1_t test___riscv_vloxei64(const float* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m2_t test___riscv_vloxei64(const float* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m4_t test___riscv_vloxei64(const float* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m1_t test___riscv_vloxei64(const double* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m2_t test___riscv_vloxei64(const double* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m4_t test___riscv_vloxei64(const double* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m8_t test___riscv_vloxei64(const double* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint8mf8_t test___riscv_vloxei64(vbool64_t mask,const int8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint8mf4_t test___riscv_vloxei64(vbool32_t mask,const int8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint8mf2_t test___riscv_vloxei64(vbool16_t mask,const int8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint8m1_t test___riscv_vloxei64(vbool8_t mask,const int8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16mf4_t test___riscv_vloxei64(vbool64_t mask,const int16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16mf2_t test___riscv_vloxei64(vbool32_t mask,const int16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16m1_t test___riscv_vloxei64(vbool16_t mask,const int16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16m2_t test___riscv_vloxei64(vbool8_t mask,const int16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32mf2_t test___riscv_vloxei64(vbool64_t mask,const int32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32m1_t test___riscv_vloxei64(vbool32_t mask,const int32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32m2_t test___riscv_vloxei64(vbool16_t mask,const int32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32m4_t test___riscv_vloxei64(vbool8_t mask,const int32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m1_t test___riscv_vloxei64(vbool64_t mask,const int64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m2_t test___riscv_vloxei64(vbool32_t mask,const int64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m4_t test___riscv_vloxei64(vbool16_t mask,const int64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m8_t test___riscv_vloxei64(vbool8_t mask,const int64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf8_t test___riscv_vloxei64(vbool64_t mask,const uint8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf4_t test___riscv_vloxei64(vbool32_t mask,const uint8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf2_t test___riscv_vloxei64(vbool16_t mask,const uint8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8m1_t test___riscv_vloxei64(vbool8_t mask,const uint8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf4_t test___riscv_vloxei64(vbool64_t mask,const uint16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf2_t test___riscv_vloxei64(vbool32_t mask,const uint16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16m1_t test___riscv_vloxei64(vbool16_t mask,const uint16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16m2_t test___riscv_vloxei64(vbool8_t mask,const uint16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32mf2_t test___riscv_vloxei64(vbool64_t mask,const uint32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32m1_t test___riscv_vloxei64(vbool32_t mask,const uint32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32m2_t test___riscv_vloxei64(vbool16_t mask,const uint32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32m4_t test___riscv_vloxei64(vbool8_t mask,const uint32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m1_t test___riscv_vloxei64(vbool64_t mask,const uint64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m2_t test___riscv_vloxei64(vbool32_t mask,const uint64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m4_t test___riscv_vloxei64(vbool16_t mask,const uint64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m8_t test___riscv_vloxei64(vbool8_t mask,const uint64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32mf2_t test___riscv_vloxei64(vbool64_t mask,const float* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m1_t test___riscv_vloxei64(vbool32_t mask,const float* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m2_t test___riscv_vloxei64(vbool16_t mask,const float* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m4_t test___riscv_vloxei64(vbool8_t mask,const float* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m1_t test___riscv_vloxei64(vbool64_t mask,const double* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m2_t test___riscv_vloxei64(vbool32_t mask,const double* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m4_t test___riscv_vloxei64(vbool16_t mask,const double* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m8_t test___riscv_vloxei64(vbool8_t mask,const double* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
518
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64-3.C
Normal file
518
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64-3.C
Normal file
|
|
@ -0,0 +1,518 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
|
||||
|
||||
#include "riscv_vector.h"
|
||||
|
||||
vint8mf8_t test___riscv_vloxei64(const int8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint8mf4_t test___riscv_vloxei64(const int8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint8mf2_t test___riscv_vloxei64(const int8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint8m1_t test___riscv_vloxei64(const int8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16mf4_t test___riscv_vloxei64(const int16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16mf2_t test___riscv_vloxei64(const int16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16m1_t test___riscv_vloxei64(const int16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16m2_t test___riscv_vloxei64(const int16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32mf2_t test___riscv_vloxei64(const int32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32m1_t test___riscv_vloxei64(const int32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32m2_t test___riscv_vloxei64(const int32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32m4_t test___riscv_vloxei64(const int32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m1_t test___riscv_vloxei64(const int64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m2_t test___riscv_vloxei64(const int64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m4_t test___riscv_vloxei64(const int64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m8_t test___riscv_vloxei64(const int64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf8_t test___riscv_vloxei64(const uint8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf4_t test___riscv_vloxei64(const uint8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf2_t test___riscv_vloxei64(const uint8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8m1_t test___riscv_vloxei64(const uint8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf4_t test___riscv_vloxei64(const uint16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf2_t test___riscv_vloxei64(const uint16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16m1_t test___riscv_vloxei64(const uint16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16m2_t test___riscv_vloxei64(const uint16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32mf2_t test___riscv_vloxei64(const uint32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32m1_t test___riscv_vloxei64(const uint32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32m2_t test___riscv_vloxei64(const uint32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32m4_t test___riscv_vloxei64(const uint32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m1_t test___riscv_vloxei64(const uint64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m2_t test___riscv_vloxei64(const uint64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m4_t test___riscv_vloxei64(const uint64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m8_t test___riscv_vloxei64(const uint64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32mf2_t test___riscv_vloxei64(const float* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m1_t test___riscv_vloxei64(const float* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m2_t test___riscv_vloxei64(const float* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m4_t test___riscv_vloxei64(const float* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m1_t test___riscv_vloxei64(const double* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m2_t test___riscv_vloxei64(const double* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m4_t test___riscv_vloxei64(const double* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m8_t test___riscv_vloxei64(const double* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint8mf8_t test___riscv_vloxei64(vbool64_t mask,const int8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint8mf4_t test___riscv_vloxei64(vbool32_t mask,const int8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint8mf2_t test___riscv_vloxei64(vbool16_t mask,const int8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint8m1_t test___riscv_vloxei64(vbool8_t mask,const int8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16mf4_t test___riscv_vloxei64(vbool64_t mask,const int16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16mf2_t test___riscv_vloxei64(vbool32_t mask,const int16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16m1_t test___riscv_vloxei64(vbool16_t mask,const int16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16m2_t test___riscv_vloxei64(vbool8_t mask,const int16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32mf2_t test___riscv_vloxei64(vbool64_t mask,const int32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32m1_t test___riscv_vloxei64(vbool32_t mask,const int32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32m2_t test___riscv_vloxei64(vbool16_t mask,const int32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32m4_t test___riscv_vloxei64(vbool8_t mask,const int32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m1_t test___riscv_vloxei64(vbool64_t mask,const int64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m2_t test___riscv_vloxei64(vbool32_t mask,const int64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m4_t test___riscv_vloxei64(vbool16_t mask,const int64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m8_t test___riscv_vloxei64(vbool8_t mask,const int64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf8_t test___riscv_vloxei64(vbool64_t mask,const uint8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf4_t test___riscv_vloxei64(vbool32_t mask,const uint8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf2_t test___riscv_vloxei64(vbool16_t mask,const uint8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8m1_t test___riscv_vloxei64(vbool8_t mask,const uint8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf4_t test___riscv_vloxei64(vbool64_t mask,const uint16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf2_t test___riscv_vloxei64(vbool32_t mask,const uint16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16m1_t test___riscv_vloxei64(vbool16_t mask,const uint16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16m2_t test___riscv_vloxei64(vbool8_t mask,const uint16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32mf2_t test___riscv_vloxei64(vbool64_t mask,const uint32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32m1_t test___riscv_vloxei64(vbool32_t mask,const uint32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32m2_t test___riscv_vloxei64(vbool16_t mask,const uint32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32m4_t test___riscv_vloxei64(vbool8_t mask,const uint32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m1_t test___riscv_vloxei64(vbool64_t mask,const uint64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m2_t test___riscv_vloxei64(vbool32_t mask,const uint64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m4_t test___riscv_vloxei64(vbool16_t mask,const uint64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m8_t test___riscv_vloxei64(vbool8_t mask,const uint64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32mf2_t test___riscv_vloxei64(vbool64_t mask,const float* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m1_t test___riscv_vloxei64(vbool32_t mask,const float* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m2_t test___riscv_vloxei64(vbool16_t mask,const float* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m4_t test___riscv_vloxei64(vbool8_t mask,const float* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m1_t test___riscv_vloxei64(vbool64_t mask,const double* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m2_t test___riscv_vloxei64(vbool32_t mask,const double* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m4_t test___riscv_vloxei64(vbool16_t mask,const double* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m8_t test___riscv_vloxei64(vbool8_t mask,const double* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64(mask,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_mu-1.C
Normal file
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_mu-1.C
Normal file
|
|
@ -0,0 +1,262 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
|
||||
|
||||
#include "riscv_vector.h"
|
||||
|
||||
vint8mf8_t test___riscv_vloxei64_mu(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint8mf4_t test___riscv_vloxei64_mu(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint8mf2_t test___riscv_vloxei64_mu(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint8m1_t test___riscv_vloxei64_mu(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint16mf4_t test___riscv_vloxei64_mu(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint16mf2_t test___riscv_vloxei64_mu(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint16m1_t test___riscv_vloxei64_mu(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint16m2_t test___riscv_vloxei64_mu(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint32mf2_t test___riscv_vloxei64_mu(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint32m1_t test___riscv_vloxei64_mu(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint32m2_t test___riscv_vloxei64_mu(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint32m4_t test___riscv_vloxei64_mu(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint64m1_t test___riscv_vloxei64_mu(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint64m2_t test___riscv_vloxei64_mu(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint64m4_t test___riscv_vloxei64_mu(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint64m8_t test___riscv_vloxei64_mu(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf8_t test___riscv_vloxei64_mu(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf4_t test___riscv_vloxei64_mu(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf2_t test___riscv_vloxei64_mu(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint8m1_t test___riscv_vloxei64_mu(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf4_t test___riscv_vloxei64_mu(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf2_t test___riscv_vloxei64_mu(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint16m1_t test___riscv_vloxei64_mu(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint16m2_t test___riscv_vloxei64_mu(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint32mf2_t test___riscv_vloxei64_mu(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint32m1_t test___riscv_vloxei64_mu(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint32m2_t test___riscv_vloxei64_mu(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint32m4_t test___riscv_vloxei64_mu(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m1_t test___riscv_vloxei64_mu(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m2_t test___riscv_vloxei64_mu(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m4_t test___riscv_vloxei64_mu(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m8_t test___riscv_vloxei64_mu(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32mf2_t test___riscv_vloxei64_mu(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m1_t test___riscv_vloxei64_mu(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m2_t test___riscv_vloxei64_mu(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m4_t test___riscv_vloxei64_mu(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m1_t test___riscv_vloxei64_mu(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m2_t test___riscv_vloxei64_mu(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m4_t test___riscv_vloxei64_mu(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m8_t test___riscv_vloxei64_mu(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_mu-2.C
Normal file
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_mu-2.C
Normal file
|
|
@ -0,0 +1,262 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
|
||||
|
||||
#include "riscv_vector.h"
|
||||
|
||||
vint8mf8_t test___riscv_vloxei64_mu(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint8mf4_t test___riscv_vloxei64_mu(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint8mf2_t test___riscv_vloxei64_mu(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint8m1_t test___riscv_vloxei64_mu(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16mf4_t test___riscv_vloxei64_mu(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16mf2_t test___riscv_vloxei64_mu(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16m1_t test___riscv_vloxei64_mu(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16m2_t test___riscv_vloxei64_mu(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32mf2_t test___riscv_vloxei64_mu(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32m1_t test___riscv_vloxei64_mu(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32m2_t test___riscv_vloxei64_mu(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32m4_t test___riscv_vloxei64_mu(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m1_t test___riscv_vloxei64_mu(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m2_t test___riscv_vloxei64_mu(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m4_t test___riscv_vloxei64_mu(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m8_t test___riscv_vloxei64_mu(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf8_t test___riscv_vloxei64_mu(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf4_t test___riscv_vloxei64_mu(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf2_t test___riscv_vloxei64_mu(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8m1_t test___riscv_vloxei64_mu(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf4_t test___riscv_vloxei64_mu(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf2_t test___riscv_vloxei64_mu(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16m1_t test___riscv_vloxei64_mu(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16m2_t test___riscv_vloxei64_mu(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32mf2_t test___riscv_vloxei64_mu(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32m1_t test___riscv_vloxei64_mu(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32m2_t test___riscv_vloxei64_mu(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32m4_t test___riscv_vloxei64_mu(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m1_t test___riscv_vloxei64_mu(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m2_t test___riscv_vloxei64_mu(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m4_t test___riscv_vloxei64_mu(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m8_t test___riscv_vloxei64_mu(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32mf2_t test___riscv_vloxei64_mu(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m1_t test___riscv_vloxei64_mu(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m2_t test___riscv_vloxei64_mu(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m4_t test___riscv_vloxei64_mu(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m1_t test___riscv_vloxei64_mu(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m2_t test___riscv_vloxei64_mu(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m4_t test___riscv_vloxei64_mu(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m8_t test___riscv_vloxei64_mu(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_mu-3.C
Normal file
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_mu-3.C
Normal file
|
|
@ -0,0 +1,262 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
|
||||
|
||||
#include "riscv_vector.h"
|
||||
|
||||
vint8mf8_t test___riscv_vloxei64_mu(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint8mf4_t test___riscv_vloxei64_mu(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint8mf2_t test___riscv_vloxei64_mu(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint8m1_t test___riscv_vloxei64_mu(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16mf4_t test___riscv_vloxei64_mu(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16mf2_t test___riscv_vloxei64_mu(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16m1_t test___riscv_vloxei64_mu(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16m2_t test___riscv_vloxei64_mu(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32mf2_t test___riscv_vloxei64_mu(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32m1_t test___riscv_vloxei64_mu(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32m2_t test___riscv_vloxei64_mu(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32m4_t test___riscv_vloxei64_mu(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m1_t test___riscv_vloxei64_mu(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m2_t test___riscv_vloxei64_mu(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m4_t test___riscv_vloxei64_mu(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m8_t test___riscv_vloxei64_mu(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf8_t test___riscv_vloxei64_mu(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf4_t test___riscv_vloxei64_mu(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf2_t test___riscv_vloxei64_mu(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8m1_t test___riscv_vloxei64_mu(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf4_t test___riscv_vloxei64_mu(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf2_t test___riscv_vloxei64_mu(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16m1_t test___riscv_vloxei64_mu(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16m2_t test___riscv_vloxei64_mu(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32mf2_t test___riscv_vloxei64_mu(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32m1_t test___riscv_vloxei64_mu(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32m2_t test___riscv_vloxei64_mu(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32m4_t test___riscv_vloxei64_mu(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m1_t test___riscv_vloxei64_mu(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m2_t test___riscv_vloxei64_mu(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m4_t test___riscv_vloxei64_mu(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m8_t test___riscv_vloxei64_mu(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32mf2_t test___riscv_vloxei64_mu(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m1_t test___riscv_vloxei64_mu(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m2_t test___riscv_vloxei64_mu(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m4_t test___riscv_vloxei64_mu(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m1_t test___riscv_vloxei64_mu(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m2_t test___riscv_vloxei64_mu(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m4_t test___riscv_vloxei64_mu(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m8_t test___riscv_vloxei64_mu(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_mu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_tu-1.C
Normal file
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_tu-1.C
Normal file
|
|
@ -0,0 +1,262 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
|
||||
|
||||
#include "riscv_vector.h"
|
||||
|
||||
vint8mf8_t test___riscv_vloxei64_tu(vint8mf8_t merge,const int8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint8mf4_t test___riscv_vloxei64_tu(vint8mf4_t merge,const int8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint8mf2_t test___riscv_vloxei64_tu(vint8mf2_t merge,const int8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint8m1_t test___riscv_vloxei64_tu(vint8m1_t merge,const int8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint16mf4_t test___riscv_vloxei64_tu(vint16mf4_t merge,const int16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint16mf2_t test___riscv_vloxei64_tu(vint16mf2_t merge,const int16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint16m1_t test___riscv_vloxei64_tu(vint16m1_t merge,const int16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint16m2_t test___riscv_vloxei64_tu(vint16m2_t merge,const int16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint32mf2_t test___riscv_vloxei64_tu(vint32mf2_t merge,const int32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint32m1_t test___riscv_vloxei64_tu(vint32m1_t merge,const int32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint32m2_t test___riscv_vloxei64_tu(vint32m2_t merge,const int32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint32m4_t test___riscv_vloxei64_tu(vint32m4_t merge,const int32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint64m1_t test___riscv_vloxei64_tu(vint64m1_t merge,const int64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint64m2_t test___riscv_vloxei64_tu(vint64m2_t merge,const int64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint64m4_t test___riscv_vloxei64_tu(vint64m4_t merge,const int64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint64m8_t test___riscv_vloxei64_tu(vint64m8_t merge,const int64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf8_t test___riscv_vloxei64_tu(vuint8mf8_t merge,const uint8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf4_t test___riscv_vloxei64_tu(vuint8mf4_t merge,const uint8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf2_t test___riscv_vloxei64_tu(vuint8mf2_t merge,const uint8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint8m1_t test___riscv_vloxei64_tu(vuint8m1_t merge,const uint8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf4_t test___riscv_vloxei64_tu(vuint16mf4_t merge,const uint16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf2_t test___riscv_vloxei64_tu(vuint16mf2_t merge,const uint16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint16m1_t test___riscv_vloxei64_tu(vuint16m1_t merge,const uint16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint16m2_t test___riscv_vloxei64_tu(vuint16m2_t merge,const uint16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint32mf2_t test___riscv_vloxei64_tu(vuint32mf2_t merge,const uint32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint32m1_t test___riscv_vloxei64_tu(vuint32m1_t merge,const uint32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint32m2_t test___riscv_vloxei64_tu(vuint32m2_t merge,const uint32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint32m4_t test___riscv_vloxei64_tu(vuint32m4_t merge,const uint32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m1_t test___riscv_vloxei64_tu(vuint64m1_t merge,const uint64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m2_t test___riscv_vloxei64_tu(vuint64m2_t merge,const uint64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m4_t test___riscv_vloxei64_tu(vuint64m4_t merge,const uint64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m8_t test___riscv_vloxei64_tu(vuint64m8_t merge,const uint64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32mf2_t test___riscv_vloxei64_tu(vfloat32mf2_t merge,const float* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m1_t test___riscv_vloxei64_tu(vfloat32m1_t merge,const float* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m2_t test___riscv_vloxei64_tu(vfloat32m2_t merge,const float* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m4_t test___riscv_vloxei64_tu(vfloat32m4_t merge,const float* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m1_t test___riscv_vloxei64_tu(vfloat64m1_t merge,const double* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m2_t test___riscv_vloxei64_tu(vfloat64m2_t merge,const double* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m4_t test___riscv_vloxei64_tu(vfloat64m4_t merge,const double* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m8_t test___riscv_vloxei64_tu(vfloat64m8_t merge,const double* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_tu-2.C
Normal file
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_tu-2.C
Normal file
|
|
@ -0,0 +1,262 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
|
||||
|
||||
#include "riscv_vector.h"
|
||||
|
||||
vint8mf8_t test___riscv_vloxei64_tu(vint8mf8_t merge,const int8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint8mf4_t test___riscv_vloxei64_tu(vint8mf4_t merge,const int8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint8mf2_t test___riscv_vloxei64_tu(vint8mf2_t merge,const int8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint8m1_t test___riscv_vloxei64_tu(vint8m1_t merge,const int8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16mf4_t test___riscv_vloxei64_tu(vint16mf4_t merge,const int16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16mf2_t test___riscv_vloxei64_tu(vint16mf2_t merge,const int16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16m1_t test___riscv_vloxei64_tu(vint16m1_t merge,const int16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16m2_t test___riscv_vloxei64_tu(vint16m2_t merge,const int16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32mf2_t test___riscv_vloxei64_tu(vint32mf2_t merge,const int32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32m1_t test___riscv_vloxei64_tu(vint32m1_t merge,const int32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32m2_t test___riscv_vloxei64_tu(vint32m2_t merge,const int32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32m4_t test___riscv_vloxei64_tu(vint32m4_t merge,const int32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m1_t test___riscv_vloxei64_tu(vint64m1_t merge,const int64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m2_t test___riscv_vloxei64_tu(vint64m2_t merge,const int64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m4_t test___riscv_vloxei64_tu(vint64m4_t merge,const int64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m8_t test___riscv_vloxei64_tu(vint64m8_t merge,const int64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf8_t test___riscv_vloxei64_tu(vuint8mf8_t merge,const uint8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf4_t test___riscv_vloxei64_tu(vuint8mf4_t merge,const uint8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf2_t test___riscv_vloxei64_tu(vuint8mf2_t merge,const uint8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8m1_t test___riscv_vloxei64_tu(vuint8m1_t merge,const uint8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf4_t test___riscv_vloxei64_tu(vuint16mf4_t merge,const uint16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf2_t test___riscv_vloxei64_tu(vuint16mf2_t merge,const uint16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16m1_t test___riscv_vloxei64_tu(vuint16m1_t merge,const uint16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16m2_t test___riscv_vloxei64_tu(vuint16m2_t merge,const uint16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32mf2_t test___riscv_vloxei64_tu(vuint32mf2_t merge,const uint32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32m1_t test___riscv_vloxei64_tu(vuint32m1_t merge,const uint32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32m2_t test___riscv_vloxei64_tu(vuint32m2_t merge,const uint32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32m4_t test___riscv_vloxei64_tu(vuint32m4_t merge,const uint32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m1_t test___riscv_vloxei64_tu(vuint64m1_t merge,const uint64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m2_t test___riscv_vloxei64_tu(vuint64m2_t merge,const uint64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m4_t test___riscv_vloxei64_tu(vuint64m4_t merge,const uint64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m8_t test___riscv_vloxei64_tu(vuint64m8_t merge,const uint64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32mf2_t test___riscv_vloxei64_tu(vfloat32mf2_t merge,const float* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m1_t test___riscv_vloxei64_tu(vfloat32m1_t merge,const float* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m2_t test___riscv_vloxei64_tu(vfloat32m2_t merge,const float* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m4_t test___riscv_vloxei64_tu(vfloat32m4_t merge,const float* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m1_t test___riscv_vloxei64_tu(vfloat64m1_t merge,const double* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m2_t test___riscv_vloxei64_tu(vfloat64m2_t merge,const double* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m4_t test___riscv_vloxei64_tu(vfloat64m4_t merge,const double* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m8_t test___riscv_vloxei64_tu(vfloat64m8_t merge,const double* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_tu-3.C
Normal file
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_tu-3.C
Normal file
|
|
@ -0,0 +1,262 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
|
||||
|
||||
#include "riscv_vector.h"
|
||||
|
||||
vint8mf8_t test___riscv_vloxei64_tu(vint8mf8_t merge,const int8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint8mf4_t test___riscv_vloxei64_tu(vint8mf4_t merge,const int8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint8mf2_t test___riscv_vloxei64_tu(vint8mf2_t merge,const int8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint8m1_t test___riscv_vloxei64_tu(vint8m1_t merge,const int8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16mf4_t test___riscv_vloxei64_tu(vint16mf4_t merge,const int16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16mf2_t test___riscv_vloxei64_tu(vint16mf2_t merge,const int16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16m1_t test___riscv_vloxei64_tu(vint16m1_t merge,const int16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16m2_t test___riscv_vloxei64_tu(vint16m2_t merge,const int16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32mf2_t test___riscv_vloxei64_tu(vint32mf2_t merge,const int32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32m1_t test___riscv_vloxei64_tu(vint32m1_t merge,const int32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32m2_t test___riscv_vloxei64_tu(vint32m2_t merge,const int32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32m4_t test___riscv_vloxei64_tu(vint32m4_t merge,const int32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m1_t test___riscv_vloxei64_tu(vint64m1_t merge,const int64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m2_t test___riscv_vloxei64_tu(vint64m2_t merge,const int64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m4_t test___riscv_vloxei64_tu(vint64m4_t merge,const int64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m8_t test___riscv_vloxei64_tu(vint64m8_t merge,const int64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf8_t test___riscv_vloxei64_tu(vuint8mf8_t merge,const uint8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf4_t test___riscv_vloxei64_tu(vuint8mf4_t merge,const uint8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf2_t test___riscv_vloxei64_tu(vuint8mf2_t merge,const uint8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8m1_t test___riscv_vloxei64_tu(vuint8m1_t merge,const uint8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf4_t test___riscv_vloxei64_tu(vuint16mf4_t merge,const uint16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf2_t test___riscv_vloxei64_tu(vuint16mf2_t merge,const uint16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16m1_t test___riscv_vloxei64_tu(vuint16m1_t merge,const uint16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16m2_t test___riscv_vloxei64_tu(vuint16m2_t merge,const uint16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32mf2_t test___riscv_vloxei64_tu(vuint32mf2_t merge,const uint32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32m1_t test___riscv_vloxei64_tu(vuint32m1_t merge,const uint32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32m2_t test___riscv_vloxei64_tu(vuint32m2_t merge,const uint32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32m4_t test___riscv_vloxei64_tu(vuint32m4_t merge,const uint32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m1_t test___riscv_vloxei64_tu(vuint64m1_t merge,const uint64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m2_t test___riscv_vloxei64_tu(vuint64m2_t merge,const uint64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m4_t test___riscv_vloxei64_tu(vuint64m4_t merge,const uint64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m8_t test___riscv_vloxei64_tu(vuint64m8_t merge,const uint64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32mf2_t test___riscv_vloxei64_tu(vfloat32mf2_t merge,const float* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m1_t test___riscv_vloxei64_tu(vfloat32m1_t merge,const float* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m2_t test___riscv_vloxei64_tu(vfloat32m2_t merge,const float* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m4_t test___riscv_vloxei64_tu(vfloat32m4_t merge,const float* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m1_t test___riscv_vloxei64_tu(vfloat64m1_t merge,const double* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m2_t test___riscv_vloxei64_tu(vfloat64m2_t merge,const double* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m4_t test___riscv_vloxei64_tu(vfloat64m4_t merge,const double* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m8_t test___riscv_vloxei64_tu(vfloat64m8_t merge,const double* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tu(merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */
|
||||
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_tum-1.C
Normal file
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_tum-1.C
Normal file
|
|
@ -0,0 +1,262 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
|
||||
|
||||
#include "riscv_vector.h"
|
||||
|
||||
vint8mf8_t test___riscv_vloxei64_tum(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint8mf4_t test___riscv_vloxei64_tum(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint8mf2_t test___riscv_vloxei64_tum(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint8m1_t test___riscv_vloxei64_tum(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint16mf4_t test___riscv_vloxei64_tum(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint16mf2_t test___riscv_vloxei64_tum(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint16m1_t test___riscv_vloxei64_tum(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint16m2_t test___riscv_vloxei64_tum(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint32mf2_t test___riscv_vloxei64_tum(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint32m1_t test___riscv_vloxei64_tum(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint32m2_t test___riscv_vloxei64_tum(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint32m4_t test___riscv_vloxei64_tum(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint64m1_t test___riscv_vloxei64_tum(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint64m2_t test___riscv_vloxei64_tum(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint64m4_t test___riscv_vloxei64_tum(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint64m8_t test___riscv_vloxei64_tum(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf8_t test___riscv_vloxei64_tum(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf4_t test___riscv_vloxei64_tum(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf2_t test___riscv_vloxei64_tum(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint8m1_t test___riscv_vloxei64_tum(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf4_t test___riscv_vloxei64_tum(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf2_t test___riscv_vloxei64_tum(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint16m1_t test___riscv_vloxei64_tum(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint16m2_t test___riscv_vloxei64_tum(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint32mf2_t test___riscv_vloxei64_tum(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint32m1_t test___riscv_vloxei64_tum(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint32m2_t test___riscv_vloxei64_tum(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint32m4_t test___riscv_vloxei64_tum(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m1_t test___riscv_vloxei64_tum(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m2_t test___riscv_vloxei64_tum(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m4_t test___riscv_vloxei64_tum(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m8_t test___riscv_vloxei64_tum(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32mf2_t test___riscv_vloxei64_tum(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m1_t test___riscv_vloxei64_tum(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m2_t test___riscv_vloxei64_tum(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m4_t test___riscv_vloxei64_tum(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m1_t test___riscv_vloxei64_tum(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m2_t test___riscv_vloxei64_tum(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m4_t test___riscv_vloxei64_tum(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m8_t test___riscv_vloxei64_tum(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_tum-2.C
Normal file
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_tum-2.C
Normal file
|
|
@ -0,0 +1,262 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
|
||||
|
||||
#include "riscv_vector.h"
|
||||
|
||||
vint8mf8_t test___riscv_vloxei64_tum(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint8mf4_t test___riscv_vloxei64_tum(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint8mf2_t test___riscv_vloxei64_tum(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint8m1_t test___riscv_vloxei64_tum(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16mf4_t test___riscv_vloxei64_tum(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16mf2_t test___riscv_vloxei64_tum(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16m1_t test___riscv_vloxei64_tum(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16m2_t test___riscv_vloxei64_tum(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32mf2_t test___riscv_vloxei64_tum(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32m1_t test___riscv_vloxei64_tum(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32m2_t test___riscv_vloxei64_tum(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32m4_t test___riscv_vloxei64_tum(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m1_t test___riscv_vloxei64_tum(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m2_t test___riscv_vloxei64_tum(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m4_t test___riscv_vloxei64_tum(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m8_t test___riscv_vloxei64_tum(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf8_t test___riscv_vloxei64_tum(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf4_t test___riscv_vloxei64_tum(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf2_t test___riscv_vloxei64_tum(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8m1_t test___riscv_vloxei64_tum(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf4_t test___riscv_vloxei64_tum(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf2_t test___riscv_vloxei64_tum(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16m1_t test___riscv_vloxei64_tum(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16m2_t test___riscv_vloxei64_tum(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32mf2_t test___riscv_vloxei64_tum(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32m1_t test___riscv_vloxei64_tum(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32m2_t test___riscv_vloxei64_tum(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32m4_t test___riscv_vloxei64_tum(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m1_t test___riscv_vloxei64_tum(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m2_t test___riscv_vloxei64_tum(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m4_t test___riscv_vloxei64_tum(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m8_t test___riscv_vloxei64_tum(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32mf2_t test___riscv_vloxei64_tum(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m1_t test___riscv_vloxei64_tum(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m2_t test___riscv_vloxei64_tum(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m4_t test___riscv_vloxei64_tum(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m1_t test___riscv_vloxei64_tum(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m2_t test___riscv_vloxei64_tum(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m4_t test___riscv_vloxei64_tum(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m8_t test___riscv_vloxei64_tum(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_tum-3.C
Normal file
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_tum-3.C
Normal file
|
|
@ -0,0 +1,262 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
|
||||
|
||||
#include "riscv_vector.h"
|
||||
|
||||
vint8mf8_t test___riscv_vloxei64_tum(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint8mf4_t test___riscv_vloxei64_tum(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint8mf2_t test___riscv_vloxei64_tum(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint8m1_t test___riscv_vloxei64_tum(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16mf4_t test___riscv_vloxei64_tum(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16mf2_t test___riscv_vloxei64_tum(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16m1_t test___riscv_vloxei64_tum(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16m2_t test___riscv_vloxei64_tum(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32mf2_t test___riscv_vloxei64_tum(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32m1_t test___riscv_vloxei64_tum(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32m2_t test___riscv_vloxei64_tum(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32m4_t test___riscv_vloxei64_tum(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m1_t test___riscv_vloxei64_tum(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m2_t test___riscv_vloxei64_tum(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m4_t test___riscv_vloxei64_tum(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m8_t test___riscv_vloxei64_tum(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf8_t test___riscv_vloxei64_tum(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf4_t test___riscv_vloxei64_tum(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf2_t test___riscv_vloxei64_tum(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8m1_t test___riscv_vloxei64_tum(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf4_t test___riscv_vloxei64_tum(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf2_t test___riscv_vloxei64_tum(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16m1_t test___riscv_vloxei64_tum(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16m2_t test___riscv_vloxei64_tum(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32mf2_t test___riscv_vloxei64_tum(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32m1_t test___riscv_vloxei64_tum(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32m2_t test___riscv_vloxei64_tum(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32m4_t test___riscv_vloxei64_tum(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m1_t test___riscv_vloxei64_tum(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m2_t test___riscv_vloxei64_tum(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m4_t test___riscv_vloxei64_tum(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m8_t test___riscv_vloxei64_tum(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32mf2_t test___riscv_vloxei64_tum(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m1_t test___riscv_vloxei64_tum(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m2_t test___riscv_vloxei64_tum(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m4_t test___riscv_vloxei64_tum(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m1_t test___riscv_vloxei64_tum(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m2_t test___riscv_vloxei64_tum(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m4_t test___riscv_vloxei64_tum(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m8_t test___riscv_vloxei64_tum(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tum(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_tumu-1.C
Normal file
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_tumu-1.C
Normal file
|
|
@ -0,0 +1,262 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
|
||||
|
||||
#include "riscv_vector.h"
|
||||
|
||||
vint8mf8_t test___riscv_vloxei64_tumu(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint8mf4_t test___riscv_vloxei64_tumu(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint8mf2_t test___riscv_vloxei64_tumu(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint8m1_t test___riscv_vloxei64_tumu(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint16mf4_t test___riscv_vloxei64_tumu(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint16mf2_t test___riscv_vloxei64_tumu(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint16m1_t test___riscv_vloxei64_tumu(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint16m2_t test___riscv_vloxei64_tumu(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint32mf2_t test___riscv_vloxei64_tumu(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint32m1_t test___riscv_vloxei64_tumu(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint32m2_t test___riscv_vloxei64_tumu(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint32m4_t test___riscv_vloxei64_tumu(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint64m1_t test___riscv_vloxei64_tumu(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint64m2_t test___riscv_vloxei64_tumu(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint64m4_t test___riscv_vloxei64_tumu(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vint64m8_t test___riscv_vloxei64_tumu(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf8_t test___riscv_vloxei64_tumu(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf4_t test___riscv_vloxei64_tumu(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf2_t test___riscv_vloxei64_tumu(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint8m1_t test___riscv_vloxei64_tumu(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf4_t test___riscv_vloxei64_tumu(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf2_t test___riscv_vloxei64_tumu(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint16m1_t test___riscv_vloxei64_tumu(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint16m2_t test___riscv_vloxei64_tumu(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint32mf2_t test___riscv_vloxei64_tumu(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint32m1_t test___riscv_vloxei64_tumu(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint32m2_t test___riscv_vloxei64_tumu(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint32m4_t test___riscv_vloxei64_tumu(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m1_t test___riscv_vloxei64_tumu(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m2_t test___riscv_vloxei64_tumu(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m4_t test___riscv_vloxei64_tumu(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vuint64m8_t test___riscv_vloxei64_tumu(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32mf2_t test___riscv_vloxei64_tumu(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m1_t test___riscv_vloxei64_tumu(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m2_t test___riscv_vloxei64_tumu(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m4_t test___riscv_vloxei64_tumu(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m1_t test___riscv_vloxei64_tumu(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m2_t test___riscv_vloxei64_tumu(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m4_t test___riscv_vloxei64_tumu(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m8_t test___riscv_vloxei64_tumu(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,vl);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_tumu-2.C
Normal file
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_tumu-2.C
Normal file
|
|
@ -0,0 +1,262 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
|
||||
|
||||
#include "riscv_vector.h"
|
||||
|
||||
vint8mf8_t test___riscv_vloxei64_tumu(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint8mf4_t test___riscv_vloxei64_tumu(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint8mf2_t test___riscv_vloxei64_tumu(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint8m1_t test___riscv_vloxei64_tumu(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16mf4_t test___riscv_vloxei64_tumu(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16mf2_t test___riscv_vloxei64_tumu(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16m1_t test___riscv_vloxei64_tumu(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint16m2_t test___riscv_vloxei64_tumu(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32mf2_t test___riscv_vloxei64_tumu(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32m1_t test___riscv_vloxei64_tumu(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32m2_t test___riscv_vloxei64_tumu(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint32m4_t test___riscv_vloxei64_tumu(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m1_t test___riscv_vloxei64_tumu(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m2_t test___riscv_vloxei64_tumu(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m4_t test___riscv_vloxei64_tumu(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vint64m8_t test___riscv_vloxei64_tumu(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf8_t test___riscv_vloxei64_tumu(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf4_t test___riscv_vloxei64_tumu(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf2_t test___riscv_vloxei64_tumu(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint8m1_t test___riscv_vloxei64_tumu(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf4_t test___riscv_vloxei64_tumu(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf2_t test___riscv_vloxei64_tumu(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16m1_t test___riscv_vloxei64_tumu(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint16m2_t test___riscv_vloxei64_tumu(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32mf2_t test___riscv_vloxei64_tumu(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32m1_t test___riscv_vloxei64_tumu(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32m2_t test___riscv_vloxei64_tumu(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint32m4_t test___riscv_vloxei64_tumu(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m1_t test___riscv_vloxei64_tumu(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m2_t test___riscv_vloxei64_tumu(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m4_t test___riscv_vloxei64_tumu(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vuint64m8_t test___riscv_vloxei64_tumu(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32mf2_t test___riscv_vloxei64_tumu(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m1_t test___riscv_vloxei64_tumu(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m2_t test___riscv_vloxei64_tumu(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m4_t test___riscv_vloxei64_tumu(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m1_t test___riscv_vloxei64_tumu(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m2_t test___riscv_vloxei64_tumu(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m4_t test___riscv_vloxei64_tumu(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m8_t test___riscv_vloxei64_tumu(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,31);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_tumu-3.C
Normal file
262
gcc/testsuite/g++.target/riscv/rvv/base/vloxei64_tumu-3.C
Normal file
|
|
@ -0,0 +1,262 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
|
||||
|
||||
#include "riscv_vector.h"
|
||||
|
||||
vint8mf8_t test___riscv_vloxei64_tumu(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint8mf4_t test___riscv_vloxei64_tumu(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint8mf2_t test___riscv_vloxei64_tumu(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint8m1_t test___riscv_vloxei64_tumu(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16mf4_t test___riscv_vloxei64_tumu(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16mf2_t test___riscv_vloxei64_tumu(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16m1_t test___riscv_vloxei64_tumu(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint16m2_t test___riscv_vloxei64_tumu(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32mf2_t test___riscv_vloxei64_tumu(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32m1_t test___riscv_vloxei64_tumu(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32m2_t test___riscv_vloxei64_tumu(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint32m4_t test___riscv_vloxei64_tumu(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m1_t test___riscv_vloxei64_tumu(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m2_t test___riscv_vloxei64_tumu(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m4_t test___riscv_vloxei64_tumu(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vint64m8_t test___riscv_vloxei64_tumu(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf8_t test___riscv_vloxei64_tumu(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf4_t test___riscv_vloxei64_tumu(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8mf2_t test___riscv_vloxei64_tumu(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint8m1_t test___riscv_vloxei64_tumu(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf4_t test___riscv_vloxei64_tumu(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16mf2_t test___riscv_vloxei64_tumu(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16m1_t test___riscv_vloxei64_tumu(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint16m2_t test___riscv_vloxei64_tumu(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32mf2_t test___riscv_vloxei64_tumu(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32m1_t test___riscv_vloxei64_tumu(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32m2_t test___riscv_vloxei64_tumu(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint32m4_t test___riscv_vloxei64_tumu(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m1_t test___riscv_vloxei64_tumu(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m2_t test___riscv_vloxei64_tumu(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m4_t test___riscv_vloxei64_tumu(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vuint64m8_t test___riscv_vloxei64_tumu(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32mf2_t test___riscv_vloxei64_tumu(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m1_t test___riscv_vloxei64_tumu(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m2_t test___riscv_vloxei64_tumu(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat32m4_t test___riscv_vloxei64_tumu(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m1_t test___riscv_vloxei64_tumu(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint64m1_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m2_t test___riscv_vloxei64_tumu(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint64m2_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m4_t test___riscv_vloxei64_tumu(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint64m4_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
vfloat64m8_t test___riscv_vloxei64_tumu(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint64m8_t bindex,size_t vl)
|
||||
{
|
||||
return __riscv_vloxei64_tumu(mask,merge,base,bindex,32);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*mu\s+vloxei64\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */
|
||||
Loading…
Add table
Reference in a new issue