diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f2ce11d4d5f..510faab83ab 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2018-03-19 Segher Boessenkool + + PR target/89746 + * config/rs6000/rs6000.md (fix_truncsi2_stfiwx): If we have a + non-TARGET_MFCRF target, and the dest is memory but not 32-bit aligned, + go via a stack temporary. + 2019-03-19 Jakub Jelinek PR target/89378 diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 584b9da6e71..297b884f648 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -5639,13 +5639,13 @@ tmp = gen_reg_rtx (DImode); emit_insn (gen_fctiwz_ (tmp, src)); - if (MEM_P (dest)) + if (MEM_P (dest) && (TARGET_MFCRF || MEM_ALIGN (dest) >= 32)) { dest = rs6000_force_indexed_or_indirect_mem (dest); emit_insn (gen_stfiwx (dest, tmp)); DONE; } - else if (TARGET_POWERPC64 && (TARGET_MFPGPR || TARGET_DIRECT_MOVE)) + else if (TARGET_POWERPC64 && (TARGET_MFPGPR || TARGET_DIRECT_MOVE) && !MEM_P (dest)) { dest = gen_lowpart (DImode, dest); emit_move_insn (dest, tmp);