diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c4a0099bb97..d8db9c9f0ba 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2012-10-22  Julian Brown  <julian@codesourcery.com>
+
+	* config/arm/arm.h (CANNOT_CHANGE_MODE_CLASS): Avoid subreg'ing
+	VFP D registers in big-endian mode.
+
 2012-10-22  Georg-Johann Lay  <avr@gjlay.de>
 
 	* doc/invoke.texi (AVR Options): Document __AVR_ARCH__.
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 4ac5de70862..08eeff5c8d3 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1205,8 +1205,15 @@ enum reg_class
 /* In VFPv1, VFP registers could only be accessed in the mode they
    were set, so subregs would be invalid there.  However, we don't
    support VFPv1 at the moment, and the restriction was lifted in
-   VFPv2.  */
-#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) 0
+   VFPv2.
+   In big-endian mode, modes greater than word size (i.e. DFmode) are stored in
+   VFP registers in little-endian order.  We can't describe that accurately to
+   GCC, so avoid taking subregs of such values.  */
+#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)	\
+  (TARGET_VFP && TARGET_BIG_END				\
+   && (GET_MODE_SIZE (FROM) > UNITS_PER_WORD		\
+       || GET_MODE_SIZE (TO) > UNITS_PER_WORD)		\
+   && reg_classes_intersect_p (VFP_REGS, (CLASS)))
 
 /* The class value for index registers, and the one for base regs.  */
 #define INDEX_REG_CLASS  (TARGET_THUMB1 ? LO_REGS : GENERAL_REGS)