AVX. Fix block absq emit for non AVX-512 targets.
gcc/ * config/i386/sse.md (define_mode_iterator VI1248_AVX512VL_AVX512BW): New. (define_insn "*abs<mode>2"): Use VI1248_AVX512VL_AVX512BW mode iterator. (define_expand "abs<mode>2"): Ditto. gcc/testsuite/ * gcc.target/i386/pr63600.c: New. From-SVN: r216591
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4 changed files with 37 additions and 6 deletions
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2014-10-23 Kirill Yukhin <kirill.yukhin@intel.com>
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* config/i386/sse.md (define_mode_iterator VI1248_AVX512VL_AVX512BW):
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New.
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(define_insn "*abs<mode>2"): Use VI1248_AVX512VL_AVX512BW mode
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iterator.
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(define_expand "abs<mode>2"): Ditto.
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2014-10-23 Kirill Yukhin <kirill.yukhin@intel.com>
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* tree-core.h (tree_var_decl): Extend `function_code' field
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@ -13785,10 +13785,18 @@
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(set (attr "prefix_rex") (symbol_ref "x86_extended_reg_mentioned_p (insn)"))
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(set_attr "mode" "DI")])
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;; Mode iterator to handle singularity w/ absence of V2DI and V4DI
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;; modes for abs instruction on pre AVX-512 targets.
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(define_mode_iterator VI1248_AVX512VL_AVX512BW
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[(V64QI "TARGET_AVX512BW") (V32QI "TARGET_AVX2") V16QI
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(V32HI "TARGET_AVX512BW") (V16HI "TARGET_AVX2") V8HI
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(V16SI "TARGET_AVX512F") (V8SI "TARGET_AVX2") V4SI
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(V8DI "TARGET_AVX512F") (V4DI "TARGET_AVX512VL") (V2DI "TARGET_AVX512VL")])
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(define_insn "*abs<mode>2"
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[(set (match_operand:VI_AVX2 0 "register_operand" "=v")
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(abs:VI_AVX2
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(match_operand:VI_AVX2 1 "nonimmediate_operand" "vm")))]
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[(set (match_operand:VI1248_AVX512VL_AVX512BW 0 "register_operand" "=v")
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(abs:VI1248_AVX512VL_AVX512BW
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(match_operand:VI1248_AVX512VL_AVX512BW 1 "nonimmediate_operand" "vm")))]
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"TARGET_SSSE3"
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"%vpabs<ssemodesuffix>\t{%1, %0|%0, %1}"
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[(set_attr "type" "sselog1")
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@ -13824,9 +13832,9 @@
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(set_attr "mode" "<sseinsnmode>")])
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(define_expand "abs<mode>2"
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[(set (match_operand:VI_AVX2 0 "register_operand")
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(abs:VI_AVX2
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(match_operand:VI_AVX2 1 "nonimmediate_operand")))]
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[(set (match_operand:VI1248_AVX512VL_AVX512BW 0 "register_operand")
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(abs:VI1248_AVX512VL_AVX512BW
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(match_operand:VI1248_AVX512VL_AVX512BW 1 "nonimmediate_operand")))]
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"TARGET_SSE2"
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{
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if (!TARGET_SSSE3)
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@ -1,3 +1,7 @@
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2014-10-10 Kirill Yukhin <kirill.yukhin@intel.com>
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* gcc.target/i386/pr63600.c: New.
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2014-10-23 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
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* gcc.dg/ipa/ipa-icf-21.c: Add -msse2 to dg-options.
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11
gcc/testsuite/gcc.target/i386/pr63600.c
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11
gcc/testsuite/gcc.target/i386/pr63600.c
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/* { dg-do compile } */
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/* { dg-options "-O3 -msse" } */
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long *a, b;
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int c;
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void
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foo (void)
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{
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for (c = 0; c < 64; c++)
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a[c] = b >= 0 ? b : -b;
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}
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