re PR middle-end/37608 (libgcc2.c:1981: ICE: vector VEC(m em_ref_p,base) index domain error, in create_vop_ref_mapping_loop at tree-ssa-lo op-im.c:1519)
PR middle-end/37608 * pa.md (call, call_value): Generate an rtx for register r4 and pass it to PIC call patterns. (call_symref_pic): Revise pattern to expose PIC register save. Remove code generation and attributes from pattern. Change peephole2 to split for noreturn case. Revise split pattern for non noreturn case. (call_symref_64bit, call_reg_pic, call_reg_64bit, call_val_symref_pic, call_val_symref_64bit, call_val_reg_pic, call_val_reg_64bit): Likewise. * pa.c (attr_length_call): Simplify extraction of call rtx. Add some asserts. From-SVN: r141063
This commit is contained in:
John David Anglin
John David Anglin
parent
e47911ce21
commit
e40375e0e2
3 changed files with 365 additions and 354 deletions
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@ -1,3 +1,16 @@
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2008-10-11 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
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PR middle-end/37608
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* pa.md (call, call_value): Generate an rtx for register r4 and pass
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it to PIC call patterns.
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(call_symref_pic): Revise pattern to expose PIC register save. Remove
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code generation and attributes from pattern. Change peephole2 to split
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for noreturn case. Revise split pattern for non noreturn case.
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(call_symref_64bit, call_reg_pic, call_reg_64bit, call_val_symref_pic,
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call_val_symref_64bit, call_val_reg_pic, call_val_reg_64bit): Likewise.
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* pa.c (attr_length_call): Simplify extraction of call rtx. Add some
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asserts.
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2008-10-11 David Edelsohn <edelsohn@gnu.org>
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* config/rs6000/rs6000.md (aux_truncdfsf2): Remove TARGET_SINGLE_FLOAT.
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@ -7377,12 +7377,14 @@ int
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attr_length_call (rtx insn, int sibcall)
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{
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int local_call;
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rtx call_dest;
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rtx call, call_dest;
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tree call_decl;
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int length = 0;
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rtx pat = PATTERN (insn);
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unsigned long distance = -1;
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gcc_assert (GET_CODE (insn) == CALL_INSN);
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if (INSN_ADDRESSES_SET_P ())
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{
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unsigned long total;
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@ -7393,12 +7395,17 @@ attr_length_call (rtx insn, int sibcall)
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distance = -1;
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}
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/* Determine if this is a local call. */
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if (GET_CODE (XVECEXP (pat, 0, 0)) == CALL)
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call_dest = XEXP (XEXP (XVECEXP (pat, 0, 0), 0), 0);
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else
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call_dest = XEXP (XEXP (XEXP (XVECEXP (pat, 0, 0), 1), 0), 0);
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gcc_assert (GET_CODE (pat) == PARALLEL);
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/* Get the call rtx. */
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call = XVECEXP (pat, 0, 0);
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if (GET_CODE (call) == SET)
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call = SET_SRC (call);
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gcc_assert (GET_CODE (call) == CALL);
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/* Determine if this is a local call. */
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call_dest = XEXP (XEXP (call, 0), 0);
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call_decl = SYMBOL_REF_DECL (call_dest);
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local_call = call_decl && targetm.binds_local_p (call_decl);
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@ -7669,19 +7669,20 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
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need to have a use of the PIC register in the return pattern and
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the final save/restore operation is not needed.
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I elected to just clobber %r4 in the PIC patterns and use it instead
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I elected to just use register %r4 in the PIC patterns instead
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of trying to force hppa_pic_save_rtx () to a callee saved register.
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This might have required a new register class and constraint. It
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was also simpler to just handle the restore from a register than a
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generic pseudo. */
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if (TARGET_64BIT)
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{
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rtx r4 = gen_rtx_REG (word_mode, 4);
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if (GET_CODE (op) == SYMBOL_REF)
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call_insn = emit_call_insn (gen_call_symref_64bit (op, nb));
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call_insn = emit_call_insn (gen_call_symref_64bit (op, nb, r4));
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else
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{
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op = force_reg (word_mode, op);
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call_insn = emit_call_insn (gen_call_reg_64bit (op, nb));
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call_insn = emit_call_insn (gen_call_reg_64bit (op, nb, r4));
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}
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}
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else
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@ -7689,17 +7690,22 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
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if (GET_CODE (op) == SYMBOL_REF)
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{
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if (flag_pic)
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call_insn = emit_call_insn (gen_call_symref_pic (op, nb));
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{
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rtx r4 = gen_rtx_REG (word_mode, 4);
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call_insn = emit_call_insn (gen_call_symref_pic (op, nb, r4));
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}
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else
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call_insn = emit_call_insn (gen_call_symref (op, nb));
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}
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else
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{
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rtx tmpreg = gen_rtx_REG (word_mode, 22);
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emit_move_insn (tmpreg, force_reg (word_mode, op));
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if (flag_pic)
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call_insn = emit_call_insn (gen_call_reg_pic (nb));
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{
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rtx r4 = gen_rtx_REG (word_mode, 4);
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call_insn = emit_call_insn (gen_call_reg_pic (nb, r4));
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}
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else
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call_insn = emit_call_insn (gen_call_reg (nb));
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}
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@ -7754,69 +7760,64 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
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(set (attr "length") (symbol_ref "attr_length_call (insn, 0)"))])
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(define_insn "call_symref_pic"
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[(call (mem:SI (match_operand 0 "call_operand_address" ""))
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[(set (match_operand:SI 2 "register_operand" "=&r") (reg:SI 19))
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(call (mem:SI (match_operand 0 "call_operand_address" ""))
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(match_operand 1 "" "i"))
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(clobber (reg:SI 1))
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(clobber (reg:SI 2))
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(clobber (reg:SI 4))
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(use (match_dup 2))
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(use (reg:SI 19))
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(use (const_int 0))]
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"!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT"
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"*
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{
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output_arg_descriptor (insn);
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return output_call (insn, operands[0], 0);
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}"
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[(set_attr "type" "call")
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(set (attr "length")
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(plus (symbol_ref "attr_length_call (insn, 0)")
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(symbol_ref "attr_length_save_restore_dltp (insn)")))])
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"#")
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;; Split out the PIC register save and restore after reload. This is
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;; done only if the function returns. As the split is done after reload,
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;; there are some situations in which we unnecessarily save and restore
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;; %r4. This happens when there is a single call and the PIC register
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;; is "dead" after the call. This isn't easy to fix as the usage of
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;; the PIC register isn't completely determined until the reload pass.
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;; Split out the PIC register save and restore after reload. As the
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;; split is done after reload, there are some situations in which we
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;; unnecessarily save and restore %r4. This happens when there is a
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;; single call and the PIC register is not used after the call.
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;;
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;; The split has to be done since call_from_call_insn () can't handle
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;; the pattern as is. Noreturn calls are special because they have to
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;; terminate the basic block. The split has to contain more than one
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;; insn.
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(define_split
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[(parallel [(call (mem:SI (match_operand 0 "call_operand_address" ""))
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[(parallel [(set (match_operand:SI 2 "register_operand" "") (reg:SI 19))
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(call (mem:SI (match_operand 0 "call_operand_address" ""))
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(match_operand 1 "" ""))
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(clobber (reg:SI 1))
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(clobber (reg:SI 2))
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(clobber (reg:SI 4))
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(use (match_dup 2))
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(use (reg:SI 19))
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(use (const_int 0))])]
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"!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT
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&& reload_completed
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&& !find_reg_note (insn, REG_NORETURN, NULL_RTX)"
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[(set (reg:SI 4) (reg:SI 19))
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"!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT && reload_completed
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&& find_reg_note (insn, REG_NORETURN, NULL_RTX)"
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[(set (match_dup 2) (reg:SI 19))
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(parallel [(call (mem:SI (match_dup 0))
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(match_dup 1))
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(clobber (reg:SI 1))
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(clobber (reg:SI 2))
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(use (reg:SI 19))
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(use (const_int 0))])]
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"")
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(define_split
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[(parallel [(set (match_operand:SI 2 "register_operand" "") (reg:SI 19))
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(call (mem:SI (match_operand 0 "call_operand_address" ""))
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(match_operand 1 "" ""))
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(clobber (reg:SI 1))
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(clobber (reg:SI 2))
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(use (match_dup 2))
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(use (reg:SI 19))
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(use (const_int 0))])]
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"!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT && reload_completed"
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[(set (match_dup 2) (reg:SI 19))
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(parallel [(call (mem:SI (match_dup 0))
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(match_dup 1))
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(clobber (reg:SI 1))
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(clobber (reg:SI 2))
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(use (reg:SI 19))
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(use (const_int 0))])
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(set (reg:SI 19) (reg:SI 4))]
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"")
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;; Remove the clobber of register 4 when optimizing. This has to be
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;; done with a peephole optimization rather than a split because the
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;; split sequence for a call must be longer than one instruction.
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(define_peephole2
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[(parallel [(call (mem:SI (match_operand 0 "call_operand_address" ""))
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(match_operand 1 "" ""))
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(clobber (reg:SI 1))
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(clobber (reg:SI 2))
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(clobber (reg:SI 4))
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(use (reg:SI 19))
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(use (const_int 0))])]
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"!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT && reload_completed"
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[(parallel [(call (mem:SI (match_dup 0))
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(match_dup 1))
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(clobber (reg:SI 1))
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(clobber (reg:SI 2))
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(use (reg:SI 19))
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(use (const_int 0))])]
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(set (reg:SI 19) (match_dup 2))]
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"")
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(define_insn "*call_symref_pic_post_reload"
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@ -7838,44 +7839,61 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
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;; This pattern is split if it is necessary to save and restore the
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;; PIC register.
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(define_insn "call_symref_64bit"
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[(call (mem:SI (match_operand 0 "call_operand_address" ""))
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[(set (match_operand:DI 2 "register_operand" "=&r") (reg:DI 27))
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(call (mem:SI (match_operand 0 "call_operand_address" ""))
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(match_operand 1 "" "i"))
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(clobber (reg:DI 1))
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(clobber (reg:DI 2))
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(clobber (reg:DI 4))
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(use (match_dup 2))
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(use (reg:DI 27))
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(use (reg:DI 29))
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(use (const_int 0))]
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"TARGET_64BIT"
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"*
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{
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output_arg_descriptor (insn);
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return output_call (insn, operands[0], 0);
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}"
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[(set_attr "type" "call")
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(set (attr "length")
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(plus (symbol_ref "attr_length_call (insn, 0)")
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(symbol_ref "attr_length_save_restore_dltp (insn)")))])
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"#")
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;; Split out the PIC register save and restore after reload. This is
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;; done only if the function returns. As the split is done after reload,
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;; there are some situations in which we unnecessarily save and restore
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;; %r4. This happens when there is a single call and the PIC register
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;; is "dead" after the call. This isn't easy to fix as the usage of
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;; the PIC register isn't completely determined until the reload pass.
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;; Split out the PIC register save and restore after reload. As the
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;; split is done after reload, there are some situations in which we
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;; unnecessarily save and restore %r4. This happens when there is a
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;; single call and the PIC register is not used after the call.
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;;
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;; The split has to be done since call_from_call_insn () can't handle
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;; the pattern as is. Noreturn calls are special because they have to
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;; terminate the basic block. The split has to contain more than one
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;; insn.
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(define_split
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[(parallel [(call (mem:SI (match_operand 0 "call_operand_address" ""))
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[(parallel [(set (match_operand:DI 2 "register_operand" "") (reg:DI 27))
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(call (mem:SI (match_operand 0 "call_operand_address" ""))
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(match_operand 1 "" ""))
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(clobber (reg:DI 1))
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(clobber (reg:DI 2))
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(clobber (reg:DI 4))
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(use (match_dup 2))
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(use (reg:DI 27))
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(use (reg:DI 29))
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(use (const_int 0))])]
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"TARGET_64BIT
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&& reload_completed
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&& !find_reg_note (insn, REG_NORETURN, NULL_RTX)"
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[(set (reg:DI 4) (reg:DI 27))
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"TARGET_64BIT && reload_completed
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&& find_reg_note (insn, REG_NORETURN, NULL_RTX)"
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[(set (match_dup 2) (reg:DI 27))
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(parallel [(call (mem:SI (match_dup 0))
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(match_dup 1))
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(clobber (reg:DI 1))
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(clobber (reg:DI 2))
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(use (reg:DI 27))
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(use (reg:DI 29))
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(use (const_int 0))])]
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"")
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(define_split
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[(parallel [(set (match_operand:DI 2 "register_operand" "") (reg:DI 27))
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(call (mem:SI (match_operand 0 "call_operand_address" ""))
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(match_operand 1 "" ""))
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(clobber (reg:DI 1))
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(clobber (reg:DI 2))
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(use (match_dup 2))
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(use (reg:DI 27))
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(use (reg:DI 29))
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(use (const_int 0))])]
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"TARGET_64BIT && reload_completed"
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[(set (match_dup 2) (reg:DI 27))
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(parallel [(call (mem:SI (match_dup 0))
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(match_dup 1))
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(clobber (reg:DI 1))
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@ -7883,29 +7901,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
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(use (reg:DI 27))
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(use (reg:DI 29))
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(use (const_int 0))])
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(set (reg:DI 27) (reg:DI 4))]
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"")
|
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|
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;; Remove the clobber of register 4 when optimizing. This has to be
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;; done with a peephole optimization rather than a split because the
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;; split sequence for a call must be longer than one instruction.
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(define_peephole2
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[(parallel [(call (mem:SI (match_operand 0 "call_operand_address" ""))
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(match_operand 1 "" ""))
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(clobber (reg:DI 1))
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(clobber (reg:DI 2))
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(clobber (reg:DI 4))
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(use (reg:DI 27))
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(use (reg:DI 29))
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(use (const_int 0))])]
|
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"TARGET_64BIT && reload_completed"
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[(parallel [(call (mem:SI (match_dup 0))
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(match_dup 1))
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(clobber (reg:DI 1))
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(clobber (reg:DI 2))
|
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(use (reg:DI 27))
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(use (reg:DI 29))
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(use (const_int 0))])]
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(set (reg:DI 27) (match_dup 2))]
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"")
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|
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(define_insn "*call_symref_64bit_post_reload"
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|
|
@ -7942,68 +7938,64 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
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;; This pattern is split if it is necessary to save and restore the
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;; PIC register.
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(define_insn "call_reg_pic"
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[(call (mem:SI (reg:SI 22))
|
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[(set (match_operand:SI 1 "register_operand" "=&r") (reg:SI 19))
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(call (mem:SI (reg:SI 22))
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(match_operand 0 "" "i"))
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(clobber (reg:SI 1))
|
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(clobber (reg:SI 2))
|
||||
(clobber (reg:SI 4))
|
||||
(use (match_dup 1))
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(use (reg:SI 19))
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(use (const_int 1))]
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"!TARGET_64BIT"
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"*
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{
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return output_indirect_call (insn, gen_rtx_REG (word_mode, 22));
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}"
|
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[(set_attr "type" "dyncall")
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(set (attr "length")
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(plus (symbol_ref "attr_length_indirect_call (insn)")
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(symbol_ref "attr_length_save_restore_dltp (insn)")))])
|
||||
"#")
|
||||
|
||||
;; Split out the PIC register save and restore after reload. This is
|
||||
;; done only if the function returns. As the split is done after reload,
|
||||
;; there are some situations in which we unnecessarily save and restore
|
||||
;; %r4. This happens when there is a single call and the PIC register
|
||||
;; is "dead" after the call. This isn't easy to fix as the usage of
|
||||
;; the PIC register isn't completely determined until the reload pass.
|
||||
;; Split out the PIC register save and restore after reload. As the
|
||||
;; split is done after reload, there are some situations in which we
|
||||
;; unnecessarily save and restore %r4. This happens when there is a
|
||||
;; single call and the PIC register is not used after the call.
|
||||
;;
|
||||
;; The split has to be done since call_from_call_insn () can't handle
|
||||
;; the pattern as is. Noreturn calls are special because they have to
|
||||
;; terminate the basic block. The split has to contain more than one
|
||||
;; insn.
|
||||
(define_split
|
||||
[(parallel [(call (mem:SI (reg:SI 22))
|
||||
[(parallel [(set (match_operand:SI 1 "register_operand" "") (reg:SI 19))
|
||||
(call (mem:SI (reg:SI 22))
|
||||
(match_operand 0 "" ""))
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||||
(clobber (reg:SI 1))
|
||||
(clobber (reg:SI 2))
|
||||
(clobber (reg:SI 4))
|
||||
(use (match_dup 1))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 1))])]
|
||||
"!TARGET_64BIT
|
||||
&& reload_completed
|
||||
&& !find_reg_note (insn, REG_NORETURN, NULL_RTX)"
|
||||
[(set (reg:SI 4) (reg:SI 19))
|
||||
"!TARGET_64BIT && reload_completed
|
||||
&& find_reg_note (insn, REG_NORETURN, NULL_RTX)"
|
||||
[(set (match_dup 1) (reg:SI 19))
|
||||
(parallel [(call (mem:SI (reg:SI 22))
|
||||
(match_dup 0))
|
||||
(clobber (reg:SI 1))
|
||||
(clobber (reg:SI 2))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 1))])]
|
||||
"")
|
||||
|
||||
(define_split
|
||||
[(parallel [(set (match_operand:SI 1 "register_operand" "") (reg:SI 19))
|
||||
(call (mem:SI (reg:SI 22))
|
||||
(match_operand 0 "" ""))
|
||||
(clobber (reg:SI 1))
|
||||
(clobber (reg:SI 2))
|
||||
(use (match_dup 1))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 1))])]
|
||||
"!TARGET_64BIT && reload_completed"
|
||||
[(set (match_dup 1) (reg:SI 19))
|
||||
(parallel [(call (mem:SI (reg:SI 22))
|
||||
(match_dup 0))
|
||||
(clobber (reg:SI 1))
|
||||
(clobber (reg:SI 2))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 1))])
|
||||
(set (reg:SI 19) (reg:SI 4))]
|
||||
"")
|
||||
|
||||
;; Remove the clobber of register 4 when optimizing. This has to be
|
||||
;; done with a peephole optimization rather than a split because the
|
||||
;; split sequence for a call must be longer than one instruction.
|
||||
(define_peephole2
|
||||
[(parallel [(call (mem:SI (reg:SI 22))
|
||||
(match_operand 0 "" ""))
|
||||
(clobber (reg:SI 1))
|
||||
(clobber (reg:SI 2))
|
||||
(clobber (reg:SI 4))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 1))])]
|
||||
"!TARGET_64BIT && reload_completed"
|
||||
[(parallel [(call (mem:SI (reg:SI 22))
|
||||
(match_dup 0))
|
||||
(clobber (reg:SI 1))
|
||||
(clobber (reg:SI 2))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 1))])]
|
||||
(set (reg:SI 19) (match_dup 1))]
|
||||
"")
|
||||
|
||||
(define_insn "*call_reg_pic_post_reload"
|
||||
|
|
@ -8024,73 +8016,75 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
;; This pattern is split if it is necessary to save and restore the
|
||||
;; PIC register.
|
||||
(define_insn "call_reg_64bit"
|
||||
[(call (mem:SI (match_operand:DI 0 "register_operand" "r"))
|
||||
[(set (match_operand:DI 2 "register_operand" "=&r") (reg:DI 27))
|
||||
(call (mem:SI (match_operand:DI 0 "register_operand" "r"))
|
||||
(match_operand 1 "" "i"))
|
||||
(clobber (reg:DI 1))
|
||||
(clobber (reg:DI 2))
|
||||
(clobber (reg:DI 4))
|
||||
(use (match_dup 2))
|
||||
(use (reg:DI 27))
|
||||
(use (reg:DI 29))
|
||||
(use (const_int 1))]
|
||||
"TARGET_64BIT"
|
||||
"*
|
||||
{
|
||||
return output_indirect_call (insn, operands[0]);
|
||||
}"
|
||||
[(set_attr "type" "dyncall")
|
||||
(set (attr "length")
|
||||
(plus (symbol_ref "attr_length_indirect_call (insn)")
|
||||
(symbol_ref "attr_length_save_restore_dltp (insn)")))])
|
||||
"#")
|
||||
|
||||
;; Split out the PIC register save and restore after reload. This is
|
||||
;; done only if the function returns. As the split is done after reload,
|
||||
;; there are some situations in which we unnecessarily save and restore
|
||||
;; %r4. This happens when there is a single call and the PIC register
|
||||
;; is "dead" after the call. This isn't easy to fix as the usage of
|
||||
;; the PIC register isn't completely determined until the reload pass.
|
||||
;; Split out the PIC register save and restore after reload. As the
|
||||
;; split is done after reload, there are some situations in which we
|
||||
;; unnecessarily save and restore %r4. This happens when there is a
|
||||
;; single call and the PIC register is not used after the call.
|
||||
;;
|
||||
;; The split has to be done since call_from_call_insn () can't handle
|
||||
;; the pattern as is. Noreturn calls are special because they have to
|
||||
;; terminate the basic block. The split has to contain more than one
|
||||
;; insn.
|
||||
(define_split
|
||||
[(parallel [(call (mem:SI (match_operand 0 "register_operand" ""))
|
||||
[(parallel [(set (match_operand:DI 2 "register_operand" "") (reg:DI 27))
|
||||
(call (mem:SI (match_operand 0 "register_operand" ""))
|
||||
(match_operand 1 "" ""))
|
||||
(clobber (reg:DI 1))
|
||||
(clobber (reg:DI 2))
|
||||
(clobber (reg:DI 4))
|
||||
(use (match_dup 2))
|
||||
(use (reg:DI 27))
|
||||
(use (reg:DI 29))
|
||||
(use (const_int 1))])]
|
||||
"TARGET_64BIT
|
||||
&& reload_completed
|
||||
&& !find_reg_note (insn, REG_NORETURN, NULL_RTX)"
|
||||
[(set (reg:DI 4) (reg:DI 27))
|
||||
"TARGET_64BIT && reload_completed
|
||||
&& find_reg_note (insn, REG_NORETURN, NULL_RTX)"
|
||||
[(set (match_dup 2) (reg:DI 27))
|
||||
(parallel [(call (mem:SI (match_dup 0))
|
||||
(match_dup 1))
|
||||
(clobber (reg:DI 1))
|
||||
(clobber (reg:DI 2))
|
||||
(use (reg:DI 27))
|
||||
(use (reg:DI 29))
|
||||
(use (const_int 1))])
|
||||
(set (reg:DI 27) (reg:DI 4))]
|
||||
(use (const_int 1))])]
|
||||
"")
|
||||
|
||||
;; Remove the clobber of register 4 when optimizing. This has to be
|
||||
;; done with a peephole optimization rather than a split because the
|
||||
;; split sequence for a call must be longer than one instruction.
|
||||
(define_peephole2
|
||||
[(parallel [(call (mem:SI (match_operand 0 "register_operand" ""))
|
||||
(define_split
|
||||
[(parallel [(set (match_operand:DI 2 "register_operand" "") (reg:DI 27))
|
||||
(call (mem:SI (match_operand 0 "register_operand" ""))
|
||||
(match_operand 1 "" ""))
|
||||
(clobber (reg:DI 1))
|
||||
(clobber (reg:DI 2))
|
||||
(clobber (reg:DI 4))
|
||||
(use (match_dup 2))
|
||||
(use (reg:DI 27))
|
||||
(use (reg:DI 29))
|
||||
(use (const_int 1))])]
|
||||
"TARGET_64BIT && reload_completed"
|
||||
[(parallel [(call (mem:SI (match_dup 0))
|
||||
[(set (match_dup 2) (reg:DI 27))
|
||||
(parallel [(call (mem:SI (match_dup 0))
|
||||
(match_dup 1))
|
||||
(clobber (reg:DI 1))
|
||||
(clobber (reg:DI 2))
|
||||
(use (reg:DI 27))
|
||||
(use (reg:DI 29))
|
||||
(use (const_int 1))])]
|
||||
(use (const_int 1))])
|
||||
(set (reg:DI 27) (match_dup 2))]
|
||||
"")
|
||||
|
||||
(define_insn "*call_reg_64bit_post_reload"
|
||||
[(call (mem:SI (match_operand:DI 0 "register_operand" "r"))
|
||||
(match_operand 1 "" "i"))
|
||||
(clobber (reg:DI 1))
|
||||
(clobber (reg:DI 2))
|
||||
(use (reg:DI 27))
|
||||
(use (reg:DI 29))
|
||||
|
|
@ -8168,19 +8162,22 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
need to have a use of the PIC register in the return pattern and
|
||||
the final save/restore operation is not needed.
|
||||
|
||||
I elected to just clobber %r4 in the PIC patterns and use it instead
|
||||
I elected to just use register %r4 in the PIC patterns instead
|
||||
of trying to force hppa_pic_save_rtx () to a callee saved register.
|
||||
This might have required a new register class and constraint. It
|
||||
was also simpler to just handle the restore from a register than a
|
||||
generic pseudo. */
|
||||
if (TARGET_64BIT)
|
||||
{
|
||||
rtx r4 = gen_rtx_REG (word_mode, 4);
|
||||
if (GET_CODE (op) == SYMBOL_REF)
|
||||
call_insn = emit_call_insn (gen_call_val_symref_64bit (dst, op, nb));
|
||||
call_insn
|
||||
= emit_call_insn (gen_call_val_symref_64bit (dst, op, nb, r4));
|
||||
else
|
||||
{
|
||||
op = force_reg (word_mode, op);
|
||||
call_insn = emit_call_insn (gen_call_val_reg_64bit (dst, op, nb));
|
||||
call_insn
|
||||
= emit_call_insn (gen_call_val_reg_64bit (dst, op, nb, r4));
|
||||
}
|
||||
}
|
||||
else
|
||||
|
|
@ -8188,17 +8185,23 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
if (GET_CODE (op) == SYMBOL_REF)
|
||||
{
|
||||
if (flag_pic)
|
||||
call_insn = emit_call_insn (gen_call_val_symref_pic (dst, op, nb));
|
||||
{
|
||||
rtx r4 = gen_rtx_REG (word_mode, 4);
|
||||
call_insn
|
||||
= emit_call_insn (gen_call_val_symref_pic (dst, op, nb, r4));
|
||||
}
|
||||
else
|
||||
call_insn = emit_call_insn (gen_call_val_symref (dst, op, nb));
|
||||
}
|
||||
else
|
||||
{
|
||||
rtx tmpreg = gen_rtx_REG (word_mode, 22);
|
||||
|
||||
emit_move_insn (tmpreg, force_reg (word_mode, op));
|
||||
if (flag_pic)
|
||||
call_insn = emit_call_insn (gen_call_val_reg_pic (dst, nb));
|
||||
{
|
||||
rtx r4 = gen_rtx_REG (word_mode, 4);
|
||||
call_insn = emit_call_insn (gen_call_val_reg_pic (dst, nb, r4));
|
||||
}
|
||||
else
|
||||
call_insn = emit_call_insn (gen_call_val_reg (dst, nb));
|
||||
}
|
||||
|
|
@ -8224,44 +8227,61 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
(set (attr "length") (symbol_ref "attr_length_call (insn, 0)"))])
|
||||
|
||||
(define_insn "call_val_symref_pic"
|
||||
[(set (match_operand 0 "" "")
|
||||
[(set (match_operand:SI 3 "register_operand" "=&r") (reg:SI 19))
|
||||
(set (match_operand 0 "" "")
|
||||
(call (mem:SI (match_operand 1 "call_operand_address" ""))
|
||||
(match_operand 2 "" "i")))
|
||||
(clobber (reg:SI 1))
|
||||
(clobber (reg:SI 2))
|
||||
(clobber (reg:SI 4))
|
||||
(use (match_dup 3))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 0))]
|
||||
"!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT"
|
||||
"*
|
||||
{
|
||||
output_arg_descriptor (insn);
|
||||
return output_call (insn, operands[1], 0);
|
||||
}"
|
||||
[(set_attr "type" "call")
|
||||
(set (attr "length")
|
||||
(plus (symbol_ref "attr_length_call (insn, 0)")
|
||||
(symbol_ref "attr_length_save_restore_dltp (insn)")))])
|
||||
"#")
|
||||
|
||||
;; Split out the PIC register save and restore after reload. This is
|
||||
;; done only if the function returns. As the split is done after reload,
|
||||
;; there are some situations in which we unnecessarily save and restore
|
||||
;; %r4. This happens when there is a single call and the PIC register
|
||||
;; is "dead" after the call. This isn't easy to fix as the usage of
|
||||
;; the PIC register isn't completely determined until the reload pass.
|
||||
;; Split out the PIC register save and restore after reload. As the
|
||||
;; split is done after reload, there are some situations in which we
|
||||
;; unnecessarily save and restore %r4. This happens when there is a
|
||||
;; single call and the PIC register is not used after the call.
|
||||
;;
|
||||
;; The split has to be done since call_from_call_insn () can't handle
|
||||
;; the pattern as is. Noreturn calls are special because they have to
|
||||
;; terminate the basic block. The split has to contain more than one
|
||||
;; insn.
|
||||
(define_split
|
||||
[(parallel [(set (match_operand 0 "" "")
|
||||
[(parallel [(set (match_operand:SI 3 "register_operand" "") (reg:SI 19))
|
||||
(set (match_operand 0 "" "")
|
||||
(call (mem:SI (match_operand 1 "call_operand_address" ""))
|
||||
(match_operand 2 "" "")))
|
||||
(clobber (reg:SI 1))
|
||||
(clobber (reg:SI 2))
|
||||
(clobber (reg:SI 4))
|
||||
(use (match_dup 3))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 0))])]
|
||||
"!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT
|
||||
&& reload_completed
|
||||
&& !find_reg_note (insn, REG_NORETURN, NULL_RTX)"
|
||||
[(set (reg:SI 4) (reg:SI 19))
|
||||
"!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT && reload_completed
|
||||
&& find_reg_note (insn, REG_NORETURN, NULL_RTX)"
|
||||
[(set (match_dup 3) (reg:SI 19))
|
||||
(parallel [(set (match_dup 0)
|
||||
(call (mem:SI (match_dup 1))
|
||||
(match_dup 2)))
|
||||
(clobber (reg:SI 1))
|
||||
(clobber (reg:SI 2))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 0))])]
|
||||
"")
|
||||
|
||||
(define_split
|
||||
[(parallel [(set (match_operand:SI 3 "register_operand" "") (reg:SI 19))
|
||||
(set (match_operand 0 "" "")
|
||||
(call (mem:SI (match_operand 1 "call_operand_address" ""))
|
||||
(match_operand 2 "" "")))
|
||||
(clobber (reg:SI 1))
|
||||
(clobber (reg:SI 2))
|
||||
(use (match_dup 3))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 0))])]
|
||||
"!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT && reload_completed"
|
||||
[(set (match_dup 3) (reg:SI 19))
|
||||
(parallel [(set (match_dup 0)
|
||||
(call (mem:SI (match_dup 1))
|
||||
(match_dup 2)))
|
||||
|
|
@ -8269,29 +8289,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
(clobber (reg:SI 2))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 0))])
|
||||
(set (reg:SI 19) (reg:SI 4))]
|
||||
"")
|
||||
|
||||
;; Remove the clobber of register 4 when optimizing. This has to be
|
||||
;; done with a peephole optimization rather than a split because the
|
||||
;; split sequence for a call must be longer than one instruction.
|
||||
(define_peephole2
|
||||
[(parallel [(set (match_operand 0 "" "")
|
||||
(call (mem:SI (match_operand 1 "call_operand_address" ""))
|
||||
(match_operand 2 "" "")))
|
||||
(clobber (reg:SI 1))
|
||||
(clobber (reg:SI 2))
|
||||
(clobber (reg:SI 4))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 0))])]
|
||||
"!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT && reload_completed"
|
||||
[(parallel [(set (match_dup 0)
|
||||
(call (mem:SI (match_dup 1))
|
||||
(match_dup 2)))
|
||||
(clobber (reg:SI 1))
|
||||
(clobber (reg:SI 2))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 0))])]
|
||||
(set (reg:SI 19) (match_dup 3))]
|
||||
"")
|
||||
|
||||
(define_insn "*call_val_symref_pic_post_reload"
|
||||
|
|
@ -8314,46 +8312,65 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
;; This pattern is split if it is necessary to save and restore the
|
||||
;; PIC register.
|
||||
(define_insn "call_val_symref_64bit"
|
||||
[(set (match_operand 0 "" "")
|
||||
[(set (match_operand:DI 3 "register_operand" "=&r") (reg:DI 27))
|
||||
(set (match_operand 0 "" "")
|
||||
(call (mem:SI (match_operand 1 "call_operand_address" ""))
|
||||
(match_operand 2 "" "i")))
|
||||
(clobber (reg:DI 1))
|
||||
(clobber (reg:DI 2))
|
||||
(clobber (reg:DI 4))
|
||||
(use (match_dup 3))
|
||||
(use (reg:DI 27))
|
||||
(use (reg:DI 29))
|
||||
(use (const_int 0))]
|
||||
"TARGET_64BIT"
|
||||
"*
|
||||
{
|
||||
output_arg_descriptor (insn);
|
||||
return output_call (insn, operands[1], 0);
|
||||
}"
|
||||
[(set_attr "type" "call")
|
||||
(set (attr "length")
|
||||
(plus (symbol_ref "attr_length_call (insn, 0)")
|
||||
(symbol_ref "attr_length_save_restore_dltp (insn)")))])
|
||||
"#")
|
||||
|
||||
;; Split out the PIC register save and restore after reload. This is
|
||||
;; done only if the function returns. As the split is done after reload,
|
||||
;; there are some situations in which we unnecessarily save and restore
|
||||
;; %r4. This happens when there is a single call and the PIC register
|
||||
;; is "dead" after the call. This isn't easy to fix as the usage of
|
||||
;; the PIC register isn't completely determined until the reload pass.
|
||||
;; Split out the PIC register save and restore after reload. As the
|
||||
;; split is done after reload, there are some situations in which we
|
||||
;; unnecessarily save and restore %r4. This happens when there is a
|
||||
;; single call and the PIC register is not used after the call.
|
||||
;;
|
||||
;; The split has to be done since call_from_call_insn () can't handle
|
||||
;; the pattern as is. Noreturn calls are special because they have to
|
||||
;; terminate the basic block. The split has to contain more than one
|
||||
;; insn.
|
||||
(define_split
|
||||
[(parallel [(set (match_operand 0 "" "")
|
||||
[(parallel [(set (match_operand:DI 3 "register_operand" "") (reg:DI 27))
|
||||
(set (match_operand 0 "" "")
|
||||
(call (mem:SI (match_operand 1 "call_operand_address" ""))
|
||||
(match_operand 2 "" "")))
|
||||
(clobber (reg:DI 1))
|
||||
(clobber (reg:DI 2))
|
||||
(clobber (reg:DI 4))
|
||||
(use (match_dup 3))
|
||||
(use (reg:DI 27))
|
||||
(use (reg:DI 29))
|
||||
(use (const_int 0))])]
|
||||
"TARGET_64BIT
|
||||
&& reload_completed
|
||||
&& !find_reg_note (insn, REG_NORETURN, NULL_RTX)"
|
||||
[(set (reg:DI 4) (reg:DI 27))
|
||||
"TARGET_64BIT && reload_completed
|
||||
&& find_reg_note (insn, REG_NORETURN, NULL_RTX)"
|
||||
[(set (match_dup 3) (reg:DI 27))
|
||||
(parallel [(set (match_dup 0)
|
||||
(call (mem:SI (match_dup 1))
|
||||
(match_dup 2)))
|
||||
(clobber (reg:DI 1))
|
||||
(clobber (reg:DI 2))
|
||||
(use (reg:DI 27))
|
||||
(use (reg:DI 29))
|
||||
(use (const_int 0))])]
|
||||
"")
|
||||
|
||||
(define_split
|
||||
[(parallel [(set (match_operand:DI 3 "register_operand" "") (reg:DI 27))
|
||||
(set (match_operand 0 "" "")
|
||||
(call (mem:SI (match_operand 1 "call_operand_address" ""))
|
||||
(match_operand 2 "" "")))
|
||||
(clobber (reg:DI 1))
|
||||
(clobber (reg:DI 2))
|
||||
(use (match_dup 3))
|
||||
(use (reg:DI 27))
|
||||
(use (reg:DI 29))
|
||||
(use (const_int 0))])]
|
||||
"TARGET_64BIT && reload_completed"
|
||||
[(set (match_dup 3) (reg:DI 27))
|
||||
(parallel [(set (match_dup 0)
|
||||
(call (mem:SI (match_dup 1))
|
||||
(match_dup 2)))
|
||||
|
|
@ -8362,31 +8379,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
(use (reg:DI 27))
|
||||
(use (reg:DI 29))
|
||||
(use (const_int 0))])
|
||||
(set (reg:DI 27) (reg:DI 4))]
|
||||
"")
|
||||
|
||||
;; Remove the clobber of register 4 when optimizing. This has to be
|
||||
;; done with a peephole optimization rather than a split because the
|
||||
;; split sequence for a call must be longer than one instruction.
|
||||
(define_peephole2
|
||||
[(parallel [(set (match_operand 0 "" "")
|
||||
(call (mem:SI (match_operand 1 "call_operand_address" ""))
|
||||
(match_operand 2 "" "")))
|
||||
(clobber (reg:DI 1))
|
||||
(clobber (reg:DI 2))
|
||||
(clobber (reg:DI 4))
|
||||
(use (reg:DI 27))
|
||||
(use (reg:DI 29))
|
||||
(use (const_int 0))])]
|
||||
"TARGET_64BIT && reload_completed"
|
||||
[(parallel [(set (match_dup 0)
|
||||
(call (mem:SI (match_dup 1))
|
||||
(match_dup 2)))
|
||||
(clobber (reg:DI 1))
|
||||
(clobber (reg:DI 2))
|
||||
(use (reg:DI 27))
|
||||
(use (reg:DI 29))
|
||||
(use (const_int 0))])]
|
||||
(set (reg:DI 27) (match_dup 3))]
|
||||
"")
|
||||
|
||||
(define_insn "*call_val_symref_64bit_post_reload"
|
||||
|
|
@ -8425,43 +8418,61 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
;; This pattern is split if it is necessary to save and restore the
|
||||
;; PIC register.
|
||||
(define_insn "call_val_reg_pic"
|
||||
[(set (match_operand 0 "" "")
|
||||
[(set (match_operand:SI 2 "register_operand" "=&r") (reg:SI 19))
|
||||
(set (match_operand 0 "" "")
|
||||
(call (mem:SI (reg:SI 22))
|
||||
(match_operand 1 "" "i")))
|
||||
(clobber (reg:SI 1))
|
||||
(clobber (reg:SI 2))
|
||||
(clobber (reg:SI 4))
|
||||
(use (match_dup 2))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 1))]
|
||||
"!TARGET_64BIT"
|
||||
"*
|
||||
{
|
||||
return output_indirect_call (insn, gen_rtx_REG (word_mode, 22));
|
||||
}"
|
||||
[(set_attr "type" "dyncall")
|
||||
(set (attr "length")
|
||||
(plus (symbol_ref "attr_length_indirect_call (insn)")
|
||||
(symbol_ref "attr_length_save_restore_dltp (insn)")))])
|
||||
"#")
|
||||
|
||||
;; Split out the PIC register save and restore after reload. This is
|
||||
;; done only if the function returns. As the split is done after reload,
|
||||
;; there are some situations in which we unnecessarily save and restore
|
||||
;; %r4. This happens when there is a single call and the PIC register
|
||||
;; is "dead" after the call. This isn't easy to fix as the usage of
|
||||
;; the PIC register isn't completely determined until the reload pass.
|
||||
;; Split out the PIC register save and restore after reload. As the
|
||||
;; split is done after reload, there are some situations in which we
|
||||
;; unnecessarily save and restore %r4. This happens when there is a
|
||||
;; single call and the PIC register is not used after the call.
|
||||
;;
|
||||
;; The split has to be done since call_from_call_insn () can't handle
|
||||
;; the pattern as is. Noreturn calls are special because they have to
|
||||
;; terminate the basic block. The split has to contain more than one
|
||||
;; insn.
|
||||
(define_split
|
||||
[(parallel [(set (match_operand 0 "" "")
|
||||
[(parallel [(set (match_operand:SI 2 "register_operand" "") (reg:SI 19))
|
||||
(set (match_operand 0 "" "")
|
||||
(call (mem:SI (reg:SI 22))
|
||||
(match_operand 1 "" "")))
|
||||
(clobber (reg:SI 1))
|
||||
(clobber (reg:SI 2))
|
||||
(clobber (reg:SI 4))
|
||||
(use (match_dup 2))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 1))])]
|
||||
"!TARGET_64BIT
|
||||
&& reload_completed
|
||||
&& !find_reg_note (insn, REG_NORETURN, NULL_RTX)"
|
||||
[(set (reg:SI 4) (reg:SI 19))
|
||||
"!TARGET_64BIT && reload_completed
|
||||
&& find_reg_note (insn, REG_NORETURN, NULL_RTX)"
|
||||
[(set (match_dup 2) (reg:SI 19))
|
||||
(parallel [(set (match_dup 0)
|
||||
(call (mem:SI (reg:SI 22))
|
||||
(match_dup 1)))
|
||||
(clobber (reg:SI 1))
|
||||
(clobber (reg:SI 2))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 1))])]
|
||||
"")
|
||||
|
||||
(define_split
|
||||
[(parallel [(set (match_operand:SI 2 "register_operand" "") (reg:SI 19))
|
||||
(set (match_operand 0 "" "")
|
||||
(call (mem:SI (reg:SI 22))
|
||||
(match_operand 1 "" "")))
|
||||
(clobber (reg:SI 1))
|
||||
(clobber (reg:SI 2))
|
||||
(use (match_dup 2))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 1))])]
|
||||
"!TARGET_64BIT && reload_completed"
|
||||
[(set (match_dup 2) (reg:SI 19))
|
||||
(parallel [(set (match_dup 0)
|
||||
(call (mem:SI (reg:SI 22))
|
||||
(match_dup 1)))
|
||||
|
|
@ -8469,29 +8480,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
(clobber (reg:SI 2))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 1))])
|
||||
(set (reg:SI 19) (reg:SI 4))]
|
||||
"")
|
||||
|
||||
;; Remove the clobber of register 4 when optimizing. This has to be
|
||||
;; done with a peephole optimization rather than a split because the
|
||||
;; split sequence for a call must be longer than one instruction.
|
||||
(define_peephole2
|
||||
[(parallel [(set (match_operand 0 "" "")
|
||||
(call (mem:SI (reg:SI 22))
|
||||
(match_operand 1 "" "")))
|
||||
(clobber (reg:SI 1))
|
||||
(clobber (reg:SI 2))
|
||||
(clobber (reg:SI 4))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 1))])]
|
||||
"!TARGET_64BIT && reload_completed"
|
||||
[(parallel [(set (match_dup 0)
|
||||
(call (mem:SI (reg:SI 22))
|
||||
(match_dup 1)))
|
||||
(clobber (reg:SI 1))
|
||||
(clobber (reg:SI 2))
|
||||
(use (reg:SI 19))
|
||||
(use (const_int 1))])]
|
||||
(set (reg:SI 19) (match_dup 2))]
|
||||
"")
|
||||
|
||||
(define_insn "*call_val_reg_pic_post_reload"
|
||||
|
|
@ -8513,79 +8502,81 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
|
|||
;; This pattern is split if it is necessary to save and restore the
|
||||
;; PIC register.
|
||||
(define_insn "call_val_reg_64bit"
|
||||
[(set (match_operand 0 "" "")
|
||||
[(set (match_operand:DI 3 "register_operand" "=&r") (reg:DI 27))
|
||||
(set (match_operand 0 "" "")
|
||||
(call (mem:SI (match_operand:DI 1 "register_operand" "r"))
|
||||
(match_operand 2 "" "i")))
|
||||
(clobber (reg:DI 1))
|
||||
(clobber (reg:DI 2))
|
||||
(clobber (reg:DI 4))
|
||||
(use (match_dup 3))
|
||||
(use (reg:DI 27))
|
||||
(use (reg:DI 29))
|
||||
(use (const_int 1))]
|
||||
"TARGET_64BIT"
|
||||
"*
|
||||
{
|
||||
return output_indirect_call (insn, operands[1]);
|
||||
}"
|
||||
[(set_attr "type" "dyncall")
|
||||
(set (attr "length")
|
||||
(plus (symbol_ref "attr_length_indirect_call (insn)")
|
||||
(symbol_ref "attr_length_save_restore_dltp (insn)")))])
|
||||
"#")
|
||||
|
||||
;; Split out the PIC register save and restore after reload. This is
|
||||
;; done only if the function returns. As the split is done after reload,
|
||||
;; there are some situations in which we unnecessarily save and restore
|
||||
;; %r4. This happens when there is a single call and the PIC register
|
||||
;; is "dead" after the call. This isn't easy to fix as the usage of
|
||||
;; the PIC register isn't completely determined until the reload pass.
|
||||
;; Split out the PIC register save and restore after reload. As the
|
||||
;; split is done after reload, there are some situations in which we
|
||||
;; unnecessarily save and restore %r4. This happens when there is a
|
||||
;; single call and the PIC register is not used after the call.
|
||||
;;
|
||||
;; The split has to be done since call_from_call_insn () can't handle
|
||||
;; the pattern as is. Noreturn calls are special because they have to
|
||||
;; terminate the basic block. The split has to contain more than one
|
||||
;; insn.
|
||||
(define_split
|
||||
[(parallel [(set (match_operand 0 "" "")
|
||||
[(parallel [(set (match_operand:DI 3 "register_operand" "") (reg:DI 27))
|
||||
(set (match_operand 0 "" "")
|
||||
(call (mem:SI (match_operand:DI 1 "register_operand" ""))
|
||||
(match_operand 2 "" "")))
|
||||
(clobber (reg:DI 1))
|
||||
(clobber (reg:DI 2))
|
||||
(clobber (reg:DI 4))
|
||||
(use (match_dup 3))
|
||||
(use (reg:DI 27))
|
||||
(use (reg:DI 29))
|
||||
(use (const_int 1))])]
|
||||
"TARGET_64BIT
|
||||
&& reload_completed
|
||||
&& !find_reg_note (insn, REG_NORETURN, NULL_RTX)"
|
||||
[(set (reg:DI 4) (reg:DI 27))
|
||||
"TARGET_64BIT && reload_completed
|
||||
&& find_reg_note (insn, REG_NORETURN, NULL_RTX)"
|
||||
[(set (match_dup 3) (reg:DI 27))
|
||||
(parallel [(set (match_dup 0)
|
||||
(call (mem:SI (match_dup 1))
|
||||
(match_dup 2)))
|
||||
(clobber (reg:DI 1))
|
||||
(clobber (reg:DI 2))
|
||||
(use (reg:DI 27))
|
||||
(use (reg:DI 29))
|
||||
(use (const_int 1))])
|
||||
(set (reg:DI 27) (reg:DI 4))]
|
||||
(use (const_int 1))])]
|
||||
"")
|
||||
|
||||
;; Remove the clobber of register 4 when optimizing. This has to be
|
||||
;; done with a peephole optimization rather than a split because the
|
||||
;; split sequence for a call must be longer than one instruction.
|
||||
(define_peephole2
|
||||
[(parallel [(set (match_operand 0 "" "")
|
||||
(define_split
|
||||
[(parallel [(set (match_operand:DI 3 "register_operand" "") (reg:DI 27))
|
||||
(set (match_operand 0 "" "")
|
||||
(call (mem:SI (match_operand:DI 1 "register_operand" ""))
|
||||
(match_operand 2 "" "")))
|
||||
(clobber (reg:DI 1))
|
||||
(clobber (reg:DI 2))
|
||||
(clobber (reg:DI 4))
|
||||
(use (match_dup 3))
|
||||
(use (reg:DI 27))
|
||||
(use (reg:DI 29))
|
||||
(use (const_int 1))])]
|
||||
"TARGET_64BIT && reload_completed"
|
||||
[(parallel [(set (match_dup 0)
|
||||
[(set (match_dup 3) (reg:DI 27))
|
||||
(parallel [(set (match_dup 0)
|
||||
(call (mem:SI (match_dup 1))
|
||||
(match_dup 2)))
|
||||
(clobber (reg:DI 1))
|
||||
(clobber (reg:DI 2))
|
||||
(use (reg:DI 27))
|
||||
(use (reg:DI 29))
|
||||
(use (const_int 1))])]
|
||||
(use (const_int 1))])
|
||||
(set (reg:DI 27) (match_dup 3))]
|
||||
"")
|
||||
|
||||
(define_insn "*call_val_reg_64bit_post_reload"
|
||||
[(set (match_operand 0 "" "")
|
||||
(call (mem:SI (match_operand:DI 1 "register_operand" "r"))
|
||||
(match_operand 2 "" "i")))
|
||||
(clobber (reg:DI 1))
|
||||
(clobber (reg:DI 2))
|
||||
(use (reg:DI 27))
|
||||
(use (reg:DI 29))
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue