extend.texi: Add MeP attributes and pragmas.
* doc/extend.texi: Add MeP attributes and pragmas. * doc/invoke.text: Add MeP Options. * doc/contrib.texi: Add MeP contribution. * doc/md.texi: Add MeP constraints. * doc/install.texi: Add MeP target. From-SVN: r149068
This commit is contained in:
DJ Delorie
DJ Delorie
parent
2fcefcb2ad
commit
e2491744cc
6 changed files with 455 additions and 2 deletions
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@ -1,3 +1,11 @@
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2009-06-29 DJ Delorie <dj@redhat.com>
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* doc/extend.texi: Add MeP attributes and pragmas.
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* doc/invoke.text: Add MeP Options.
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* doc/contrib.texi: Add MeP contribution.
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* doc/md.texi: Add MeP constraints.
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* doc/install.texi: Add MeP target.
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2009-06-30 Anatoly Sokolov <aesok@post.ru>
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* target.h (struct gcc_target): Add frame_pointer_required field.
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@ -215,7 +215,7 @@ Mo DeJong for GCJ and libgcj bug fixes.
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@item
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DJ Delorie for the DJGPP port, build and libiberty maintenance,
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various bug fixes, and the M32C port.
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various bug fixes, and the M32C and MeP ports.
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@item
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Arnaud Desitter for helping to debug GNU Fortran.
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@ -2137,6 +2137,12 @@ present.
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The @code{deprecated} attribute can also be used for variables and
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types (@pxref{Variable Attributes}, @pxref{Type Attributes}.)
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@item disinterrupt
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@cindex @code{disinterrupt} attribute
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On MeP targets, this attribute causes the compiler to emit
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instructions to disable interrupts for the duration of the given
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function.
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@item dllexport
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@cindex @code{__declspec(dllexport)}
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On Microsoft Windows targets and Symbian OS targets the
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@ -2263,6 +2269,10 @@ At the end of a function, it will jump to a board-specific routine
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instead of using @code{rts}. The board-specific return routine simulates
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the @code{rtc}.
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On MeP targets this causes the compiler to use a calling convention
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which assumes the called function is too far away for the built-in
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addressing modes.
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@item fastcall
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@cindex functions that pop the argument stack on the 386
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On the Intel 386, the @code{fastcall} attribute causes the compiler to
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@ -2450,7 +2460,7 @@ This attribute is ignored for R8C target.
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@item interrupt
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@cindex interrupt handler functions
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Use this attribute on the ARM, AVR, CRX, M32C, M32R/D, m68k, MIPS
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Use this attribute on the ARM, AVR, CRX, M32C, M32R/D, m68k, MeP, MIPS
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and Xstormy16 ports to indicate that the specified function is an
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interrupt handler. The compiler will generate function entry and exit
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sequences suitable for use in an interrupt handler when this attribute
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@ -2669,6 +2679,10 @@ use the normal calling convention based on @code{jsr} and @code{rts}.
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This attribute can be used to cancel the effect of the @option{-mlong-calls}
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option.
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On MeP targets this attribute causes the compiler to assume the called
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function is close enough to use the normal calling convention,
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overriding the @code{-mtf} command line option.
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@item nesting
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@cindex Allow nesting in an interrupt handler on the Blackfin processor.
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Use this attribute together with @code{interrupt_handler},
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@ -3323,6 +3337,13 @@ visibility of their template.
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If both the template and enclosing class have explicit visibility, the
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visibility from the template is used.
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@item vliw
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@cindex @code{vliw} attribute
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On MeP, the @code{vliw} attribute tells the compiler to emit
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instructions in VLIW mode instead of core mode. Note that this
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attribute is not allowed unless a VLIW coprocessor has been configured
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and enabled through command line options.
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@item warn_unused_result
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@cindex @code{warn_unused_result} attribute
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The @code{warn_unused_result} attribute causes a warning to be emitted
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@ -4150,6 +4171,64 @@ Medium and large model objects may live anywhere in the 32-bit address space
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addresses).
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@end table
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@anchor{MeP Variable Attributes}
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@subsection MeP Variable Attributes
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The MeP target has a number of addressing modes and busses. The
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@code{near} space spans the standard memory space's first 16 megabytes
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(24 bits). The @code{far} space spans the entire 32-bit memory space.
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The @code{based} space is a 128 byte region in the memory space which
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is addressed relative to the @code{$tp} register. The @code{tiny}
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space is a 65536 byte region relative to the @code{$gp} register. In
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addition to these memory regions, the MeP target has a separate 16-bit
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control bus which is specified with @code{cb} attributes.
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@table @code
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@item based
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Any variable with the @code{based} attribute will be assigned to the
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@code{.based} section, and will be accessed with relative to the
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@code{$tp} register.
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@item tiny
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Likewise, the @code{tiny} attribute assigned variables to the
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@code{.tiny} section, relative to the @code{$gp} register.
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@item near
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Variables with the @code{near} attribute are assumed to have addresses
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that fit in a 24-bit addressing mode. This is the default for large
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variables (@code{-mtiny=4} is the default) but this attribute can
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override @code{-mtiny=} for small variables, or override @code{-ml}.
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@item far
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Variables with the @code{far} attribute are addressed using a full
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32-bit address. Since this covers the entire memory space, this
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allows modules to make no assumptions about where variables might be
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stored.
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@item io
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@item io (@var{addr})
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Variables with the @code{io} attribute are used to address
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memory-mapped peripherals. If an address is specified, the variable
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is assigned that address, else it is not assigned an address (it is
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assumed some other module will assign an address). Example:
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@example
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int timer_count __attribute__((io(0x123)));
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@end example
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@item cb
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@item cb (@var{addr})
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Variables with the @code{cb} attribute are used to access the control
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bus, using special instructions. @code{addr} indicates the control bus
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address. Example:
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@example
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int cpu_clock __attribute__((cb(0x123)));
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@end example
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@end table
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@anchor{i386 Variable Attributes}
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@subsection i386 Variable Attributes
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@ -4652,6 +4731,14 @@ virtual table for @code{C} is not exported. (You can use
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@code{__attribute__} instead of @code{__declspec} if you prefer, but
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most Symbian OS code uses @code{__declspec}.)
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@anchor{MeP Type Attributes}
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@subsection MeP Type Attributes
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Many of the MeP variable attributes may be applied to types as well.
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Specifically, the @code{based}, @code{tiny}, @code{near}, and
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@code{far} attributes may be applied to either. The @code{io} and
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@code{cb} attributes may not be applied to types.
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@anchor{i386 Type Attributes}
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@subsection i386 Type Attributes
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@ -11703,6 +11790,7 @@ for further explanation.
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@menu
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* ARM Pragmas::
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* M32C Pragmas::
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* MeP Pragmas::
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* RS/6000 and PowerPC Pragmas::
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* Darwin Pragmas::
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* Solaris Pragmas::
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@ -11753,6 +11841,78 @@ as it may allow you to reduce the number of memregs used.
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@end table
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@node MeP Pragmas
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@subsection MeP Pragmas
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@table @code
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@item custom io_volatile (on|off)
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@cindex pragma, custom io_volatile
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Overrides the command line option @code{-mio-volatile} for the current
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file. Note that for compatibility with future GCC releases, this
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option should only be used once before any @code{io} variables in each
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file.
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@item GCC coprocessor available @var{registers}
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@cindex pragma, coprocessor available
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Specifies which coprocessor registers are available to the register
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allocator. @var{registers} may be a single register, register range
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separated by ellipses, or comma-separated list of those. Example:
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@example
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#pragma GCC coprocessor available $c0...$c10, $c28
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@end example
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@item GCC coprocessor call_saved @var{registers}
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@cindex pragma, coprocessor call_saved
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Specifies which coprocessor registers are to be saved and restored by
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any function using them. @var{registers} may be a single register,
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register range separated by ellipses, or comma-separated list of
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those. Example:
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@example
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#pragma GCC coprocessor call_saved $c4...$c6, $c31
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@end example
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@item GCC coprocessor subclass '(A|B|C|D)' = @var{registers}
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@cindex pragma, coprocessor subclass
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Creates and defines a register class. These register classes can be
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used by inline @code{asm} constructs. @var{registers} may be a single
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register, register range separated by ellipses, or comma-separated
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list of those. Example:
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@example
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#pragma GCC coprocessor subclass 'B' = $c2, $c4, $c6
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asm ("cpfoo %0" : "=B" (x));
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@end example
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@item GCC disinterrupt @var{name} , @var{name} @dots{}
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@cindex pragma, disinterrupt
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For the named functions, the compiler adds code to disable interrupts
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for the duration of those functions. Any functions so named, which
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are not encountered in the source, cause a warning that the pragma was
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not used. Examples:
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@example
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#pragma disinterrupt foo
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#pragma disinterrupt bar, grill
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int foo () { @dots{} }
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@end example
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@item GCC call @var{name} , @var{name} @dots{}
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@cindex pragma, call
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For the named functions, the compiler always uses a register-indirect
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call model when calling the named functions. Examples:
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@example
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extern int foo ();
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#pragma call foo
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@end example
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@end table
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@node RS/6000 and PowerPC Pragmas
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@subsection RS/6000 and PowerPC Pragmas
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@ -2785,6 +2785,8 @@ information are.
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@item
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@uref{#m68k-uclinux,,m68k-uclinux}
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@item
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@uref{#mep-x-elf,,mep-*-elf}
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@item
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@uref{#mips-x-x,,mips-*-*}
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@item
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@uref{#mips-sgi-irix5,,mips-sgi-irix5}
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@ -3624,6 +3626,14 @@ both of which were ABI changes. However, you can still use the
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original ABI by configuring for @samp{m68k-uclinuxoldabi} or
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@samp{m68k-@var{vendor}-uclinuxoldabi}.
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@html
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<hr />
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@end html
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@heading @anchor{mep-x-elf}mep-*-elf
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Toshiba Media Processor.
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This configuration is intended for embedded systems.
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@html
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<hr />
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@end html
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@ -656,6 +656,13 @@ Objective-C and Objective-C++ Dialects}.
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-mno-callgraph-data -mslow-bytes -mno-slow-bytes -mno-lsim @gol
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-mlittle-endian -mbig-endian -m210 -m340 -mstack-increment}
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@emph{MeP Options}
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@gccoptlist{-mabsdiff -mall-opts -maverage -mbased=@var{n} -mbitops @gol
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-mc=@var{n} -mclip -mconfig=@var{name} -mcop -mcop32 -mcop64 -mivc2 @gol
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-mdc -mdiv -meb -mel -mio-volatile -ml -mleadz -mm -mminmax @gol
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-mmult -mno-opts -mrepeat -ms -msatur -msdram -msim -msimnovec -mtf @gol
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-mtiny=@var{n}}
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@emph{MIPS Options}
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@gccoptlist{-EL -EB -march=@var{arch} -mtune=@var{arch} @gol
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-mips1 -mips2 -mips3 -mips4 -mips32 -mips32r2 @gol
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@ -9069,6 +9076,7 @@ platform.
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* M680x0 Options::
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* M68hc1x Options::
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* MCore Options::
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* MeP Options::
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* MIPS Options::
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* MMIX Options::
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* MN10300 Options::
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@ -12754,6 +12762,170 @@ value is 0x1000.
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@end table
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@node MeP Options
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@subsection MeP Options
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@cindex MeP options
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@table @gcctabopt
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@item -mabsdiff
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@opindex mabsdiff
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Enables the @code{abs} instruction, which is the absolute difference
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between two registers.
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@item -mall-opts
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@opindex mall-opts
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Enables all the optional instructions - average, multiply, divide, bit
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operations, leading zero, absolute difference, min/max, clip, and
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saturation.
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@item -maverage
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@opindex maverage
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Enables the @code{ave} instruction, which computes the average of two
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registers.
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@item -mbased=@var{n}
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@opindex mbased=
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Variables of size @var{n} bytes or smaller will be placed in the
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@code{.based} section by default. Based variables use the @code{$tp}
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register as a base register, and there is a 128 byte limit to the
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@code{.based} section.
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@item -mbitops
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@opindex mbitops
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Enables the bit operation instructions - bit test (@code{btstm}), set
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(@code{bsetm}), clear (@code{bclrm}), invert (@code{bnotm}), and
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test-and-set (@code{tas}).
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@item -mc=@var{name}
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@opindex mc=
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Selects which section constant data will be placed in. @var{name} may
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be @code{tiny}, @code{near}, or @code{far}.
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@item -mclip
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@opindex mclip
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Enables the @code{clip} instruction. Note that @code{-mclip} is not
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useful unless you also provide @code{-mminmax}.
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@item -mconfig=@var{name}
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@opindex mconfig=
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Selects one of the build-in core configurations. Each MeP chip has
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one or more modules in it; each module has a core CPU and a variety of
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coprocessors, optional instructions, and peripherals. The
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@code{MeP-Integrator} tool, not part of GCC, provides these
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configurations through this option; using this option is the same as
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using all the corresponding command line options. The default
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configuration is @code{default}.
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@item -mcop
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@opindex mcop
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Enables the coprocessor instructions. By default, this is a 32-bit
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coprocessor. Note that the coprocessor is normally enabled via the
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@code{-mconfig=} option.
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@item -mcop32
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@opindex mcop32
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Enables the 32-bit coprocessor's instructions.
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@item -mcop64
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@opindex mcop64
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Enables the 64-bit coprocessor's instructions.
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@item -mivc2
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@opindex mivc2
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Enables IVC2 scheduling. IVC2 is a 64-bit VLIW coprocessor.
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@item -mdc
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@opindex mdc
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Causes constant variables to be placed in the @code{.near} section.
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@item -mdiv
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@opindex mdiv
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Enables the @code{div} and @code{divu} instructions.
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@item -meb
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@opindex meb
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Generate big-endian code.
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@item -mel
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@opindex mel
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Generate little-endian code.
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@item -mio-volatile
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@opindex mio-volatile
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Tells the compiler that any variable marked with the @code{io}
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attribute is to be considered volatile.
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@item -ml
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@opindex ml
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Causes variables to be assigned to the @code{.far} section by default.
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@item -mleadz
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@opindex mleadz
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Enables the @code{leadz} (leading zero) instruction.
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@item -mm
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@opindex mm
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Causes variables to be assigned to the @code{.near} section by default.
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@item -mminmax
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@opindex mminmax
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Enables the @code{min} and @code{max} instructions.
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@item -mmult
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@opindex mmult
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Enables the multiplication and multiply-accumulate instructions.
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@item -mno-opts
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@opindex mno-opts
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Disables all the optional instructions enabled by @code{-mall-opts}.
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@item -mrepeat
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@opindex mrepeat
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Enables the @code{repeat} and @code{erepeat} instructions, used for
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low-overhead looping.
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@item -ms
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@opindex ms
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Causes all variables to default to the @code{.tiny} section. Note
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that there is a 65536 byte limit to this section. Accesses to these
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variables use the @code{%gp} base register.
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@item -msatur
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@opindex msatur
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Enables the saturation instructions. Note that the compiler does not
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currently generate these itself, but this option is included for
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compatibility with other tools, like @code{as}.
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@item -msdram
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@opindex msdram
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Link the SDRAM-based runtime instead of the default ROM-based runtime.
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@item -msim
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@opindex msim
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Link the simulator runtime libraries.
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@item -msimnovec
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@opindex msimnovec
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Link the simulator runtime libraries, excluding built-in support
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for reset and exception vectors and tables.
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@item -mtf
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@opindex mtf
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Causes all functions to default to the @code{.far} section. Without
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this option, functions default to the @code{.near} section.
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@item -mtiny=@var{n}
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@opindex mtiny=
|
||||
Variables that are @var{n} bytes or smaller will be allocated to the
|
||||
@code{.tiny} section. These variables use the @code{$gp} base
|
||||
register. The default for this option is 4, but note that there's a
|
||||
65536 byte limit to the @code{.tiny} section.
|
||||
|
||||
@end table
|
||||
|
||||
|
||||
@node MIPS Options
|
||||
@subsection MIPS Options
|
||||
@cindex MIPS options
|
||||
|
|
|
|||
103
gcc/doc/md.texi
103
gcc/doc/md.texi
|
|
@ -2518,6 +2518,109 @@ Memory addressed using the small base register ($sb).
|
|||
|
||||
@item S1
|
||||
$r1h
|
||||
@end table
|
||||
|
||||
@item MeP---@file{config/mep/constraints.md}
|
||||
@table @code
|
||||
|
||||
@item a
|
||||
The $sp register.
|
||||
|
||||
@item b
|
||||
The $tp register.
|
||||
|
||||
@item c
|
||||
Any control register.
|
||||
|
||||
@item d
|
||||
Either the $hi or the $lo register.
|
||||
|
||||
@item em
|
||||
Coprocessor registers that can be directly loaded ($c0-$c15).
|
||||
|
||||
@item ex
|
||||
Coprocessor registers that can be moved to each other.
|
||||
|
||||
@item er
|
||||
Coprocessor registers that can be moved to core registers.
|
||||
|
||||
@item h
|
||||
The $hi register.
|
||||
|
||||
@item j
|
||||
The $rpc register.
|
||||
|
||||
@item l
|
||||
The $lo register.
|
||||
|
||||
@item t
|
||||
Registers which can be used in $tp-relative addressing.
|
||||
|
||||
@item v
|
||||
The $gp register.
|
||||
|
||||
@item x
|
||||
The coprocessor registers.
|
||||
|
||||
@item y
|
||||
The coprocessor control registers.
|
||||
|
||||
@item z
|
||||
The $0 register.
|
||||
|
||||
@item A
|
||||
User-defined register set A.
|
||||
|
||||
@item B
|
||||
User-defined register set B.
|
||||
|
||||
@item C
|
||||
User-defined register set C.
|
||||
|
||||
@item D
|
||||
User-defined register set D.
|
||||
|
||||
@item I
|
||||
Offsets for $gp-rel addressing.
|
||||
|
||||
@item J
|
||||
Constants that can be used directly with boolean insns.
|
||||
|
||||
@item K
|
||||
Constants that can be moved directly to registers.
|
||||
|
||||
@item L
|
||||
Small constants that can be added to registers.
|
||||
|
||||
@item M
|
||||
Long shift counts.
|
||||
|
||||
@item N
|
||||
Small constants that can be compared to registers.
|
||||
|
||||
@item O
|
||||
Constants that can be loaded into the top half of registers.
|
||||
|
||||
@item S
|
||||
Signed 8-bit immediates.
|
||||
|
||||
@item T
|
||||
Symbols encoded for $tp-rel or $gp-rel addressing.
|
||||
|
||||
@item U
|
||||
Non-constant addresses for loading/saving coprocessor registers.
|
||||
|
||||
@item W
|
||||
The top half of a symbol's value.
|
||||
|
||||
@item Y
|
||||
A register indirect address without offset.
|
||||
|
||||
@item Z
|
||||
Symbolic references to the control bus.
|
||||
|
||||
|
||||
|
||||
@end table
|
||||
|
||||
@item MIPS---@file{config/mips/constraints.md}
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue