s390-protos.h (s390_pool_operand): Remove.
ChangeLog: * config/s390/s390-protos.h (s390_pool_operand): Remove. * config/s390/s390.c (s390_pool_operand): Likewise. (s390_extra_constraint_str): Handle 'B' constraints. * config/s390/s390.h (CONSTRAINT_LEN): Handle 'B' constraints. * config/s390/s390.md: Document 'B' constraints. ("*cmpdi_cct", "*cmpsi_cct"): Use 'B' constraint instead of s390_pool_operand to prevent insns with two literal pool references. Make pattern commutative. ("*cmpdi_ccu", "*cmpsi_ccu", "*cmphi_ccu", "*cmpqi_ccu"): Use 'B' constraint instead of s390_pool_operand. testsuite/ChangeLog: * gcc.dg/20041109-1.c: New test. From-SVN: r90364
This commit is contained in:
parent
3172e26ca4
commit
e221ef54b8
7 changed files with 84 additions and 68 deletions
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@ -1,3 +1,16 @@
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2004-11-09 Ulrich Weigand <uweigand@de.ibm.com>
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* config/s390/s390-protos.h (s390_pool_operand): Remove.
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* config/s390/s390.c (s390_pool_operand): Likewise.
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(s390_extra_constraint_str): Handle 'B' constraints.
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* config/s390/s390.h (CONSTRAINT_LEN): Handle 'B' constraints.
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* config/s390/s390.md: Document 'B' constraints.
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("*cmpdi_cct", "*cmpsi_cct"): Use 'B' constraint instead of
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s390_pool_operand to prevent insns with two literal pool
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references. Make pattern commutative.
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("*cmpdi_ccu", "*cmpsi_ccu", "*cmphi_ccu", "*cmpqi_ccu"): Use
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'B' constraint instead of s390_pool_operand.
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2004-11-09 Kazu Hirata <kazu@cs.umass.edu>
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* tree-cfg.c (create_bb): Remove unnecessary memset.
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@ -89,7 +89,6 @@ extern void s390_expand_logical_operator (enum rtx_code,
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enum machine_mode, rtx *);
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extern bool s390_logical_operator_ok_p (rtx *);
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extern void s390_narrow_logical_operator (enum rtx_code, rtx *, rtx *);
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extern bool s390_pool_operand (rtx);
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extern void s390_split_access_reg (rtx, rtx *, rtx *);
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extern bool s390_output_addr_const_extra (FILE*, rtx);
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@ -1508,41 +1508,6 @@ s_operand (rtx op, enum machine_mode mode)
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return 1;
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}
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/* Return true if OP is a memory operand pointing to the
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literal pool, or an immediate operand. */
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bool
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s390_pool_operand (rtx op)
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{
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struct s390_address addr;
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/* Just like memory_operand, allow (subreg (mem ...))
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after reload. */
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if (reload_completed
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&& GET_CODE (op) == SUBREG
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&& GET_CODE (SUBREG_REG (op)) == MEM)
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op = SUBREG_REG (op);
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switch (GET_CODE (op))
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{
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case CONST_INT:
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case CONST_DOUBLE:
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return true;
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case MEM:
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if (!s390_decompose_address (XEXP (op, 0), &addr))
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return false;
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if (addr.base && REG_P (addr.base) && REGNO (addr.base) == BASE_REGNUM)
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return true;
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if (addr.indx && REG_P (addr.indx) && REGNO (addr.indx) == BASE_REGNUM)
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return true;
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return false;
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default:
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return false;
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}
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}
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/* Return true if OP a valid shift count operand.
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OP is the current operation.
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MODE is the current operation mode. */
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@ -1634,6 +1599,21 @@ s390_extra_constraint_str (rtx op, int c, const char * str)
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c = str[1];
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}
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/* Check for non-literal-pool variants of memory constraints. */
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else if (c == 'B')
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{
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if (GET_CODE (op) != MEM)
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return 0;
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if (!s390_decompose_address (XEXP (op, 0), &addr))
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return 0;
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if (addr.base && REG_P (addr.base) && REGNO (addr.base) == BASE_REGNUM)
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return 0;
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if (addr.indx && REG_P (addr.indx) && REGNO (addr.indx) == BASE_REGNUM)
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return 0;
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c = str[1];
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}
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switch (c)
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{
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case 'Q':
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@ -583,7 +583,8 @@ extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
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#define CONSTRAINT_LEN(C, STR) \
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((C) == 'N' ? 5 : \
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(C) == 'A' ? 2 : DEFAULT_CONSTRAINT_LEN ((C), (STR)))
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(C) == 'A' ? 2 : \
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(C) == 'B' ? 2 : DEFAULT_CONSTRAINT_LEN ((C), (STR)))
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/* Stack layout and calling conventions. */
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@ -50,6 +50,9 @@
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;; T -- Memory reference with index register and long displacement.
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;; A -- Multiple letter constraint followed by Q, R, S, or T:
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;; Offsettable memory reference of type specified by second letter.
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;; B -- Multiple letter constraint followed by Q, R, S, or T:
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;; Memory reference of the type specified by second letter that
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;; does *not* refer to a literal pool entry.
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;; U -- Pointer with short displacement.
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;; W -- Pointer with long displacement.
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;; Y -- Shift count operand.
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@ -525,33 +528,28 @@
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(define_insn "*cmpdi_cct"
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[(set (reg 33)
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(compare (match_operand:DI 0 "nonimmediate_operand" "d,d,d,m,Q")
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(match_operand:DI 1 "general_operand" "d,K,m,d,Q")))]
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"s390_match_ccmode (insn, CCTmode) && TARGET_64BIT
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&& (!s390_pool_operand (operands[0]) || !s390_pool_operand (operands[1]))"
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(compare (match_operand:DI 0 "nonimmediate_operand" "%d,d,d,Q")
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(match_operand:DI 1 "general_operand" "d,K,m,BQ")))]
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"s390_match_ccmode (insn, CCTmode) && TARGET_64BIT"
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"@
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cgr\t%0,%1
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cghi\t%0,%c1
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cg\t%0,%1
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cg\t%1,%0
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#"
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[(set_attr "op_type" "RRE,RI,RXY,RXY,SS")])
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[(set_attr "op_type" "RRE,RI,RXY,SS")])
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(define_insn "*cmpsi_cct"
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[(set (reg 33)
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(compare (match_operand:SI 0 "nonimmediate_operand" "d,d,d,d,R,T,Q")
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(match_operand:SI 1 "general_operand" "d,K,R,T,d,d,Q")))]
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"s390_match_ccmode (insn, CCTmode)
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&& (!s390_pool_operand (operands[0]) || !s390_pool_operand (operands[1]))"
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(compare (match_operand:SI 0 "nonimmediate_operand" "%d,d,d,d,Q")
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(match_operand:SI 1 "general_operand" "d,K,R,T,BQ")))]
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"s390_match_ccmode (insn, CCTmode)"
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"@
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cr\t%0,%1
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chi\t%0,%c1
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c\t%0,%1
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cy\t%0,%1
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c\t%1,%0
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cy\t%1,%0
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#"
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[(set_attr "op_type" "RR,RI,RX,RXY,RX,RXY,SS")])
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[(set_attr "op_type" "RR,RI,RX,RXY,SS")])
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; Compare (signed) instructions
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(define_insn "*cmpdi_ccu"
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[(set (reg 33)
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(compare (match_operand:DI 0 "nonimmediate_operand" "d,d,Q")
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(match_operand:DI 1 "general_operand" "d,m,Q")))]
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"s390_match_ccmode (insn, CCUmode) && TARGET_64BIT
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&& (!s390_pool_operand (operands[0]) || !s390_pool_operand (operands[1]))"
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(compare (match_operand:DI 0 "nonimmediate_operand" "d,d,Q,BQ")
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(match_operand:DI 1 "general_operand" "d,m,BQ,Q")))]
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"s390_match_ccmode (insn, CCUmode) && TARGET_64BIT"
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"@
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clgr\t%0,%1
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clg\t%0,%1
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#
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#"
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[(set_attr "op_type" "RRE,RXY,SS")])
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[(set_attr "op_type" "RRE,RXY,SS,SS")])
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(define_insn "*cmpsi_ccu"
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[(set (reg 33)
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(compare (match_operand:SI 0 "nonimmediate_operand" "d,d,d,Q")
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(match_operand:SI 1 "general_operand" "d,R,T,Q")))]
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"s390_match_ccmode (insn, CCUmode)
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&& (!s390_pool_operand (operands[0]) || !s390_pool_operand (operands[1]))"
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(compare (match_operand:SI 0 "nonimmediate_operand" "d,d,d,Q,BQ")
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(match_operand:SI 1 "general_operand" "d,R,T,BQ,Q")))]
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"s390_match_ccmode (insn, CCUmode)"
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"@
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clr\t%0,%1
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cl\t%0,%1
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cly\t%0,%1
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#
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#"
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[(set_attr "op_type" "RR,RX,RXY,SS")])
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[(set_attr "op_type" "RR,RX,RXY,SS,SS")])
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(define_insn "*cmphi_ccu"
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[(set (reg 33)
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(compare (match_operand:HI 0 "nonimmediate_operand" "d,d,Q")
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(match_operand:HI 1 "general_operand" "Q,S,Q")))]
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(compare (match_operand:HI 0 "nonimmediate_operand" "d,d,Q,BQ")
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(match_operand:HI 1 "general_operand" "Q,S,BQ,Q")))]
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"s390_match_ccmode (insn, CCUmode)
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&& (!s390_pool_operand (operands[0]) || !s390_pool_operand (operands[1]))
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&& !register_operand (operands[1], HImode)"
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"@
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clm\t%0,3,%S1
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clmy\t%0,3,%S1
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#
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#"
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[(set_attr "op_type" "RS,RSY,SS")])
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[(set_attr "op_type" "RS,RSY,SS,SS")])
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(define_insn "*cmpqi_ccu"
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[(set (reg 33)
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(compare (match_operand:QI 0 "nonimmediate_operand" "d,d,Q,S,Q")
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(match_operand:QI 1 "general_operand" "Q,S,n,n,Q")))]
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(compare (match_operand:QI 0 "nonimmediate_operand" "d,d,Q,S,Q,BQ")
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(match_operand:QI 1 "general_operand" "Q,S,n,n,BQ,Q")))]
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"s390_match_ccmode (insn, CCUmode)
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&& (!s390_pool_operand (operands[0]) || !s390_pool_operand (operands[1]))
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&& !register_operand (operands[1], QImode)"
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"@
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clm\t%0,1,%S1
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clmy\t%0,1,%S1
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cli\t%S0,%b1
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cliy\t%S0,%b1
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#
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#"
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[(set_attr "op_type" "RS,RSY,SI,SIY,SS")])
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[(set_attr "op_type" "RS,RSY,SI,SIY,SS,SS")])
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; Block compare (CLC) instruction patterns.
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@ -1,3 +1,7 @@
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2004-11-09 Ulrich Weigand <uweigand@de.ibm.com>
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* gcc.dg/20041109-1.c: New test.
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2004-11-09 Andrew Pinski <pinskia@physics.uc.edu>
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PR objc/18406
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21
gcc/testsuite/gcc.dg/20041109-1.c
Normal file
21
gcc/testsuite/gcc.dg/20041109-1.c
Normal file
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/* This used to ICE due to a literal pool handling bug on s390x. */
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/* { dg-do compile { target s390*-*-* } } */
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/* { dg-options "-O2 -fno-omit-frame-pointer" } */
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static struct table { int x; } table[3];
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int test (void)
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{
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struct table *t;
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for (t = table; t < &table[3]; t++)
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asm volatile ("" : : : "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "12");
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for (t = table; t < &table[3]; t++)
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if (t->x)
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return 1;
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return 0;
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}
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