aarch64: Add new vector mode V8DI

This patch is adding new V8DI mode which will be used with new Armv8.7-A
LS64 extension intrinsics.

gcc/ChangeLog:

	* config/aarch64/aarch64-modes.def (VECTOR_MODE): New V8DI mode.
	* config/aarch64/aarch64.c (aarch64_hard_regno_mode_ok): Handle
	V8DImode.
	* config/aarch64/iterators.md (define_mode_attr nunits): Add entry
	for V8DI.

gcc/config/aarch64/aarch64-modes.def

@@ -81,6 +81,11 @@ INT_MODE (OI, 32);
 INT_MODE (CI, 48);
 INT_MODE (XI, 64);
 
+/* V8DI mode.  */
+VECTOR_MODE_WITH_PREFIX (V, INT, DI, 8, 5);
+
+ADJUST_ALIGNMENT (V8DI, 8);
+
 /* Define Advanced SIMD modes for structures of 2, 3 and 4 d-registers.  */
 #define ADV_SIMD_D_REG_STRUCT_MODES(NVECS, VB, VH, VS, VD) \
   VECTOR_MODES_WITH_PREFIX (V##NVECS##x, INT, 8, 3); \

gcc/config/aarch64/aarch64.c

@@ -3394,6 +3394,10 @@ aarch64_hard_regno_nregs (unsigned regno, machine_mode mode)
 static bool
 aarch64_hard_regno_mode_ok (unsigned regno, machine_mode mode)
 {
+  if (mode == V8DImode)
+    return IN_RANGE (regno, R0_REGNUM, R23_REGNUM)
+           && multiple_p (regno - R0_REGNUM, 2);
+
   if (GET_MODE_CLASS (mode) == MODE_CC)
     return regno == CC_REGNUM;
 

gcc/config/aarch64/iterators.md

@@ -1062,7 +1062,7 @@
 (define_mode_attr nunits [(V8QI "8") (V16QI "16")
 			  (V4HI "4") (V8HI "8")
 			  (V2SI "2") (V4SI "4")
-				     (V2DI "2")
+			  (V2DI "2") (V8DI "8")
 			  (V4HF "4") (V8HF "8")
 			  (V4BF "4") (V8BF "8")
 			  (V2SF "2") (V4SF "4")