s390.h (SECONDARY_OUTPUT_RELOAD_CLASS): Define.
gcc/ChangeLog:
* config/s390/s390.h (SECONDARY_OUTPUT_RELOAD_CLASS): Define.
* config/s390/s390.c (s390_secondary_output_reload_class): New function.
* config/s390/s390-protos.h (s390_secondary_output_reload_class):
Declare it.
* config/s390/s390.md ("reload_outti", "reload_outdi",
"reload_outdf"): New expanders.
* config/s390/s390.md ("movti" + splitters): Handle non-offsettable
memory operands as source.
("movdi" + splitters): Likewise.
("movdf" + splitters): Likewise.
* config/s390/s390.c (s390_split_ok_p): New function.
* config/s390/s390-protos.h (s390_split_ok_p): Declare it.
gcc/testsuite/ChangeLog:
* gcc.dg/20030627-1.c: New test.
From-SVN: r68607
This commit is contained in:
Ulrich Weigand
Ulrich Weigand
parent
5bbd6c3ee0
commit
dc65c307c8
7 changed files with 208 additions and 96 deletions
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@ -1,3 +1,19 @@
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2003-06-27 Ulrich Weigand <uweigand@de.ibm.com>
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* config/s390/s390.h (SECONDARY_OUTPUT_RELOAD_CLASS): Define.
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* config/s390/s390.c (s390_secondary_output_reload_class): New function.
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* config/s390/s390-protos.h (s390_secondary_output_reload_class):
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Declare it.
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* config/s390/s390.md ("reload_outti", "reload_outdi",
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"reload_outdf"): New expanders.
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* config/s390/s390.md ("movti" + splitters): Handle non-offsettable
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memory operands as source.
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("movdi" + splitters): Likewise.
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("movdf" + splitters): Likewise.
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* config/s390/s390.c (s390_split_ok_p): New function.
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* config/s390/s390-protos.h (s390_split_ok_p): Declare it.
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2003-06-27 Kazu Hirata <kazu@cs.umass.edu>
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* combine.c (force_to_mode): Replace the equality comparison
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@ -42,6 +42,7 @@ extern int s390_single_hi PARAMS ((rtx, enum machine_mode, int));
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extern int s390_extract_hi PARAMS ((rtx, enum machine_mode, int));
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extern int s390_single_qi PARAMS ((rtx, enum machine_mode, int));
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extern int s390_extract_qi PARAMS ((rtx, enum machine_mode, int));
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extern bool s390_split_ok_p PARAMS ((rtx, rtx, enum machine_mode, int));
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extern int tls_symbolic_operand PARAMS ((rtx));
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extern int s390_match_ccmode PARAMS ((rtx, enum machine_mode));
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@ -60,6 +61,7 @@ extern rtx legitimize_pic_address PARAMS ((rtx, rtx));
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extern rtx legitimize_address PARAMS ((rtx, rtx, enum machine_mode));
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extern enum reg_class s390_preferred_reload_class PARAMS ((rtx, enum reg_class));
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extern enum reg_class s390_secondary_input_reload_class PARAMS ((enum reg_class, enum machine_mode, rtx));
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extern enum reg_class s390_secondary_output_reload_class PARAMS ((enum reg_class, enum machine_mode, rtx));
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extern int s390_plus_operand PARAMS ((rtx, enum machine_mode));
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extern void s390_expand_plus_operand PARAMS ((rtx, rtx, rtx));
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extern void emit_symbolic_move PARAMS ((rtx *));
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@ -863,6 +863,42 @@ s390_extract_qi (op, mode, part)
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abort ();
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}
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/* Check whether we can (and want to) split a double-word
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move in mode MODE from SRC to DST into two single-word
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moves, moving the subword FIRST_SUBWORD first. */
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bool
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s390_split_ok_p (dst, src, mode, first_subword)
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rtx dst;
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rtx src;
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enum machine_mode mode;
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int first_subword;
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{
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/* Floating point registers cannot be split. */
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if (FP_REG_P (src) || FP_REG_P (dst))
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return false;
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/* We don't need to split if operands are directly accessable. */
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if (s_operand (src, mode) || s_operand (dst, mode))
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return false;
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/* Non-offsettable memory references cannot be split. */
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if ((GET_CODE (src) == MEM && !offsettable_memref_p (src))
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|| (GET_CODE (dst) == MEM && !offsettable_memref_p (dst)))
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return false;
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/* Moving the first subword must not clobber a register
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needed to move the second subword. */
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if (register_operand (dst, mode))
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{
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rtx subreg = operand_subword (dst, first_subword, 0, mode);
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if (reg_overlap_mentioned_p (subreg, src))
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return false;
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}
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return true;
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}
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/* Change optimizations to be performed, depending on the
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optimization level.
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@ -1715,6 +1751,29 @@ s390_secondary_input_reload_class (class, mode, in)
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return NO_REGS;
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}
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/* Return the register class of a scratch register needed to
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store a register of class CLASS in MODE into OUT:
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We need a temporary when storing a double-word to a
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non-offsettable memory address. */
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enum reg_class
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s390_secondary_output_reload_class (class, mode, out)
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enum reg_class class;
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enum machine_mode mode;
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rtx out;
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{
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if ((TARGET_64BIT ? mode == TImode
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: (mode == DImode || mode == DFmode))
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&& reg_classes_intersect_p (GENERAL_REGS, class)
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&& GET_CODE (out) == MEM
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&& !offsettable_memref_p (out)
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&& !s_operand (out, VOIDmode))
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return ADDR_REGS;
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return NO_REGS;
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}
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/* Return true if OP is a PLUS that is not a legitimate
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operand for the LA instruction.
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OP is the current operation.
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@ -460,6 +460,11 @@ extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
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#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
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s390_secondary_input_reload_class ((CLASS), (MODE), (IN))
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/* We need a secondary reload when storing a double-word
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to a non-offsettable memory address. */
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#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \
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s390_secondary_output_reload_class ((CLASS), (MODE), (OUT))
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/* We need secondary memory to move data between GPRs and FPRs. */
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#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
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((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
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@ -905,7 +905,7 @@
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(define_insn "movti"
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[(set (match_operand:TI 0 "nonimmediate_operand" "=d,Q,d,o,Q")
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(match_operand:TI 1 "general_operand" "Q,d,dKo,d,Q"))]
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(match_operand:TI 1 "general_operand" "Q,d,dKm,d,Q"))]
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"TARGET_64BIT"
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"@
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lmg\\t%0,%N0,%1
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@ -920,36 +920,29 @@
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[(set (match_operand:TI 0 "nonimmediate_operand" "")
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(match_operand:TI 1 "general_operand" ""))]
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"TARGET_64BIT && reload_completed
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&& !s_operand (operands[0], VOIDmode)
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&& !s_operand (operands[1], VOIDmode)
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&& (register_operand (operands[0], VOIDmode)
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|| register_operand (operands[1], VOIDmode))
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&& (!register_operand (operands[0], VOIDmode)
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|| !reg_overlap_mentioned_p (operand_subword (operands[0], 0, 0, TImode),
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operands[1])
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|| !reg_overlap_mentioned_p (operand_subword (operands[0], 1, 0, TImode),
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operands[1]))"
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&& s390_split_ok_p (operands[0], operands[1], TImode, 0)"
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[(set (match_dup 2) (match_dup 4))
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(set (match_dup 3) (match_dup 5))]
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"
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{
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if (!register_operand (operands[0], VOIDmode)
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|| !reg_overlap_mentioned_p (operand_subword (operands[0], 0, 0, TImode),
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operands[1]))
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{
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operands[2] = operand_subword (operands[0], 0, 0, TImode);
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operands[3] = operand_subword (operands[0], 1, 0, TImode);
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operands[4] = operand_subword (operands[1], 0, 0, TImode);
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operands[5] = operand_subword (operands[1], 1, 0, TImode);
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}
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else
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{
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operands[2] = operand_subword (operands[0], 1, 0, TImode);
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operands[3] = operand_subword (operands[0], 0, 0, TImode);
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operands[4] = operand_subword (operands[1], 1, 0, TImode);
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operands[5] = operand_subword (operands[1], 0, 0, TImode);
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}
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}")
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operands[2] = operand_subword (operands[0], 0, 0, TImode);
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operands[3] = operand_subword (operands[0], 1, 0, TImode);
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operands[4] = operand_subword (operands[1], 0, 0, TImode);
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operands[5] = operand_subword (operands[1], 1, 0, TImode);
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})
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(define_split
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[(set (match_operand:TI 0 "nonimmediate_operand" "")
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(match_operand:TI 1 "general_operand" ""))]
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"TARGET_64BIT && reload_completed
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&& s390_split_ok_p (operands[0], operands[1], TImode, 1)"
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[(set (match_dup 2) (match_dup 4))
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(set (match_dup 3) (match_dup 5))]
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{
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operands[2] = operand_subword (operands[0], 1, 0, TImode);
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operands[3] = operand_subword (operands[0], 0, 0, TImode);
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operands[4] = operand_subword (operands[1], 1, 0, TImode);
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operands[5] = operand_subword (operands[1], 0, 0, TImode);
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})
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(define_split
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[(set (match_operand:TI 0 "register_operand" "")
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@ -957,12 +950,23 @@
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"TARGET_64BIT && reload_completed
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&& !s_operand (operands[1], VOIDmode)"
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[(set (match_dup 0) (match_dup 1))]
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"
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{
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rtx addr = operand_subword (operands[0], 1, 0, TImode);
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s390_load_address (addr, XEXP (operands[1], 0));
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operands[1] = replace_equiv_address (operands[1], addr);
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}")
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})
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(define_expand "reload_outti"
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[(parallel [(match_operand:TI 0 "memory_operand" "")
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(match_operand:TI 1 "register_operand" "d")
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(match_operand:DI 2 "register_operand" "=&a")])]
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"TARGET_64BIT"
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{
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s390_load_address (operands[2], XEXP (operands[0], 0));
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operands[0] = replace_equiv_address (operands[0], operands[2]);
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emit_move_insn (operands[0], operands[1]);
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DONE;
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})
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;
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; movdi instruction pattern(s).
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@ -1044,7 +1048,7 @@
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(define_insn "*movdi_31"
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[(set (match_operand:DI 0 "nonimmediate_operand" "=d,Q,d,o,!*f,!*f,!m,Q")
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(match_operand:DI 1 "general_operand" "Q,d,dKo,d,*f,m,*f,Q"))]
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(match_operand:DI 1 "general_operand" "Q,d,dKm,d,*f,m,*f,Q"))]
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"!TARGET_64BIT"
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"@
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lm\\t%0,%N0,%1
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@ -1062,53 +1066,54 @@
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[(set (match_operand:DI 0 "nonimmediate_operand" "")
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(match_operand:DI 1 "general_operand" ""))]
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"!TARGET_64BIT && reload_completed
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&& !FP_REG_P (operands[0])
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&& !FP_REG_P (operands[1])
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&& !s_operand (operands[0], VOIDmode)
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&& !s_operand (operands[1], VOIDmode)
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&& (register_operand (operands[0], VOIDmode)
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|| register_operand (operands[1], VOIDmode))
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&& (!register_operand (operands[0], VOIDmode)
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|| !reg_overlap_mentioned_p (operand_subword (operands[0], 0, 0, DImode),
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operands[1])
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|| !reg_overlap_mentioned_p (operand_subword (operands[0], 1, 0, DImode),
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operands[1]))"
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&& s390_split_ok_p (operands[0], operands[1], DImode, 0)"
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[(set (match_dup 2) (match_dup 4))
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(set (match_dup 3) (match_dup 5))]
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"
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{
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if (!register_operand (operands[0], VOIDmode)
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|| !reg_overlap_mentioned_p (operand_subword (operands[0], 0, 0, DImode),
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operands[1]))
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{
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operands[2] = operand_subword (operands[0], 0, 0, DImode);
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operands[3] = operand_subword (operands[0], 1, 0, DImode);
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operands[4] = operand_subword (operands[1], 0, 0, DImode);
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operands[5] = operand_subword (operands[1], 1, 0, DImode);
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}
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else
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{
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operands[2] = operand_subword (operands[0], 1, 0, DImode);
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operands[3] = operand_subword (operands[0], 0, 0, DImode);
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operands[4] = operand_subword (operands[1], 1, 0, DImode);
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operands[5] = operand_subword (operands[1], 0, 0, DImode);
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}
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}")
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operands[2] = operand_subword (operands[0], 0, 0, DImode);
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operands[3] = operand_subword (operands[0], 1, 0, DImode);
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operands[4] = operand_subword (operands[1], 0, 0, DImode);
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operands[5] = operand_subword (operands[1], 1, 0, DImode);
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})
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(define_split
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[(set (match_operand:DI 0 "nonimmediate_operand" "")
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(match_operand:DI 1 "general_operand" ""))]
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"!TARGET_64BIT && reload_completed
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&& s390_split_ok_p (operands[0], operands[1], DImode, 1)"
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[(set (match_dup 2) (match_dup 4))
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(set (match_dup 3) (match_dup 5))]
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{
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operands[2] = operand_subword (operands[0], 1, 0, DImode);
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operands[3] = operand_subword (operands[0], 0, 0, DImode);
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operands[4] = operand_subword (operands[1], 1, 0, DImode);
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operands[5] = operand_subword (operands[1], 0, 0, DImode);
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})
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(define_split
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[(set (match_operand:DI 0 "register_operand" "")
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(match_operand:DI 1 "memory_operand" ""))]
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"!TARGET_64BIT && reload_completed
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&& !FP_REG_P (operands[0])
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&& !FP_REG_P (operands[1])
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&& !s_operand (operands[1], VOIDmode)"
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[(set (match_dup 0) (match_dup 1))]
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"
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{
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rtx addr = operand_subword (operands[0], 1, 0, DImode);
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s390_load_address (addr, XEXP (operands[1], 0));
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operands[1] = replace_equiv_address (operands[1], addr);
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}")
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})
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(define_expand "reload_outdi"
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[(parallel [(match_operand:DI 0 "memory_operand" "")
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(match_operand:DI 1 "register_operand" "d")
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(match_operand:SI 2 "register_operand" "=&a")])]
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"!TARGET_64BIT"
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{
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s390_load_address (operands[2], XEXP (operands[0], 0));
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operands[0] = replace_equiv_address (operands[0], operands[2]);
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emit_move_insn (operands[0], operands[1]);
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DONE;
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})
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(define_peephole2
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[(set (match_operand:DI 0 "register_operand" "")
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@ -1354,7 +1359,7 @@
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(define_insn "*movdf_31"
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[(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,m,d,Q,d,o,Q")
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(match_operand:DF 1 "general_operand" "f,m,f,Q,d,dKo,d,Q"))]
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(match_operand:DF 1 "general_operand" "f,m,f,Q,d,dKm,d,Q"))]
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"!TARGET_64BIT"
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"@
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ldr\\t%0,%1
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@ -1372,53 +1377,54 @@
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[(set (match_operand:DF 0 "nonimmediate_operand" "")
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(match_operand:DF 1 "general_operand" ""))]
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"!TARGET_64BIT && reload_completed
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&& !FP_REG_P (operands[0])
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&& !FP_REG_P (operands[1])
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&& !s_operand (operands[0], VOIDmode)
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&& !s_operand (operands[1], VOIDmode)
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&& (register_operand (operands[0], VOIDmode)
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|| register_operand (operands[1], VOIDmode))
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&& (!register_operand (operands[0], VOIDmode)
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|| !reg_overlap_mentioned_p (operand_subword (operands[0], 0, 0, DFmode),
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operands[1])
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|| !reg_overlap_mentioned_p (operand_subword (operands[0], 1, 0, DFmode),
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operands[1]))"
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&& s390_split_ok_p (operands[0], operands[1], DFmode, 0)"
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[(set (match_dup 2) (match_dup 4))
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(set (match_dup 3) (match_dup 5))]
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"
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{
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if (!register_operand (operands[0], VOIDmode)
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|| !reg_overlap_mentioned_p (operand_subword (operands[0], 0, 0, DFmode),
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operands[1]))
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{
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operands[2] = operand_subword (operands[0], 0, 0, DFmode);
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operands[3] = operand_subword (operands[0], 1, 0, DFmode);
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operands[4] = operand_subword (operands[1], 0, 0, DFmode);
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operands[5] = operand_subword (operands[1], 1, 0, DFmode);
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}
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else
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{
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operands[2] = operand_subword (operands[0], 1, 0, DFmode);
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||||
operands[3] = operand_subword (operands[0], 0, 0, DFmode);
|
||||
operands[4] = operand_subword (operands[1], 1, 0, DFmode);
|
||||
operands[5] = operand_subword (operands[1], 0, 0, DFmode);
|
||||
}
|
||||
}")
|
||||
operands[2] = operand_subword (operands[0], 0, 0, DFmode);
|
||||
operands[3] = operand_subword (operands[0], 1, 0, DFmode);
|
||||
operands[4] = operand_subword (operands[1], 0, 0, DFmode);
|
||||
operands[5] = operand_subword (operands[1], 1, 0, DFmode);
|
||||
})
|
||||
|
||||
(define_split
|
||||
[(set (match_operand:DF 0 "nonimmediate_operand" "")
|
||||
(match_operand:DF 1 "general_operand" ""))]
|
||||
"!TARGET_64BIT && reload_completed
|
||||
&& s390_split_ok_p (operands[0], operands[1], DFmode, 1)"
|
||||
[(set (match_dup 2) (match_dup 4))
|
||||
(set (match_dup 3) (match_dup 5))]
|
||||
{
|
||||
operands[2] = operand_subword (operands[0], 1, 0, DFmode);
|
||||
operands[3] = operand_subword (operands[0], 0, 0, DFmode);
|
||||
operands[4] = operand_subword (operands[1], 1, 0, DFmode);
|
||||
operands[5] = operand_subword (operands[1], 0, 0, DFmode);
|
||||
})
|
||||
|
||||
(define_split
|
||||
[(set (match_operand:DF 0 "register_operand" "")
|
||||
(match_operand:DF 1 "memory_operand" ""))]
|
||||
"!TARGET_64BIT && reload_completed
|
||||
&& !FP_REG_P (operands[0])
|
||||
&& !FP_REG_P (operands[1])
|
||||
&& !s_operand (operands[1], VOIDmode)"
|
||||
[(set (match_dup 0) (match_dup 1))]
|
||||
"
|
||||
{
|
||||
rtx addr = operand_subword (operands[0], 1, 0, DFmode);
|
||||
s390_load_address (addr, XEXP (operands[1], 0));
|
||||
operands[1] = replace_equiv_address (operands[1], addr);
|
||||
}")
|
||||
})
|
||||
|
||||
(define_expand "reload_outdf"
|
||||
[(parallel [(match_operand:DF 0 "memory_operand" "")
|
||||
(match_operand:DF 1 "register_operand" "d")
|
||||
(match_operand:SI 2 "register_operand" "=&a")])]
|
||||
"!TARGET_64BIT"
|
||||
{
|
||||
s390_load_address (operands[2], XEXP (operands[0], 0));
|
||||
operands[0] = replace_equiv_address (operands[0], operands[2]);
|
||||
emit_move_insn (operands[0], operands[1]);
|
||||
DONE;
|
||||
})
|
||||
|
||||
;
|
||||
; movsf instruction pattern(s).
|
||||
|
|
|
|||
|
|
@ -1,3 +1,7 @@
|
|||
2003-06-27 Ulrich Weigand <uweigand@de.ibm.com>
|
||||
|
||||
* gcc.dg/20030627-1.c: New test.
|
||||
|
||||
2003-06-26 Mark Mitchell <mark@codesourcery.com>
|
||||
|
||||
PR c++/11332
|
||||
|
|
|
|||
20
gcc/testsuite/gcc.dg/20030627-1.c
Normal file
20
gcc/testsuite/gcc.dg/20030627-1.c
Normal file
|
|
@ -0,0 +1,20 @@
|
|||
/* This tests whether non-offsettable memory operands are reloaded
|
||||
correctly in certain corner cases on s390 targets. */
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-std=gnu89" } */
|
||||
|
||||
void test_inout (char *bd, int xd, char *bs, int xs)
|
||||
{
|
||||
*(long long *)(bd + xd + 4093) = *(long long *)(bs + xs + 4093);
|
||||
}
|
||||
|
||||
void test_in (char *bd, int xd, char *bs, int xs)
|
||||
{
|
||||
*(long long *)(bd + xd) = *(long long *)(bs + xs + 4093);
|
||||
}
|
||||
|
||||
void test_out (char *bd, int xd, char *bs, int xs)
|
||||
{
|
||||
*(long long *)(bd + xd + 4093) = *(long long *)(bs + xs);
|
||||
}
|
||||
|
||||
Loading…
Add table
Reference in a new issue