From da7d74c253ffa8e7849c9186ef62234a02bc6855 Mon Sep 17 00:00:00 2001 From: Ramana Radhakrishnan Date: Thu, 26 Jul 2012 09:37:38 +0000 Subject: [PATCH] neon.ml (ops): Fix regexp for vld1Q_dups64 and vld1Q_dupu64 tests. 2012-07-26 Ramana Radhakrishnan * config/arm/neon.ml (ops): Fix regexp for vld1Q_dups64 and vld1Q_dupu64 tests. 2012-07-26 Ramana Radhakrishnan * gcc.target/arm/neon/vld1Q_dupu64.c: Regenerate. * gcc.target/arm/neon/vld1Q_dups64.c: Likewise. From-SVN: r189884 --- gcc/ChangeLog | 5 +++++ gcc/config/arm/neon.ml | 4 +++- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c | 2 +- gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c | 2 +- 5 files changed, 15 insertions(+), 3 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c0550c5b6e7..55075a407e1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2012-07-26 Ramana Radhakrishnan + + * config/arm/neon.ml (ops): Fix regexp for vld1Q_dups64 and + vld1Q_dupu64 tests. + 2012-07-26 Oleg Endo PR target/51244 diff --git a/gcc/config/arm/neon.ml b/gcc/config/arm/neon.ml index 24829f2d501..56869c03c40 100644 --- a/gcc/config/arm/neon.ml +++ b/gcc/config/arm/neon.ml @@ -1445,8 +1445,10 @@ let ops = CstPtrTo Corereg |]]], Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q_dup", bits_1, pf_su_8_32; + (* Treated identically to vld1_dup above as we now + do a single load followed by a duplicate. *) Vldx_dup 1, - [Disassembles_as [Use_operands [| VecArray (2, Dreg); + [Disassembles_as [Use_operands [| VecArray (1, Dreg); CstPtrTo Corereg |]]], Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q_dup", bits_1, [S64; U64]; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 254bf802d8d..bc12992365c 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2012-07-26 Ramana Radhakrishnan + + * gcc.target/arm/neon/vld1Q_dupu64.c: Regenerate. + * gcc.target/arm/neon/vld1Q_dups64.c: Likewise. + 2012-07-26 Mikael Morin PR fortran/44354 diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c index 912b93d1d6c..4fceee82eda 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c @@ -15,5 +15,5 @@ void test_vld1Q_dups64 (void) out_int64x2_t = vld1q_dup_s64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c index 234db407b37..ef0a3828c3e 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c @@ -15,5 +15,5 @@ void test_vld1Q_dupu64 (void) out_uint64x2_t = vld1q_dup_u64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */