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arm/97903: Missed optimization in lowering test operation.

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gcc/ChangeLog:

2021-05-05  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

	* config/arm/neon.md (neon_vtst_combine<mode>): New pattern.
	* config/arm/predicates.md (minus_one_operand): New predicate.
This commit is contained in:
Prathamesh Kulkarni 2021-05-05 21:11:45 +05:30
parent b927ffdd6c
commit d9937da063
2 changed files with 17 additions and 0 deletions
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13
gcc/config/arm/neon.md
View file

@ -2588,6 +2588,19 @@
[(set_attr "type" "neon_tst<q>")]
)
(define_insn "neon_vtst_combine<mode>"
[(set (match_operand:VDQIW 0 "s_register_operand" "=w")
(plus:VDQIW
(eq:VDQIW
(and:VDQIW (match_operand:VDQIW 1 "s_register_operand" "w")
(match_operand:VDQIW 2 "s_register_operand" "w"))
(match_operand:VDQIW 3 "zero_operand" "i"))
(match_operand:VDQIW 4 "minus_one_operand" "i")))]
"TARGET_NEON"
"vtst.<V_sz_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
[(set_attr "type" "neon_tst<q>")]
)
(define_insn "neon_vabd<sup><mode>"
[(set (match_operand:VDQIW 0 "s_register_operand" "=w")
(unspec:VDQIW [(match_operand:VDQIW 1 "s_register_operand" "w")

4
gcc/config/arm/predicates.md
View file

@ -200,6 +200,10 @@
(and (match_code "const_int,const_double,const_vector")
(match_test "op == CONST0_RTX (mode)")))
(define_predicate "minus_one_operand"
(and (match_code "const_int,const_double,const_vector")
(match_test "op == CONSTM1_RTX (mode)")))
;; Match a register, or zero in the appropriate mode.
(define_predicate "reg_or_zero_operand"
(ior (match_operand 0 "s_register_operand")