[AArch64] Fix address printing on ILP32

Fix address printing for ILP32.  The md file uses 'a' in assembler
templates for symbolic addresses in adrp/add, which end up calling
aarch64_print_operand_address.  However in ILP32 these are not valid
memory addresses (being ptr_mode rather than Pmode), so the assert
triggers.  Since it is incorrect to use symbols in memory addresses
(besides literal pool accesses), change the 'a' to 'c' in the md file.

Skip one failing test in ILP32 which combines the 'p' modifier with the 'a'
assembler template to fake a memory reference.

    gcc/
	* config/aarch64/aarch64.md (call_insn): Use %c rather than %a.
	(call_value_insn): Likewise.
	(sibcall_insn): Likewise.
	(sibcall_value_insn): Likewise.
	(movsi_aarch64): Likewise.
	(movdi_aarch64): Likewise.
	(add_losym_): Likewise.
	(ldr_got_small_): Likewise.
	(ldr_got_small_sidi): Likewise.
	(ldr_got_small_28k_): Likewise.
	(ldr_got_small_28k_sidi): Likewise.
	* config/aarch64/aarch64.c (aarch64_print_address_internal):
	Move output_addr_const to symbolic case. Add error check.
    testsuite/
	* gcc.dg/asm-4.c: Skip on AArch64 with ILP32 as test is incorrect.

From-SVN: r255333
This commit is contained in:
Wilco Dijkstra 2017-12-01 19:54:29 +00:00 committed by Wilco Dijkstra
parent 8a302cb2b3
commit d65912578b
5 changed files with 37 additions and 13 deletions

View file

@ -1,3 +1,19 @@
2017-12-01 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.md (call_insn): Use %c rather than %a.
(call_value_insn): Likewise.
(sibcall_insn): Likewise.
(sibcall_value_insn): Likewise.
(movsi_aarch64): Likewise.
(movdi_aarch64): Likewise.
(add_losym_): Likewise.
(ldr_got_small_): Likewise.
(ldr_got_small_sidi): Likewise.
(ldr_got_small_28k_): Likewise.
(ldr_got_small_28k_sidi): Likewise.
* config/aarch64/aarch64.c (aarch64_print_address_internal):
Move output_addr_const to symbolic case. Add error check.
2017-12-01 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/predicates.md (plus16_Q_operand): New predicate.

View file

@ -5713,10 +5713,11 @@ aarch64_print_address_internal (FILE *f, machine_mode mode, rtx x, RTX_CODE op)
return;
case ADDRESS_SYMBOLIC:
break;
output_addr_const (f, x);
return;
}
output_addr_const (f, x);
output_operand_lossage ("invalid operand for '%%%c'", op);
}
/* Print address 'x' of a LDP/STP with mode 'mode'. */

View file

@ -749,7 +749,7 @@
""
"@
blr\\t%0
bl\\t%a0"
bl\\t%c0"
[(set_attr "type" "call, call")]
)
@ -775,7 +775,7 @@
""
"@
blr\\t%1
bl\\t%a1"
bl\\t%c1"
[(set_attr "type" "call, call")]
)
@ -811,7 +811,7 @@
"SIBLING_CALL_P (insn)"
"@
br\\t%0
b\\t%a0"
b\\t%c0"
[(set_attr "type" "branch, branch")]
)
@ -824,7 +824,7 @@
"SIBLING_CALL_P (insn)"
"@
br\\t%1
b\\t%a1"
b\\t%c1"
[(set_attr "type" "branch, branch")]
)
@ -946,7 +946,7 @@
ldr\\t%s0, %1
str\\t%w1, %0
str\\t%s1, %0
adr\\t%x0, %a1
adr\\t%x0, %c1
adrp\\t%x0, %A1
fmov\\t%s0, %w1
fmov\\t%w0, %s1
@ -981,7 +981,7 @@
ldr\\t%d0, %1
str\\t%x1, %0
str\\t%d1, %0
adr\\t%x0, %a1
adr\\t%x0, %c1
adrp\\t%x0, %A1
fmov\\t%d0, %x1
fmov\\t%x0, %d1
@ -5401,7 +5401,7 @@
(lo_sum:P (match_operand:P 1 "register_operand" "r")
(match_operand 2 "aarch64_valid_symref" "S")))]
""
"add\\t%<w>0, %<w>1, :lo12:%a2"
"add\\t%<w>0, %<w>1, :lo12:%c2"
[(set_attr "type" "alu_imm")]
)
@ -5412,7 +5412,7 @@
(match_operand:PTR 2 "aarch64_valid_symref" "S")))]
UNSPEC_GOTSMALLPIC))]
""
"ldr\\t%<w>0, [%1, #:got_lo12:%a2]"
"ldr\\t%<w>0, [%1, #:got_lo12:%c2]"
[(set_attr "type" "load_<ldst_sz>")]
)
@ -5424,7 +5424,7 @@
(match_operand:DI 2 "aarch64_valid_symref" "S")))]
UNSPEC_GOTSMALLPIC)))]
"TARGET_ILP32"
"ldr\\t%w0, [%1, #:got_lo12:%a2]"
"ldr\\t%w0, [%1, #:got_lo12:%c2]"
[(set_attr "type" "load_4")]
)
@ -5435,7 +5435,7 @@
(match_operand:PTR 2 "aarch64_valid_symref" "S")))]
UNSPEC_GOTSMALLPIC28K))]
""
"ldr\\t%<w>0, [%1, #:<got_modifier>:%a2]"
"ldr\\t%<w>0, [%1, #:<got_modifier>:%c2]"
[(set_attr "type" "load_<ldst_sz>")]
)
@ -5447,7 +5447,7 @@
(match_operand:DI 2 "aarch64_valid_symref" "S")))]
UNSPEC_GOTSMALLPIC28K)))]
"TARGET_ILP32"
"ldr\\t%w0, [%1, #:gotpage_lo14:%a2]"
"ldr\\t%w0, [%1, #:gotpage_lo14:%c2]"
[(set_attr "type" "load_4")]
)

View file

@ -1,3 +1,7 @@
2017-12-01 Wilco Dijkstra <wdijkstr@arm.com>
* gcc.dg/asm-4.c: Skip on AArch64 with ILP32 as test is incorrect.
2017-12-01 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/83224

View file

@ -1,6 +1,9 @@
/* { dg-do compile } */
/* { dg-options "" } */
/* "p" modifier can't be used to generate a valid memory address with ILP32. */
/* { dg-skip-if "" { aarch64*-*-* && ilp32 } } */
int main()
{
int x, y, z;