predicates.md (even_register_operand, [...]): New predicates.
* config/avr/predicates.md (even_register_operand, odd_register_operand): New predicates. * config/avr/avr.md (movw peephole2): New. (movw_r peephole2): New. From-SVN: r123379
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@ -1,3 +1,10 @@
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2007-03-31 Anatoly Sokolov <aesok@post.ru>
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* config/avr/predicates.md (even_register_operand,
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odd_register_operand): New predicates.
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* config/avr/avr.md (movw peephole2): New.
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(movw_r peephole2): New.
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2007-03-30 Rafael Avila de Espindola <espindola@google.com>
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* tree.h (get_signed_or_unsigned_type): New.
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@ -283,6 +283,34 @@
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[(set_attr "length" "2,6,7,2,6,5,2")
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(set_attr "cc" "none,clobber,clobber,none,clobber,none,none")])
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(define_peephole2 ; movw
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[(set (match_operand:QI 0 "even_register_operand" "")
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(match_operand:QI 1 "even_register_operand" ""))
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(set (match_operand:QI 2 "odd_register_operand" "")
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(match_operand:QI 3 "odd_register_operand" ""))]
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"(AVR_HAVE_MOVW
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&& REGNO (operands[0]) == REGNO (operands[2]) - 1
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&& REGNO (operands[1]) == REGNO (operands[3]) - 1)"
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[(set (match_dup 4) (match_dup 5))]
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{
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operands[4] = gen_rtx_REG (HImode, REGNO (operands[0]));
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operands[5] = gen_rtx_REG (HImode, REGNO (operands[1]));
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})
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(define_peephole2 ; movw_r
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[(set (match_operand:QI 0 "odd_register_operand" "")
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(match_operand:QI 1 "odd_register_operand" ""))
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(set (match_operand:QI 2 "even_register_operand" "")
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(match_operand:QI 3 "even_register_operand" ""))]
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"(AVR_HAVE_MOVW
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&& REGNO (operands[2]) == REGNO (operands[0]) - 1
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&& REGNO (operands[3]) == REGNO (operands[1]) - 1)"
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[(set (match_dup 4) (match_dup 5))]
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{
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operands[4] = gen_rtx_REG (HImode, REGNO (operands[2]));
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operands[5] = gen_rtx_REG (HImode, REGNO (operands[3]));
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})
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;;==========================================================================
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;; move double word (32 bit)
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@ -28,6 +28,16 @@
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(and (match_code "reg")
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(match_test "REGNO (op) >= 16 && REGNO (op) <= 31")))
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(define_predicate "even_register_operand"
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(and (match_code "reg")
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(and (match_test "REGNO (op) <= 31")
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(match_test "(REGNO (op) & 1) == 0"))))
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(define_predicate "odd_register_operand"
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(and (match_code "reg")
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(and (match_test "REGNO (op) <= 31")
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(match_test "(REGNO (op) & 1) != 0"))))
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;; SP register.
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(define_predicate "stack_register_operand"
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(and (match_code "reg")
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