extend.texi (PowerPC AltiVec Built-in Functions): Rename this subsection to "PowerPC AltiVec/VSX Built-in Functions".
gcc/ChangeLog: 2018-07-18 Kelvin Nilsen <kelvin@gcc.gnu.org> * doc/extend.texi (PowerPC AltiVec Built-in Functions): Rename this subsection to "PowerPC AltiVec/VSX Built-in Functions". (PowerPC AltiVec/VSX Built-in Functions): New name for subsection previously known as "PowerPC AltiVec Built-in Functions". Move some material to new subsubsections "PowerPC AltiVec Built-in Functions on ISA 2.06" and "PowerPC AltiVec Built-in Functions on ISA 2.07". (PowerPC Altivec Built-in Functions on ISA 2.05): New subsubsection. (PowerPC Altivec Built-in Functions on ISA 2.06): Likewise. (PowerPC Altivec Built-in Functions on ISA 2.07): Likewise. (PowerPC Altivec Built-in Functions on ISA 3.0): Likewise. From-SVN: r262863
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Kelvin Nilsen
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2 changed files with 89 additions and 55 deletions
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@ -1,3 +1,17 @@
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2018-07-18 Kelvin Nilsen <kelvin@gcc.gnu.org>
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* doc/extend.texi (PowerPC AltiVec Built-in Functions): Rename
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this subsection to "PowerPC AltiVec/VSX Built-in Functions".
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(PowerPC AltiVec/VSX Built-in Functions): New name for subsection
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previously known as "PowerPC AltiVec Built-in Functions". Move
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some material to new subsubsections "PowerPC AltiVec Built-in
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Functions on ISA 2.06" and "PowerPC AltiVec Built-in Functions on
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ISA 2.07".
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(PowerPC Altivec Built-in Functions on ISA 2.05): New subsubsection.
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(PowerPC Altivec Built-in Functions on ISA 2.06): Likewise.
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(PowerPC Altivec Built-in Functions on ISA 2.07): Likewise.
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(PowerPC Altivec Built-in Functions on ISA 3.0): Likewise.
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2018-07-18 Richard Biener <rguenther@suse.de>
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PR tree-optimization/86557
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@ -15941,10 +15941,8 @@ The @code{__builtin_dfp_dtstsfi_ov_dd} and
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require that the type of the @code{value} argument be
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@code{__Decimal64} and @code{__Decimal128} respectively.
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@node PowerPC AltiVec/VSX Built-in Functions
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@subsection PowerPC AltiVec Built-in Functions
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@subsection PowerPC AltiVec/VSX Built-in Functions
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GCC provides an interface for the PowerPC family of processors to access
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the AltiVec operations described in Motorola's AltiVec Programming
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@ -15969,19 +15967,6 @@ vector bool int
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vector float
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@end smallexample
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If @option{-mvsx} is used the following additional vector types are
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implemented.
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@smallexample
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vector unsigned long
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vector signed long
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vector double
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@end smallexample
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The long types are only implemented for 64-bit code generation, and
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the long type is only used in the floating point/integer conversion
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instructions.
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GCC's implementation of the high-level language interface available from
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C and C++ code differs from Motorola's documentation in several ways.
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@ -16039,6 +16024,16 @@ the interfaces described therein. However, historically GCC has provided
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additional interfaces for access to vector instructions. These are
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briefly described below.
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@menu
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* PowerPC AltiVec Built-in Functions on ISA 2.05::
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* PowerPC AltiVec Built-in Functions Available on ISA 2.06::
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* PowerPC AltiVec Built-in Functions Available on ISA 2.07::
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* PowerPC AltiVec Built-in Functions Available on ISA 3.0::
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@end menu
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@node PowerPC AltiVec Built-in Functions on ISA 2.05
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@subsubsection PowerPC AltiVec Built-in Functions on ISA 2.05
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The following interfaces are supported for the generic and specific
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AltiVec operations and the AltiVec predicates. In cases where there
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is a direct mapping between generic and specific operations, only the
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@ -17581,132 +17576,152 @@ vector unsigned char vec_xor (vector unsigned char, vector bool char);
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vector unsigned char vec_xor (vector unsigned char, vector unsigned char);
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@end smallexample
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The following built-in functions which are currently documented in
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this section are not alphabetized with other built-in functions of
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this section because they belong in different sections.
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@node PowerPC AltiVec Built-in Functions Available on ISA 2.06
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@subsubsection PowerPC AltiVec Built-in Functions Available on ISA 2.06
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The AltiVec built-in functions described in this section are
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available on the PowerPC family of processors starting with ISA 2.06
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or later. These are normally enabled by adding @option{-mvsx} to the
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command line.
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When @option{-mvsx} is used, the following additional vector types are
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implemented.
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@smallexample
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/* __int128, long long, and double arguments and results require -mvsx. */
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vector unsigned __int128
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vector signed __int128
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vector unsigned long long int
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vector signed long long int
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vector double
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@end smallexample
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The long long types are only implemented for 64-bit code generation.
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@smallexample
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vector bool long long vec_and (vector bool long long int, vector bool long long);
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vector double vec_ctf (vector unsigned long, const int);
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vector double vec_ctf (vector signed long, const int);
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vector signed long vec_cts (vector double, const int);
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vector unsigned long vec_ctu (vector double, const int);
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void vec_dst (const unsigned long *, int, const int);
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void vec_dst (const long *, int, const int);
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void vec_dststt (const unsigned long *, int, const int);
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void vec_dststt (const long *, int, const int);
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void vec_dstt (const unsigned long *, int, const int);
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void vec_dstt (const long *, int, const int);
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vector unsigned char vec_lvsl (int, const unsigned long *);
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vector unsigned char vec_lvsl (int, const long *);
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vector unsigned char vec_lvsr (int, const unsigned long *);
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vector unsigned char vec_lvsr (int, const long *);
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vector double vec_mul (vector double, vector double);
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vector long vec_mul (vector long, vector long);
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vector unsigned long vec_mul (vector unsigned long, vector unsigned long);
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vector unsigned long long vec_mule (vector unsigned int, vector unsigned int);
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vector signed long long vec_mule (vector signed int, vector signed int);
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vector unsigned long long vec_mulo (vector unsigned int, vector unsigned int);
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vector signed long long vec_mulo (vector signed int, vector signed int);
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vector double vec_nabs (vector double);
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vector bool long long vec_reve (vector bool long long);
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vector signed long long vec_reve (vector signed long long);
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vector unsigned long long vec_reve (vector unsigned long long);
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vector double vec_sld (vector double, vector double, const int);
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vector bool long long int vec_sld (vector bool long long int,
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vector bool long long int, const int);
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vector long long int vec_sld (vector long long int, vector long long int, const int);
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vector unsigned long long int vec_sld (vector unsigned long long int,
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vector unsigned long long int, const int);
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vector long long int vec_sll (vector long long int, vector unsigned char);
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vector unsigned long long int vec_sll (vector unsigned long long int,
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vector unsigned char);
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vector signed long long vec_slo (vector signed long long, vector signed char);
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vector signed long long vec_slo (vector signed long long, vector unsigned char);
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vector unsigned long long vec_slo (vector unsigned long long, vector signed char);
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vector unsigned long long vec_slo (vector unsigned long long, vector unsigned char);
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vector signed long vec_splat (vector signed long, const int);
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vector unsigned long vec_splat (vector unsigned long, const int);
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vector long long int vec_srl (vector long long int, vector unsigned char);
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vector unsigned long long int vec_srl (vector unsigned long long int,
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vector unsigned char);
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vector long long int vec_sro (vector long long int, vector char);
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vector long long int vec_sro (vector long long int, vector unsigned char);
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vector unsigned long long int vec_sro (vector unsigned long long int, vector char);
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vector unsigned long long int vec_sro (vector unsigned long long int,
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vector unsigned char);
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vector signed __int128 vec_subc (vector signed __int128, vector signed __int128);
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vector unsigned __int128 vec_subc (vector unsigned __int128, vector unsigned __int128);
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vector signed __int128 vec_sube (vector signed __int128, vector signed __int128,
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vector signed __int128);
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vector unsigned __int128 vec_sube (vector unsigned __int128, vector unsigned __int128,
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vector unsigned __int128);
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vector signed __int128 vec_subec (vector signed __int128, vector signed __int128,
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vector signed __int128);
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vector unsigned __int128 vec_subec (vector unsigned __int128, vector unsigned __int128,
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vector unsigned __int128);
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vector double vec_unpackh (vector float);
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vector double vec_unpackl (vector float);
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/* vec_doublee requires -mvsx. */
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vector double vec_doublee (vector float);
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vector double vec_doublee (vector signed int);
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vector double vec_doublee (vector unsigned int);
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/* vec_doubleo requires -mvsx. */
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vector double vec_doubleo (vector float);
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vector double vec_doubleo (vector signed int);
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vector double vec_doubleo (vector unsigned int);
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/* vec_doubleh requires -mvsx. */
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vector double vec_doubleh (vector float);
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vector double vec_doubleh (vector signed int);
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vector double vec_doubleh (vector unsigned int);
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/* vec_doublel requires -mvsx. */
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vector double vec_doublel (vector float);
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vector double vec_doublel (vector signed int);
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vector double vec_doublel (vector unsigned int);
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/* vec_float requires -mvsx. */
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vector float vec_float (vector signed int);
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vector float vec_float (vector unsigned int);
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/* vec_float2 requires -mvsx. */
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vector float vec_float2 (vector signed long long, vector signed long long);
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vector float vec_float2 (vector unsigned long long, vector signed long long);
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/* vec_floate requires -mvsx. */
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vector float vec_floate (vector double);
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vector float vec_floate (vector signed long long);
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vector float vec_floate (vector unsigned long long);
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/* vec_floato requires -mvsx. */
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vector float vec_floato (vector double);
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vector float vec_floato (vector signed long long);
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vector float vec_floato (vector unsigned long long);
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/* vec_neg requires P8_vector */
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vector signed char vec_neg (vector signed char);
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vector signed short vec_neg (vector signed short);
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vector signed int vec_neg (vector signed int);
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vector signed long long vec_neg (vector signed long long);
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vector float char vec_neg (vector float);
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vector double vec_neg (vector double);
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/* vec_signed requires -mvsx. */
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vector signed long long vec_signed (vector double);
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vector signed int vec_signed (vector float);
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/* vec_signede requires -mvsx. */
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vector signed int vec_signede (vector double);
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/* vec_signedo requires -mvsx. */
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vector signed int vec_signedo (vector double);
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/* vec_signed2 requires -mcpu=power8. */
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vector signed int vec_signed2 (vector double, vector double);
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/* vec_sldw requires -mvsx. */
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vector signed int vec_signedo (vector double);
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vector signed char vec_sldw (vector signed char, vector signed char, const int);
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vector unsigned char vec_sldw (vector unsigned char, vector unsigned char, const int);
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vector signed short vec_sldw (vector signed short, vector signed short, const int);
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@ -17719,25 +17734,13 @@ vector signed long long vec_sldw (vector signed long long,
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vector unsigned long long vec_sldw (vector unsigned long long,
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vector unsigned long long, const int);
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/* vec_unsigned requires -mvsx. */
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vector signed long long vec_unsigned (vector double);
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vector signed int vec_unsigned (vector float);
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/* vec_unsignede requires -mvsx. */
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vector signed int vec_unsignede (vector double);
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/* vec_unsignedo requires -mvsx. */
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vector signed int vec_unsignedo (vector double);
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/* vec_unsignede requires -mcpu=power8. */
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vector signed int vec_unsigned2 (vector double, vector double);
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@end smallexample
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If the vector/scalar (VSX) instruction set is available, the following
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additional functions are available:
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@smallexample
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vector double vec_abs (vector double);
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vector double vec_add (vector double, vector double);
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vector double vec_and (vector double, vector double);
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@ -17999,6 +18002,9 @@ if the VSX instruction set is available. The @samp{vec_vsx_ld} and
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@samp{vec_vsx_st} built-in functions always generate the VSX @samp{LXVD2X},
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@samp{LXVW4X}, @samp{STXVD2X}, and @samp{STXVW4X} instructions.
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@node PowerPC AltiVec Built-in Functions Available on ISA 2.07
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@subsubsection PowerPC AltiVec Built-in Functions Available on ISA 2.07
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If the ISA 2.07 additions to the vector/scalar (power8-vector)
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instruction set are available, the following additional functions are
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available for both 32-bit and 64-bit targets. For 64-bit targets, you
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@ -18007,6 +18013,17 @@ can use @var{vector long} instead of @var{vector long long},
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@var{vector unsigned long} instead of @var{vector unsigned long long}.
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@smallexample
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vector signed char vec_neg (vector signed char);
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vector signed short vec_neg (vector signed short);
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vector signed int vec_neg (vector signed int);
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vector signed long long vec_neg (vector signed long long);
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vector float char vec_neg (vector float);
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vector double vec_neg (vector double);
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vector signed int vec_signed2 (vector double, vector double);
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vector signed int vec_unsigned2 (vector double, vector double);
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vector long long vec_abs (vector long long);
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vector long long vec_add (vector long long, vector long long);
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@ -18366,6 +18383,9 @@ int __builtin_bcdsub_gt (vector __int128_t, vector __int128_t);
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int __builtin_bcdsub_ov (vector __int128_t, vector __int128_t);
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@end smallexample
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@node PowerPC AltiVec Built-in Functions Available on ISA 3.0
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@subsubsection PowerPC AltiVec Built-in Functions Available on ISA 3.0
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The following additional built-in functions are also available for the
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PowerPC family of processors, starting with ISA 3.0
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(@option{-mcpu=power9}) or later:
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