re PR target/30315 (optimize unsigned-add overflow test on x86 to use cpu flags from addl)
PR target/30315 * config/i386/i386.h (CANONICALIZE_COMPARISON): New. * config/i386/i386.md (plusminus)(addsub)(SWI): New. (*<addsub><mode>3_cc_overflow): New. (*add<mode>3_cconly_overflow): New. (*sub<mode>3_cconly_overflow): New. (*<addsub>si3_zext_cc_overflow): New. * config/i386/predicates.md (fcmov_comparison_operator): Accept CCCmode for LTU, GTU, LEU and GEU. (ix86_comparison_operator): Likewise. (ix86_carry_flag_operator): Carry flag is set if LTU or GTU in CCCmode. * gcc/config/i386/i386.c (put_condition_code): Support CCCmode. (ix86_cc_mode): Use CCCmode when testing for overflow of PLUS or MINUS expressions. testsuite/ PR target/30315 * gcc.target/i386/pr30315.c: New. From-SVN: r127481
This commit is contained in:
Rask Ingemann Lambertsen
Rask Ingemann Lambertsen
parent
9a251aa118
commit
d39d658dbe
7 changed files with 244 additions and 11 deletions
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@ -1,3 +1,20 @@
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2007-08-14 Rask Ingemann Lambertsen <rask@sygehus.dk>
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PR target/30315
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* config/i386/i386.h (CANONICALIZE_COMPARISON): New.
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* config/i386/i386.md (plusminus)(addsub)(SWI): New.
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(*<addsub><mode>3_cc_overflow): New.
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(*add<mode>3_cconly_overflow): New.
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(*sub<mode>3_cconly_overflow): New.
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(*<addsub>si3_zext_cc_overflow): New.
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* config/i386/predicates.md (fcmov_comparison_operator): Accept
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CCCmode for LTU, GTU, LEU and GEU.
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(ix86_comparison_operator): Likewise.
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(ix86_carry_flag_operator): Carry flag is set if LTU or GTU in CCCmode.
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* gcc/config/i386/i386.c (put_condition_code): Support CCCmode.
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(ix86_cc_mode): Use CCCmode when testing for overflow of PLUS
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or MINUS expressions.
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2007-08-14 Andrew Pinski <pinskia@gmail.com>
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PR c/30428
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@ -8261,8 +8261,12 @@ put_condition_code (enum rtx_code code, enum machine_mode mode, int reverse,
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case GTU:
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/* ??? Use "nbe" instead of "a" for fcmov lossage on some assemblers.
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Those same assemblers have the same but opposite lossage on cmov. */
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gcc_assert (mode == CCmode);
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suffix = fp ? "nbe" : "a";
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if (mode == CCmode)
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suffix = fp ? "nbe" : "a";
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else if (mode == CCCmode)
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suffix = "b";
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else
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gcc_unreachable ();
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break;
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case LT:
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switch (mode)
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@ -8282,7 +8286,7 @@ put_condition_code (enum rtx_code code, enum machine_mode mode, int reverse,
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}
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break;
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case LTU:
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gcc_assert (mode == CCmode);
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gcc_assert (mode == CCmode || mode == CCCmode);
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suffix = "b";
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break;
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case GE:
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@ -8304,7 +8308,7 @@ put_condition_code (enum rtx_code code, enum machine_mode mode, int reverse,
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break;
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case GEU:
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/* ??? As above. */
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gcc_assert (mode == CCmode);
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gcc_assert (mode == CCmode || mode == CCCmode);
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suffix = fp ? "nb" : "ae";
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break;
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case LE:
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@ -8312,8 +8316,13 @@ put_condition_code (enum rtx_code code, enum machine_mode mode, int reverse,
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suffix = "le";
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break;
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case LEU:
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gcc_assert (mode == CCmode);
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suffix = "be";
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/* ??? As above. */
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if (mode == CCmode)
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suffix = "be";
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else if (mode == CCCmode)
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suffix = fp ? "nb" : "ae";
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else
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gcc_unreachable ();
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break;
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case UNORDERED:
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suffix = fp ? "u" : "p";
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@ -11040,10 +11049,21 @@ ix86_cc_mode (enum rtx_code code, rtx op0, rtx op1)
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return CCZmode;
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/* Codes needing carry flag. */
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case GEU: /* CF=0 */
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case GTU: /* CF=0 & ZF=0 */
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case LTU: /* CF=1 */
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/* Detect overflow checks. They need just the carry flag. */
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if (GET_CODE (op0) == PLUS
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&& rtx_equal_p (op1, XEXP (op0, 0)))
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return CCCmode;
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else
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return CCmode;
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case GTU: /* CF=0 & ZF=0 */
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case LEU: /* CF=1 | ZF=1 */
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return CCmode;
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/* Detect overflow checks. They need just the carry flag. */
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if (GET_CODE (op0) == MINUS
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&& rtx_equal_p (op1, XEXP (op0, 0)))
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return CCCmode;
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else
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return CCmode;
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/* Codes possibly doable only with sign flag when
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comparing against zero. */
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case GE: /* SF=OF or SF=0 */
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@ -2065,6 +2065,16 @@ do { \
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#define SELECT_CC_MODE(OP, X, Y) ix86_cc_mode ((OP), (X), (Y))
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/* Canonicalize overflow checks to save on the insn patterns. We change
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"a + b < b" into "a + b < a" and "a + b >= b" into "a + b >= a". */
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#define CANONICALIZE_COMPARISON(code, op0, op1) \
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{ \
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if ((code == LTU || code == GEU) \
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&& GET_CODE (op0) == PLUS \
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&& rtx_equal_p (op1, XEXP (op0, 1))) \
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op1 = XEXP (op0, 0); \
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}
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/* Return nonzero if MODE implies a floating point inequality can be
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reversed. */
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@ -488,6 +488,33 @@
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[(set_attr "length" "128")
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(set_attr "type" "multi")])
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(define_code_macro plusminus [plus minus])
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;; Base name for define_insn and insn mnemonic.
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(define_code_attr addsub [(plus "add") (minus "sub")])
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;; Mark commutative operators as such in constraints.
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(define_code_attr comm [(plus "%") (minus "")])
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;; All single word integer modes.
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(define_mode_macro SWI [QI HI SI (DI "TARGET_64BIT")])
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;; Instruction suffix for integer modes.
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(define_mode_attr imodesuffix [(QI "b") (HI "w") (SI "l") (DI "q")])
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;; Register class for integer modes.
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(define_mode_attr r [(QI "q") (HI "r") (SI "r") (DI "r")])
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;; Immediate operand constraint for integer modes.
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(define_mode_attr i [(QI "i") (HI "i") (SI "i") (DI "e")])
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;; General operand predicate for integer modes.
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(define_mode_attr general_operand
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[(QI "general_operand")
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(HI "general_operand")
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(SI "general_operand")
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(DI "x86_64_general_operand")])
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;; All x87 floating point modes
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(define_mode_macro X87MODEF [SF DF XF])
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@ -4855,6 +4882,56 @@
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[(set_attr "type" "alu")
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(set_attr "mode" "DI")])
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(define_insn "*<addsub><mode>3_cc_overflow"
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[(set (reg:CCC FLAGS_REG)
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(compare:CCC
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(plusminus:SWI
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(match_operand:SWI 1 "nonimmediate_operand" "<comm>0,0")
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(match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m"))
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(match_dup 1)))
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(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
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(plusminus:SWI (match_dup 1) (match_dup 2)))]
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"ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
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"<addsub>{<imodesuffix>}\t{%2, %0|%0, %2}"
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[(set_attr "type" "alu")
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(set_attr "mode" "<MODE>")])
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(define_insn "*add<mode>3_cconly_overflow"
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[(set (reg:CCC FLAGS_REG)
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(compare:CCC
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(plus:SWI (match_operand:SWI 1 "nonimmediate_operand" "%0")
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(match_operand:SWI 2 "<general_operand>" "<r><i>m"))
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(match_dup 1)))
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(clobber (match_scratch:SWI 0 "=<r>"))]
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"ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
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"add{<imodesuffix>}\t{%2, %0|%0, %2}"
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[(set_attr "type" "alu")
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(set_attr "mode" "<MODE>")])
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(define_insn "*sub<mode>3_cconly_overflow"
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[(set (reg:CCC FLAGS_REG)
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(compare:CCC
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(minus:SWI (match_operand:SWI 0 "nonimmediate_operand" "<r>m,<r>")
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(match_operand:SWI 1 "<general_operand>" "<r><i>,<r>m"))
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(match_dup 0)))]
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""
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"cmp{<imodesuffix>}\t{%1, %0|%0, %1}"
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[(set_attr "type" "icmp")
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(set_attr "mode" "<MODE>")])
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(define_insn "*<addsub>si3_zext_cc_overflow"
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[(set (reg:CCC FLAGS_REG)
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(compare:CCC
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(plusminus:SI (match_operand:SI 1 "nonimmediate_operand" "<comm>0")
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(match_operand:SI 2 "general_operand" "g"))
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(match_dup 1)))
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(set (match_operand:DI 0 "register_operand" "=r")
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(zero_extend:DI (plusminus:SI (match_dup 1) (match_dup 2))))]
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"TARGET_64BIT && ix86_binary_operator_ok (<CODE>, SImode, operands)"
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"<addsub>{l}\t{%2, %k0|%k0, %2}"
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[(set_attr "type" "alu")
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(set_attr "mode" "SI")])
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(define_insn "addqi3_carry"
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[(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q")
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(plus:QI (plus:QI (match_operand:QI 3 "ix86_carry_flag_operator" "")
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@ -879,7 +879,8 @@
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switch (code)
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{
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case LTU: case GTU: case LEU: case GEU:
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if (inmode == CCmode || inmode == CCFPmode || inmode == CCFPUmode)
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if (inmode == CCmode || inmode == CCFPmode || inmode == CCFPUmode
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|| inmode == CCCmode)
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return 1;
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return 0;
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case ORDERED: case UNORDERED:
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@ -924,7 +925,11 @@
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|| inmode == CCGOCmode || inmode == CCNOmode)
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return 1;
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return 0;
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case LTU: case GTU: case LEU: case ORDERED: case UNORDERED: case GEU:
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case LTU: case GTU: case LEU: case GEU:
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if (inmode == CCmode || inmode == CCCmode)
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return 1;
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return 0;
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case ORDERED: case UNORDERED:
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if (inmode == CCmode)
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return 1;
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return 0;
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@ -939,7 +944,7 @@
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;; Return 1 if OP is a valid comparison operator testing carry flag to be set.
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(define_predicate "ix86_carry_flag_operator"
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(match_code "ltu,lt,unlt,gt,ungt,le,unle,ge,unge,ltgt,uneq")
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(match_code "ltu,lt,unlt,gtu,gt,ungt,le,unle,ge,unge,ltgt,uneq")
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{
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enum machine_mode inmode = GET_MODE (XEXP (op, 0));
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enum rtx_code code = GET_CODE (op);
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@ -957,6 +962,8 @@
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return 0;
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code = ix86_fp_compare_code_to_integer (code);
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}
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else if (inmode == CCCmode)
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return code == LTU || code == GTU;
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else if (inmode != CCmode)
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return 0;
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@ -1,3 +1,8 @@
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2007-08-14 Rask Ingemann Lambertsen <rask@sygehus.dk>
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PR target/30315
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* gcc.target/i386/pr30315.c: New.
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2007-08-14 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
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PR fortran/32594
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97
gcc/testsuite/gcc.target/i386/pr30315.c
Normal file
97
gcc/testsuite/gcc.target/i386/pr30315.c
Normal file
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@ -0,0 +1,97 @@
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/* { dg-do compile } */
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/* { dg-options "-O2" } */
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/* { dg-final { scan-assembler-times "cmp" 4 } } */
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extern void abort (void);
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int c;
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#define PLUSCC1(T, t, C) \
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T pluscc##t##C (T a, T b) \
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{ \
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T sum = a + b; \
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if (sum < C) \
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abort (); \
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return sum; \
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}
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#define PLUSCC(T, t) PLUSCC1(T, t, a) PLUSCC1(T, t, b)
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#define INCCC1(T, t, C) \
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T inccc##t##C (T a, T b) \
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{ \
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T sum = a + b; \
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if (sum < C) \
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c ++; \
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return sum; \
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}
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#define INCCC(T, t) INCCC1(T, t, a) INCCC1(T, t, b)
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#define PLUSCCONLY1(T, t, C) \
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void pluscconly##t##C (T a, T b) \
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{ \
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T sum = a + b; \
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if (sum < C) \
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abort (); \
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}
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#define PLUSCCONLY(T, t) PLUSCCONLY1(T, t, a) PLUSCCONLY1(T, t, b)
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#define MINUSCC(T, t) \
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T minuscc##t (T a, T b) \
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{ \
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T difference = a - b; \
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if (difference > a) \
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abort (); \
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return difference; \
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}
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#define DECCC(T, t) \
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T deccc##t (T a, T b) \
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{ \
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T difference = a - b; \
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if (difference > a) \
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c --; \
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return difference; \
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}
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#define MINUSCCONLY(T, t) \
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void minuscconly##t (T a, T b) \
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{ \
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T difference = a - b; \
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if (difference > a) \
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abort (); \
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}
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#define TEST(T, t) \
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PLUSCC(T, t) \
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PLUSCCONLY(T, t) \
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INCCC(T, t) \
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MINUSCC(T, t) \
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MINUSCCONLY(T, t) \
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DECCC(T, t)
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TEST (unsigned long, l)
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TEST (unsigned int, i)
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TEST (unsigned short, s)
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TEST (unsigned char, c)
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#define PLUSCCZEXT(C) \
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unsigned long pluscczext##C (unsigned int a, unsigned int b) \
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{ \
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unsigned int sum = a + b; \
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if (sum < C) \
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abort (); \
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return sum; \
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}
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PLUSCCZEXT(a)
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PLUSCCZEXT(b)
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#define MINUSCCZEXT \
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unsigned long minuscczext (unsigned int a, unsigned int b) \
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{ \
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unsigned int difference = a - b; \
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if (difference > a) \
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abort (); \
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return difference; \
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}
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MINUSCCZEXT
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