i386: Allow 64 bit mask register for -mno-evex512
gcc/ChangeLog: * config/i386/avx512bwintrin.h: Allow 64 bit mask intrin usage for -mno-evex512. * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA2_EVEX512 for 64 bit mask builtins. * config/i386/i386.cc (ix86_hard_regno_mode_ok): Allow 64 bit mask register for -mno-evex512. * config/i386/i386.md (SWI1248_AVX512BWDQ_64): Remove TARGET_EVEX512. (*zero_extendsidi2): Change isa attribute to avx512bw. (kmov_isa): Ditto. (*anddi_1): Ditto. (*andn<mode>_1): Remove TARGET_EVEX512. (*one_cmplsi2_1_zext): Change isa attribute to avx512bw. (*ashl<mode>3_1): Ditto. (*lshr<mode>3_1): Ditto. * config/i386/sse.md (SWI1248_AVX512BWDQ): Remove TARGET_EVEX512. (SWI1248_AVX512BW): Ditto. (SWI1248_AVX512BWDQ2): Ditto. (*knotsi_1_zext): Ditto. (kunpckdi): Ditto. (SWI24_MASK): Removed. (vec_pack_trunc_<mode>): Change iterator from SWI24_MASK to SWI24. (vec_unpacks_lo_di): Remove TARGET_EVEX512. (SWI48x_MASK): Removed. (vec_unpacks_hi_<mode>): Change iterator from SWI48x_MASK to SWI48x. gcc/testsuite/ChangeLog: * gcc.target/i386/avx10_1-6.c: Remove check for errors. * gcc.target/i386/noevex512-2.c: Diito.
This commit is contained in:
Haochen Jiang
parent
576c1fc440
commit
d3545378db
7 changed files with 59 additions and 68 deletions
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@ -34,6 +34,8 @@
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#define __DISABLE_AVX512BW__
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#endif /* __AVX512BW__ */
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typedef unsigned long long __mmask64;
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extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_avx512_set_epi32 (int __q3, int __q2, int __q1, int __q0)
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{
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@ -223,27 +225,6 @@ _kshiftri_mask32 (__mmask32 __A, unsigned int __B)
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#endif
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#ifdef __DISABLE_AVX512BW__
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#undef __DISABLE_AVX512BW__
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#pragma GCC pop_options
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#endif /* __DISABLE_AVX512BW__ */
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#if !defined (__AVX512BW__) || !defined (__EVEX512__)
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#pragma GCC push_options
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#pragma GCC target("avx512bw,evex512")
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#define __DISABLE_AVX512BW_512__
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#endif /* __AVX512BW_512__ */
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/* Internal data types for implementing the intrinsics. */
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typedef short __v32hi __attribute__ ((__vector_size__ (64)));
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typedef short __v32hi_u __attribute__ ((__vector_size__ (64), \
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__may_alias__, __aligned__ (1)));
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typedef char __v64qi __attribute__ ((__vector_size__ (64)));
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typedef char __v64qi_u __attribute__ ((__vector_size__ (64), \
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__may_alias__, __aligned__ (1)));
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typedef unsigned long long __mmask64;
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extern __inline unsigned char
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__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
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_ktest_mask64_u8 (__mmask64 __A, __mmask64 __B, unsigned char *__CF)
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@ -365,6 +346,25 @@ _kandn_mask64 (__mmask64 __A, __mmask64 __B)
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return (__mmask64) __builtin_ia32_kandndi ((__mmask64) __A, (__mmask64) __B);
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}
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#ifdef __DISABLE_AVX512BW__
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#undef __DISABLE_AVX512BW__
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#pragma GCC pop_options
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#endif /* __DISABLE_AVX512BW__ */
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#if !defined (__AVX512BW__) || !defined (__EVEX512__)
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#pragma GCC push_options
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#pragma GCC target("avx512bw,evex512")
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#define __DISABLE_AVX512BW_512__
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#endif /* __AVX512BW_512__ */
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/* Internal data types for implementing the intrinsics. */
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typedef short __v32hi __attribute__ ((__vector_size__ (64)));
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typedef short __v32hi_u __attribute__ ((__vector_size__ (64), \
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__may_alias__, __aligned__ (1)));
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typedef char __v64qi __attribute__ ((__vector_size__ (64)));
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typedef char __v64qi_u __attribute__ ((__vector_size__ (64), \
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__may_alias__, __aligned__ (1)));
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extern __inline __m512i
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__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
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_mm512_mask_mov_epi16 (__m512i __W, __mmask32 __U, __m512i __A)
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@ -1590,61 +1590,61 @@ BDESC (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512, CODE_FOR_avx512f_round
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BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_kashiftqi, "__builtin_ia32_kshiftliqi", IX86_BUILTIN_KSHIFTLI8, UNKNOWN, (int) UQI_FTYPE_UQI_UQI_CONST)
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BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_kashifthi, "__builtin_ia32_kshiftlihi", IX86_BUILTIN_KSHIFTLI16, UNKNOWN, (int) UHI_FTYPE_UHI_UQI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kashiftsi, "__builtin_ia32_kshiftlisi", IX86_BUILTIN_KSHIFTLI32, UNKNOWN, (int) USI_FTYPE_USI_UQI)
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BDESC (OPTION_MASK_ISA_AVX512BW, OPTION_MASK_ISA2_EVEX512, CODE_FOR_kashiftdi, "__builtin_ia32_kshiftlidi", IX86_BUILTIN_KSHIFTLI64, UNKNOWN, (int) UDI_FTYPE_UDI_UQI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kashiftdi, "__builtin_ia32_kshiftlidi", IX86_BUILTIN_KSHIFTLI64, UNKNOWN, (int) UDI_FTYPE_UDI_UQI)
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BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_klshiftrtqi, "__builtin_ia32_kshiftriqi", IX86_BUILTIN_KSHIFTRI8, UNKNOWN, (int) UQI_FTYPE_UQI_UQI_CONST)
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BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_klshiftrthi, "__builtin_ia32_kshiftrihi", IX86_BUILTIN_KSHIFTRI16, UNKNOWN, (int) UHI_FTYPE_UHI_UQI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_klshiftrtsi, "__builtin_ia32_kshiftrisi", IX86_BUILTIN_KSHIFTRI32, UNKNOWN, (int) USI_FTYPE_USI_UQI)
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BDESC (OPTION_MASK_ISA_AVX512BW, OPTION_MASK_ISA2_EVEX512, CODE_FOR_klshiftrtdi, "__builtin_ia32_kshiftridi", IX86_BUILTIN_KSHIFTRI64, UNKNOWN, (int) UDI_FTYPE_UDI_UQI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_klshiftrtdi, "__builtin_ia32_kshiftridi", IX86_BUILTIN_KSHIFTRI64, UNKNOWN, (int) UDI_FTYPE_UDI_UQI)
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BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_kandqi, "__builtin_ia32_kandqi", IX86_BUILTIN_KAND8, UNKNOWN, (int) UQI_FTYPE_UQI_UQI)
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BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_kandhi, "__builtin_ia32_kandhi", IX86_BUILTIN_KAND16, UNKNOWN, (int) UHI_FTYPE_UHI_UHI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kandsi, "__builtin_ia32_kandsi", IX86_BUILTIN_KAND32, UNKNOWN, (int) USI_FTYPE_USI_USI)
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BDESC (OPTION_MASK_ISA_AVX512BW, OPTION_MASK_ISA2_EVEX512, CODE_FOR_kanddi, "__builtin_ia32_kanddi", IX86_BUILTIN_KAND64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kanddi, "__builtin_ia32_kanddi", IX86_BUILTIN_KAND64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_kandnqi, "__builtin_ia32_kandnqi", IX86_BUILTIN_KANDN8, UNKNOWN, (int) UQI_FTYPE_UQI_UQI)
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BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_kandnhi, "__builtin_ia32_kandnhi", IX86_BUILTIN_KANDN16, UNKNOWN, (int) UHI_FTYPE_UHI_UHI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kandnsi, "__builtin_ia32_kandnsi", IX86_BUILTIN_KANDN32, UNKNOWN, (int) USI_FTYPE_USI_USI)
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BDESC (OPTION_MASK_ISA_AVX512BW, OPTION_MASK_ISA2_EVEX512, CODE_FOR_kandndi, "__builtin_ia32_kandndi", IX86_BUILTIN_KANDN64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kandndi, "__builtin_ia32_kandndi", IX86_BUILTIN_KANDN64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_knotqi, "__builtin_ia32_knotqi", IX86_BUILTIN_KNOT8, UNKNOWN, (int) UQI_FTYPE_UQI)
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BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_knothi, "__builtin_ia32_knothi", IX86_BUILTIN_KNOT16, UNKNOWN, (int) UHI_FTYPE_UHI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_knotsi, "__builtin_ia32_knotsi", IX86_BUILTIN_KNOT32, UNKNOWN, (int) USI_FTYPE_USI)
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BDESC (OPTION_MASK_ISA_AVX512BW, OPTION_MASK_ISA2_EVEX512, CODE_FOR_knotdi, "__builtin_ia32_knotdi", IX86_BUILTIN_KNOT64, UNKNOWN, (int) UDI_FTYPE_UDI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_knotdi, "__builtin_ia32_knotdi", IX86_BUILTIN_KNOT64, UNKNOWN, (int) UDI_FTYPE_UDI)
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BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_kiorqi, "__builtin_ia32_korqi", IX86_BUILTIN_KOR8, UNKNOWN, (int) UQI_FTYPE_UQI_UQI)
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BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_kiorhi, "__builtin_ia32_korhi", IX86_BUILTIN_KOR16, UNKNOWN, (int) UHI_FTYPE_UHI_UHI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kiorsi, "__builtin_ia32_korsi", IX86_BUILTIN_KOR32, UNKNOWN, (int) USI_FTYPE_USI_USI)
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BDESC (OPTION_MASK_ISA_AVX512BW, OPTION_MASK_ISA2_EVEX512, CODE_FOR_kiordi, "__builtin_ia32_kordi", IX86_BUILTIN_KOR64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kiordi, "__builtin_ia32_kordi", IX86_BUILTIN_KOR64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_ktestqi, "__builtin_ia32_ktestcqi", IX86_BUILTIN_KTESTC8, UNKNOWN, (int) UQI_FTYPE_UQI_UQI)
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BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_ktestqi, "__builtin_ia32_ktestzqi", IX86_BUILTIN_KTESTZ8, UNKNOWN, (int) UQI_FTYPE_UQI_UQI)
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BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_ktesthi, "__builtin_ia32_ktestchi", IX86_BUILTIN_KTESTC16, UNKNOWN, (int) UHI_FTYPE_UHI_UHI)
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BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_ktesthi, "__builtin_ia32_ktestzhi", IX86_BUILTIN_KTESTZ16, UNKNOWN, (int) UHI_FTYPE_UHI_UHI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_ktestsi, "__builtin_ia32_ktestcsi", IX86_BUILTIN_KTESTC32, UNKNOWN, (int) USI_FTYPE_USI_USI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_ktestsi, "__builtin_ia32_ktestzsi", IX86_BUILTIN_KTESTZ32, UNKNOWN, (int) USI_FTYPE_USI_USI)
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BDESC (OPTION_MASK_ISA_AVX512BW, OPTION_MASK_ISA2_EVEX512, CODE_FOR_ktestdi, "__builtin_ia32_ktestcdi", IX86_BUILTIN_KTESTC64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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BDESC (OPTION_MASK_ISA_AVX512BW, OPTION_MASK_ISA2_EVEX512, CODE_FOR_ktestdi, "__builtin_ia32_ktestzdi", IX86_BUILTIN_KTESTZ64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_ktestdi, "__builtin_ia32_ktestcdi", IX86_BUILTIN_KTESTC64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_ktestdi, "__builtin_ia32_ktestzdi", IX86_BUILTIN_KTESTZ64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_kortestqi, "__builtin_ia32_kortestcqi", IX86_BUILTIN_KORTESTC8, UNKNOWN, (int) UQI_FTYPE_UQI_UQI)
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BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_kortestqi, "__builtin_ia32_kortestzqi", IX86_BUILTIN_KORTESTZ8, UNKNOWN, (int) UQI_FTYPE_UQI_UQI)
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BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_kortesthi, "__builtin_ia32_kortestchi", IX86_BUILTIN_KORTESTC16, UNKNOWN, (int) UHI_FTYPE_UHI_UHI)
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BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_kortesthi, "__builtin_ia32_kortestzhi", IX86_BUILTIN_KORTESTZ16, UNKNOWN, (int) UHI_FTYPE_UHI_UHI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kortestsi, "__builtin_ia32_kortestcsi", IX86_BUILTIN_KORTESTC32, UNKNOWN, (int) USI_FTYPE_USI_USI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kortestsi, "__builtin_ia32_kortestzsi", IX86_BUILTIN_KORTESTZ32, UNKNOWN, (int) USI_FTYPE_USI_USI)
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BDESC (OPTION_MASK_ISA_AVX512BW, OPTION_MASK_ISA2_EVEX512, CODE_FOR_kortestdi, "__builtin_ia32_kortestcdi", IX86_BUILTIN_KORTESTC64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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BDESC (OPTION_MASK_ISA_AVX512BW, OPTION_MASK_ISA2_EVEX512, CODE_FOR_kortestdi, "__builtin_ia32_kortestzdi", IX86_BUILTIN_KORTESTZ64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kortestdi, "__builtin_ia32_kortestcdi", IX86_BUILTIN_KORTESTC64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kortestdi, "__builtin_ia32_kortestzdi", IX86_BUILTIN_KORTESTZ64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_kunpckhi, "__builtin_ia32_kunpckhi", IX86_BUILTIN_KUNPCKBW, UNKNOWN, (int) UHI_FTYPE_UHI_UHI)
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BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_kxnorqi, "__builtin_ia32_kxnorqi", IX86_BUILTIN_KXNOR8, UNKNOWN, (int) UQI_FTYPE_UQI_UQI)
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BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_kxnorhi, "__builtin_ia32_kxnorhi", IX86_BUILTIN_KXNOR16, UNKNOWN, (int) UHI_FTYPE_UHI_UHI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kxnorsi, "__builtin_ia32_kxnorsi", IX86_BUILTIN_KXNOR32, UNKNOWN, (int) USI_FTYPE_USI_USI)
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BDESC (OPTION_MASK_ISA_AVX512BW, OPTION_MASK_ISA2_EVEX512, CODE_FOR_kxnordi, "__builtin_ia32_kxnordi", IX86_BUILTIN_KXNOR64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kxnordi, "__builtin_ia32_kxnordi", IX86_BUILTIN_KXNOR64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_kxorqi, "__builtin_ia32_kxorqi", IX86_BUILTIN_KXOR8, UNKNOWN, (int) UQI_FTYPE_UQI_UQI)
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BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_kxorhi, "__builtin_ia32_kxorhi", IX86_BUILTIN_KXOR16, UNKNOWN, (int) UHI_FTYPE_UHI_UHI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kxorsi, "__builtin_ia32_kxorsi", IX86_BUILTIN_KXOR32, UNKNOWN, (int) USI_FTYPE_USI_USI)
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BDESC (OPTION_MASK_ISA_AVX512BW, OPTION_MASK_ISA2_EVEX512, CODE_FOR_kxordi, "__builtin_ia32_kxordi", IX86_BUILTIN_KXOR64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kxordi, "__builtin_ia32_kxordi", IX86_BUILTIN_KXOR64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_kmovb, "__builtin_ia32_kmovb", IX86_BUILTIN_KMOV8, UNKNOWN, (int) UQI_FTYPE_UQI)
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BDESC (OPTION_MASK_ISA_AVX512F, 0, CODE_FOR_kmovw, "__builtin_ia32_kmovw", IX86_BUILTIN_KMOV16, UNKNOWN, (int) UHI_FTYPE_UHI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kmovd, "__builtin_ia32_kmovd", IX86_BUILTIN_KMOV32, UNKNOWN, (int) USI_FTYPE_USI)
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BDESC (OPTION_MASK_ISA_AVX512BW, OPTION_MASK_ISA2_EVEX512, CODE_FOR_kmovq, "__builtin_ia32_kmovq", IX86_BUILTIN_KMOV64, UNKNOWN, (int) UDI_FTYPE_UDI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kmovq, "__builtin_ia32_kmovq", IX86_BUILTIN_KMOV64, UNKNOWN, (int) UDI_FTYPE_UDI)
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BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_kaddqi, "__builtin_ia32_kaddqi", IX86_BUILTIN_KADD8, UNKNOWN, (int) UQI_FTYPE_UQI_UQI)
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BDESC (OPTION_MASK_ISA_AVX512DQ, 0, CODE_FOR_kaddhi, "__builtin_ia32_kaddhi", IX86_BUILTIN_KADD16, UNKNOWN, (int) UHI_FTYPE_UHI_UHI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kaddsi, "__builtin_ia32_kaddsi", IX86_BUILTIN_KADD32, UNKNOWN, (int) USI_FTYPE_USI_USI)
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BDESC (OPTION_MASK_ISA_AVX512BW, OPTION_MASK_ISA2_EVEX512, CODE_FOR_kadddi, "__builtin_ia32_kadddi", IX86_BUILTIN_KADD64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_kadddi, "__builtin_ia32_kadddi", IX86_BUILTIN_KADD64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
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/* SHA */
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BDESC (OPTION_MASK_ISA_SSE2, 0, CODE_FOR_sha1msg1, 0, IX86_BUILTIN_SHA1MSG1, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI)
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@ -20820,8 +20820,7 @@ ix86_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
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return MASK_PAIR_REGNO_P(regno);
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return ((TARGET_AVX512F && VALID_MASK_REG_MODE (mode))
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|| (TARGET_AVX512BW && mode == SImode)
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|| (TARGET_AVX512BW && TARGET_EVEX512 && mode == DImode));
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|| (TARGET_AVX512BW && VALID_MASK_AVX512BW_MODE (mode)));
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}
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if (GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
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@ -1497,8 +1497,7 @@
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(define_mode_iterator SWI1248_AVX512BWDQ_64
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[(QI "TARGET_AVX512DQ") HI
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(SI "TARGET_AVX512BW")
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(DI "TARGET_AVX512BW && TARGET_EVEX512 && TARGET_64BIT")])
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(SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW && TARGET_64BIT")])
|
||||
|
||||
(define_insn "*cmp<mode>_ccz_1"
|
||||
[(set (reg FLAGS_REG)
|
||||
|
|
@ -4616,7 +4615,7 @@
|
|||
(eq_attr "alternative" "12")
|
||||
(const_string "x64_avx512bw")
|
||||
(eq_attr "alternative" "13")
|
||||
(const_string "avx512bw_512")
|
||||
(const_string "avx512bw")
|
||||
]
|
||||
(const_string "*")))
|
||||
(set (attr "mmx_isa")
|
||||
|
|
@ -4693,7 +4692,7 @@
|
|||
"split_double_mode (DImode, &operands[0], 1, &operands[3], &operands[4]);")
|
||||
|
||||
(define_mode_attr kmov_isa
|
||||
[(QI "avx512dq") (HI "avx512f") (SI "avx512bw") (DI "avx512bw_512")])
|
||||
[(QI "avx512dq") (HI "avx512f") (SI "avx512bw") (DI "avx512bw")])
|
||||
|
||||
(define_insn "zero_extend<mode>di2"
|
||||
[(set (match_operand:DI 0 "register_operand" "=r,*r,*k")
|
||||
|
|
@ -11778,7 +11777,7 @@
|
|||
and{q}\t{%2, %1, %0|%0, %1, %2}
|
||||
#
|
||||
#"
|
||||
[(set_attr "isa" "x64,apx_ndd,x64,x64,apx_ndd,apx_ndd,x64,avx512bw_512")
|
||||
[(set_attr "isa" "x64,apx_ndd,x64,x64,apx_ndd,apx_ndd,x64,avx512bw")
|
||||
(set_attr "type" "alu,alu,alu,alu,alu,alu,imovx,msklog")
|
||||
(set_attr "length_immediate" "*,*,*,*,*,*,0,*")
|
||||
(set (attr "prefix_rex")
|
||||
|
|
@ -12531,13 +12530,12 @@
|
|||
(not:SWI48 (match_operand:SWI48 1 "register_operand" "r,r,k"))
|
||||
(match_operand:SWI48 2 "nonimmediate_operand" "r,m,k")))
|
||||
(clobber (reg:CC FLAGS_REG))]
|
||||
"TARGET_BMI
|
||||
|| (TARGET_AVX512BW && (<MODE>mode == SImode || TARGET_EVEX512))"
|
||||
"TARGET_BMI || TARGET_AVX512BW"
|
||||
"@
|
||||
andn\t{%2, %1, %0|%0, %1, %2}
|
||||
andn\t{%2, %1, %0|%0, %1, %2}
|
||||
#"
|
||||
[(set_attr "isa" "bmi,bmi,<kmov_isa>")
|
||||
[(set_attr "isa" "bmi,bmi,avx512bw")
|
||||
(set_attr "type" "bitmanip,bitmanip,msklog")
|
||||
(set_attr "btver2_decode" "direct, double,*")
|
||||
(set_attr "mode" "<MODE>")])
|
||||
|
|
@ -14144,7 +14142,7 @@
|
|||
not{l}\t%k0
|
||||
not{l}\t{%1, %k0|%k0, %1}
|
||||
#"
|
||||
[(set_attr "isa" "x64,apx_ndd,avx512bw_512")
|
||||
[(set_attr "isa" "x64,apx_ndd,avx512bw")
|
||||
(set_attr "type" "negnot,negnot,msklog")
|
||||
(set_attr "mode" "SI,SI,SI")])
|
||||
|
||||
|
|
@ -15001,7 +14999,7 @@
|
|||
: "sal{<imodesuffix>}\t{%2, %0|%0, %2}";
|
||||
}
|
||||
}
|
||||
[(set_attr "isa" "*,*,bmi2,<kmov_isa>,apx_ndd")
|
||||
[(set_attr "isa" "*,*,bmi2,avx512bw,apx_ndd")
|
||||
(set (attr "type")
|
||||
(cond [(eq_attr "alternative" "1")
|
||||
(const_string "lea")
|
||||
|
|
@ -16328,7 +16326,7 @@
|
|||
: "shr{<imodesuffix>}\t{%2, %0|%0, %2}";
|
||||
}
|
||||
}
|
||||
[(set_attr "isa" "*,bmi2,<kmov_isa>,apx_ndd")
|
||||
[(set_attr "isa" "*,bmi2,avx512bw,apx_ndd")
|
||||
(set_attr "type" "ishift,ishiftx,msklog,ishift")
|
||||
(set (attr "length_immediate")
|
||||
(if_then_else
|
||||
|
|
|
|||
|
|
@ -1965,19 +1965,17 @@
|
|||
|
||||
;; All integer modes with AVX512BW/DQ.
|
||||
(define_mode_iterator SWI1248_AVX512BWDQ
|
||||
[(QI "TARGET_AVX512DQ") HI (SI "TARGET_AVX512BW")
|
||||
(DI "TARGET_AVX512BW && TARGET_EVEX512")])
|
||||
[(QI "TARGET_AVX512DQ") HI (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")])
|
||||
|
||||
;; All integer modes with AVX512BW, where HImode operation
|
||||
;; can be used instead of QImode.
|
||||
(define_mode_iterator SWI1248_AVX512BW
|
||||
[QI HI (SI "TARGET_AVX512BW")
|
||||
(DI "TARGET_AVX512BW && TARGET_EVEX512")])
|
||||
[QI HI (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")])
|
||||
|
||||
;; All integer modes with AVX512BW/DQ, even HImode requires DQ.
|
||||
(define_mode_iterator SWI1248_AVX512BWDQ2
|
||||
[(QI "TARGET_AVX512DQ") (HI "TARGET_AVX512DQ")
|
||||
(SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW && TARGET_EVEX512")])
|
||||
(SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")])
|
||||
|
||||
(define_expand "kmov<mskmodesuffix>"
|
||||
[(set (match_operand:SWI1248_AVX512BWDQ 0 "nonimmediate_operand")
|
||||
|
|
@ -2116,7 +2114,7 @@
|
|||
(zero_extend:DI
|
||||
(not:SI (match_operand:SI 1 "register_operand" "k"))))
|
||||
(unspec [(const_int 0)] UNSPEC_MASKOP)]
|
||||
"TARGET_AVX512BW && TARGET_EVEX512"
|
||||
"TARGET_AVX512BW"
|
||||
"knotd\t{%1, %0|%0, %1}";
|
||||
[(set_attr "type" "msklog")
|
||||
(set_attr "prefix" "vex")
|
||||
|
|
@ -2126,7 +2124,7 @@
|
|||
[(set (match_operand:DI 0 "mask_reg_operand")
|
||||
(zero_extend:DI
|
||||
(not:SI (match_operand:SI 1 "mask_reg_operand"))))]
|
||||
"TARGET_AVX512BW && TARGET_EVEX512 && reload_completed"
|
||||
"TARGET_AVX512BW && reload_completed"
|
||||
[(parallel
|
||||
[(set (match_dup 0)
|
||||
(zero_extend:DI
|
||||
|
|
@ -2256,7 +2254,7 @@
|
|||
(const_int 32))
|
||||
(zero_extend:DI (match_operand:SI 2 "register_operand" "k"))))
|
||||
(unspec [(const_int 0)] UNSPEC_MASKOP)]
|
||||
"TARGET_AVX512BW && TARGET_EVEX512"
|
||||
"TARGET_AVX512BW"
|
||||
"kunpckdq\t{%2, %1, %0|%0, %1, %2}"
|
||||
[(set_attr "mode" "DI")])
|
||||
|
||||
|
|
@ -18296,18 +18294,16 @@
|
|||
(unspec [(const_int 0)] UNSPEC_MASKOP)])]
|
||||
"TARGET_AVX512F")
|
||||
|
||||
(define_mode_iterator SWI24_MASK [HI (SI "TARGET_EVEX512")])
|
||||
|
||||
(define_expand "vec_pack_trunc_<mode>"
|
||||
[(parallel
|
||||
[(set (match_operand:<DOUBLEMASKMODE> 0 "register_operand")
|
||||
(ior:<DOUBLEMASKMODE>
|
||||
(ashift:<DOUBLEMASKMODE>
|
||||
(zero_extend:<DOUBLEMASKMODE>
|
||||
(match_operand:SWI24_MASK 2 "register_operand"))
|
||||
(match_operand:SWI24 2 "register_operand"))
|
||||
(match_dup 3))
|
||||
(zero_extend:<DOUBLEMASKMODE>
|
||||
(match_operand:SWI24_MASK 1 "register_operand"))))
|
||||
(match_operand:SWI24 1 "register_operand"))))
|
||||
(unspec [(const_int 0)] UNSPEC_MASKOP)])]
|
||||
"TARGET_AVX512BW"
|
||||
{
|
||||
|
|
@ -20944,7 +20940,7 @@
|
|||
(define_expand "vec_unpacks_lo_di"
|
||||
[(set (match_operand:SI 0 "register_operand")
|
||||
(subreg:SI (match_operand:DI 1 "register_operand") 0))]
|
||||
"TARGET_AVX512BW && TARGET_EVEX512")
|
||||
"TARGET_AVX512BW")
|
||||
|
||||
(define_expand "vec_unpacku_hi_<mode>"
|
||||
[(match_operand:<sseunpackmode> 0 "register_operand")
|
||||
|
|
@ -20983,14 +20979,12 @@
|
|||
(unspec [(const_int 0)] UNSPEC_MASKOP)])]
|
||||
"TARGET_AVX512F")
|
||||
|
||||
(define_mode_iterator SWI48x_MASK [SI (DI "TARGET_EVEX512")])
|
||||
|
||||
(define_expand "vec_unpacks_hi_<mode>"
|
||||
[(parallel
|
||||
[(set (subreg:SWI48x_MASK
|
||||
[(set (subreg:SWI48x
|
||||
(match_operand:<HALFMASKMODE> 0 "register_operand") 0)
|
||||
(lshiftrt:SWI48x_MASK
|
||||
(match_operand:SWI48x_MASK 1 "register_operand")
|
||||
(lshiftrt:SWI48x
|
||||
(match_operand:SWI48x 1 "register_operand")
|
||||
(match_dup 2)))
|
||||
(unspec [(const_int 0)] UNSPEC_MASKOP)])]
|
||||
"TARGET_AVX512BW"
|
||||
|
|
|
|||
|
|
@ -8,6 +8,6 @@ foo (long long c)
|
|||
{
|
||||
register long long a __asm ("k7") = c;
|
||||
long long b = foo (a);
|
||||
asm volatile ("" : "+k" (b)); /* { dg-error "inconsistent operand constraints in an 'asm'" } */
|
||||
asm volatile ("" : "+k" (b));
|
||||
return b;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -8,6 +8,6 @@ foo (long long c)
|
|||
{
|
||||
register long long a __asm ("k7") = c;
|
||||
long long b = foo (a);
|
||||
asm volatile ("" : "+k" (b)); /* { dg-error "inconsistent operand constraints in an 'asm'" } */
|
||||
asm volatile ("" : "+k" (b));
|
||||
return b;
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue