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re PR middle-end/37908 (atomic NAND op generate wrong code; __sync_nand_and_fetch, __sync_fetch_and_nand)

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PR middle-end/37908
	* config/alpha/alpha.c (alpha_split_atomic_op): Properly handle NAND
	case by calculating ~(new_reg & val) instead of (~new_reg & val).
	* config/alpha/sync.md (sync_nand<mode>): Change insn RTX
	to (not:I48MODE (and:I48MODE (...))).
	(sync_old_nand<mode>): Ditto.
	(sync_new_nand<mode>): Ditto.

From-SVN: r142313
This commit is contained in:
Uros Bizjak 2008-12-01 14:48:52 +01:00 • committed by Uros Bizjak
parent d40ba0b60d
commit d04dceb5ff
3 changed files with 27 additions and 10 deletions
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12
gcc/ChangeLog
View file

@ -1,3 +1,13 @@
2008-12-01 Uros Bizjak <ubizjak@gmail.com>
PR middle-end/37908
* config/alpha/alpha.c (alpha_split_atomic_op): Properly handle NAND
case by calculating ~(new_reg & val) instead of (~new_reg & val).
* config/alpha/sync.md (sync_nand<mode>): Change insn RTX
to (not:I48MODE (and:I48MODE (...))).
(sync_old_nand<mode>): Ditto.
(sync_new_nand<mode>): Ditto.
2008-12-01 Nick Clifton <nickc@redhat.com>
* config/stormy16/stormy16.md (CARRY_REG): New constant.
@ -365,7 +375,7 @@
2008-11-21 Uros Bizjak <ubizjak@gmail.com>
PR middle-end/37908
* config/ia64/ia64.c (ia64_expand_atomic_ope): Properly handle NAND
* config/ia64/ia64.c (ia64_expand_atomic_op): Properly handle NAND
case by calculating ~(new_reg & val) instead of (~new_reg & val).
* config/ia64/sync.md (sync_nand<mode>): Change insn RTX
to (not:IMODE (and:IMODE (...))).

7
gcc/config/alpha/alpha.c
View file

@ -4466,7 +4466,12 @@ alpha_split_atomic_op (enum rtx_code code, rtx mem, rtx val,
emit_load_locked (mode, before, mem);
if (code == NOT)
x = gen_rtx_AND (mode, gen_rtx_NOT (mode, before), val);
{
x = gen_rtx_AND (mode, before, val);
emit_insn (gen_rtx_SET (VOIDmode, val, x));
x = gen_rtx_NOT (mode, val);
}
else
x = gen_rtx_fmt_ee (code, mode, before, val);
if (after)

18
gcc/config/alpha/sync.md
View file

@ -89,8 +89,9 @@
(define_insn_and_split "sync_nand<mode>"
[(set (match_operand:I48MODE 0 "memory_operand" "+m")
(unspec:I48MODE
[(and:I48MODE (not:I48MODE (match_dup 0))
(match_operand:I48MODE 1 "register_operand" "r"))]
[(not:I48MODE
(and:I48MODE (match_dup 0)
(match_operand:I48MODE 1 "register_operand" "r")))]
UNSPEC_ATOMIC))
(clobber (match_scratch:I48MODE 2 "=&r"))]
""
@ -129,8 +130,9 @@
(match_operand:I48MODE 1 "memory_operand" "+m"))
(set (match_dup 1)
(unspec:I48MODE
[(and:I48MODE (not:I48MODE (match_dup 1))
(match_operand:I48MODE 2 "register_operand" "r"))]
[(not:I48MODE
(and:I48MODE (match_dup 1)
(match_operand:I48MODE 2 "register_operand" "r")))]
UNSPEC_ATOMIC))
(clobber (match_scratch:I48MODE 3 "=&r"))]
""
@ -167,12 +169,12 @@
(define_insn_and_split "sync_new_nand<mode>"
[(set (match_operand:I48MODE 0 "register_operand" "=&r")
(and:I48MODE
(not:I48MODE (match_operand:I48MODE 1 "memory_operand" "+m"))
(match_operand:I48MODE 2 "register_operand" "r")))
(not:I48MODE
(and:I48MODE (match_operand:I48MODE 1 "memory_operand" "+m")
(match_operand:I48MODE 2 "register_operand" "r"))))
(set (match_dup 1)
(unspec:I48MODE
[(and:I48MODE (not:I48MODE (match_dup 1)) (match_dup 2))]
[(not:I48MODE (and:I48MODE (match_dup 1) (match_dup 2)))]
UNSPEC_ATOMIC))
(clobber (match_scratch:I48MODE 3 "=&r"))]
""