[ARM] testsuite: force hardfp in addr-modes-float.c
gcc/testsuite/ChangeLog:
<date> Charles Baylis <charles.baylis@linaro.org>
* gcc.target/arm/addr-modes-float.c: Place dg-add-options after
dg-require-effective-target.
(ATTR): New define.
(POST_STORE): Pass ATTR as 2nd argument.
(POST_LOAD): Likewise.
(POST_STORE_VEC): Likewise.
* gcc.target/arm/addr-modes-int.c (ATTR): New define.
(PRE_STORE): Pass ATTR as 2nd argument.
(POST_STORE): Likewise.
(PRE_LOAD): Likewise.
(POST_LOAD): Likewise.
* gcc.target/arm/addr-modes.h: (PRE_STORE): New parameter.
(POST_STORE): Likewise.
(POST_STORE_VEC): Likewise.
(PRE_LOAD): Likewise.
(POST_LOAD): Likewise.
(POST_LOAD_VEC): Likewise.
From-SVN: r255443
This commit is contained in:
Charles Baylis
Charles Baylis
parent
4c6f5562dc
commit
cff4e4140f
4 changed files with 69 additions and 44 deletions
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@ -1,3 +1,23 @@
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2017-12-06 Charles Baylis <charles.baylis@linaro.org>
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* gcc.target/arm/addr-modes-float.c: Place dg-add-options after
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dg-require-effective-target.
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(ATTR): New define.
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(POST_STORE): Pass ATTR as 2nd argument.
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(POST_LOAD): Likewise.
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(POST_STORE_VEC): Likewise.
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* gcc.target/arm/addr-modes-int.c (ATTR): New define.
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(PRE_STORE): Pass ATTR as 2nd argument.
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(POST_STORE): Likewise.
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(PRE_LOAD): Likewise.
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(POST_LOAD): Likewise.
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* gcc.target/arm/addr-modes.h: (PRE_STORE): New parameter.
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(POST_STORE): Likewise.
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(POST_STORE_VEC): Likewise.
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(PRE_LOAD): Likewise.
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(POST_LOAD): Likewise.
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(POST_LOAD_VEC): Likewise.
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2017-12-06 Jakub Jelinek <jakub@redhat.com>
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PR tree-optimization/81945
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@ -1,41 +1,43 @@
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/* { dg-options "-O2" } */
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/* { dg-add-options arm_neon } */
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/* { dg-require-effective-target arm_neon_ok } */
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/* { dg-add-options arm_neon } */
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/* { dg-do compile } */
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#include <arm_neon.h>
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#include "addr-modes.h"
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POST_STORE(float)
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#define ATTR __attribute__((__pcs__("aapcs-vfp")))
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POST_STORE(float, ATTR)
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/* { dg-final { scan-assembler "vstmia.32" } } */
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POST_STORE(double)
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POST_STORE(double, ATTR)
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/* { dg-final { scan-assembler "vstmia.64" } } */
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POST_LOAD(float)
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POST_LOAD(float, ATTR)
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/* { dg-final { scan-assembler "vldmia.32" } } */
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POST_LOAD(double)
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POST_LOAD(double, ATTR)
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/* { dg-final { scan-assembler "vldmia.64" } } */
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POST_STORE_VEC (int8_t, int8x8_t, vst1_s8)
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POST_STORE_VEC (int8_t, int8x8_t, vst1_s8, ATTR)
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/* { dg-final { scan-assembler "vst1.8\t\{.*\}, \\\[r\[0-9\]+\\\]!" } } */
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POST_STORE_VEC (int8_t, int8x16_t, vst1q_s8)
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POST_STORE_VEC (int8_t, int8x16_t, vst1q_s8, ATTR)
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/* { dg-final { scan-assembler "vst1.8\t\{.*\[-,\]d.*\}, \\\[r\[0-9\]+\\\]!" } } */
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POST_STORE_VEC (int8_t, int8x8x2_t, vst2_s8)
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POST_STORE_VEC (int8_t, int8x8x2_t, vst2_s8, ATTR)
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/* { dg-final { scan-assembler "vst2.8\t\{.*\}, \\\[r\[0-9\]+\\\]!" } } */
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POST_STORE_VEC (int8_t, int8x16x2_t, vst2q_s8)
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POST_STORE_VEC (int8_t, int8x16x2_t, vst2q_s8, ATTR)
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/* { dg-final { scan-assembler "vst2.8\t\{.*-d.*\}, \\\[r\[0-9\]+\\\]!" } } */
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POST_STORE_VEC (int8_t, int8x8x3_t, vst3_s8)
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POST_STORE_VEC (int8_t, int8x8x3_t, vst3_s8, ATTR)
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/* { dg-final { scan-assembler "vst3.8\t\{.*\}, \\\[r\[0-9\]+\\\]!" } } */
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POST_STORE_VEC (int8_t, int8x16x3_t, vst3q_s8)
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POST_STORE_VEC (int8_t, int8x16x3_t, vst3q_s8, ATTR)
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/* { dg-final { scan-assembler "vst3.8\t\{d\[02468\], d\[02468\], d\[02468\]\}, \\\[r\[0-9\]+\\\]!" } } */
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/* { dg-final { scan-assembler "vst3.8\t\{d\[13579\], d\[13579\], d\[13579\]\}, \\\[r\[0-9\]+\\\]!" { xfail *-*-* } } } */
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POST_STORE_VEC (int8_t, int8x8x4_t, vst4_s8)
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POST_STORE_VEC (int8_t, int8x8x4_t, vst4_s8, ATTR)
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/* { dg-final { scan-assembler "vst4.8\t\{.*\}, \\\[r\[0-9\]+\\\]!" } } */
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POST_STORE_VEC (int8_t, int8x16x4_t, vst4q_s8)
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POST_STORE_VEC (int8_t, int8x16x4_t, vst4q_s8, ATTR)
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/* { dg-final { scan-assembler "vst4.8\t\{d\[02468\], d\[02468\], d\[02468\], d\[02468\]\}, \\\[r\[0-9\]+\\\]!" } } */
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/* { dg-final { scan-assembler "vst4.8\t\{d\[13579\], d\[13579\], d\[13579\], d\[13579\]\}, \\\[r\[0-9\]+\\\]!" { xfail *-*-* } } } */
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@ -7,40 +7,43 @@
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typedef long long ll;
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PRE_STORE(char)
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/* no special function attribute required */
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#define ATTR /* */
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PRE_STORE(char, ATTR)
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/* { dg-final { scan-assembler "strb.*#1]!" } } */
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PRE_STORE(short)
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PRE_STORE(short, ATTR)
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/* { dg-final { scan-assembler "strh.*#2]!" } } */
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PRE_STORE(int)
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PRE_STORE(int, ATTR)
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/* { dg-final { scan-assembler "str.*#4]!" } } */
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PRE_STORE(ll)
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PRE_STORE(ll, ATTR)
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/* { dg-final { scan-assembler "strd.*#8]!" } } */
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POST_STORE(char)
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POST_STORE(char, ATTR)
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/* { dg-final { scan-assembler "strb.*], #1" } } */
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POST_STORE(short)
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POST_STORE(short, ATTR)
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/* { dg-final { scan-assembler "strh.*], #2" } } */
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POST_STORE(int)
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POST_STORE(int, ATTR)
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/* { dg-final { scan-assembler "str.*], #4" } } */
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POST_STORE(ll)
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POST_STORE(ll, ATTR)
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/* { dg-final { scan-assembler "strd.*], #8" } } */
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PRE_LOAD(char)
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PRE_LOAD(char, ATTR)
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/* { dg-final { scan-assembler "ldrb.*#1]!" } } */
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PRE_LOAD(short)
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PRE_LOAD(short, ATTR)
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/* { dg-final { scan-assembler "ldrsh.*#2]!" } } */
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PRE_LOAD(int)
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PRE_LOAD(int, ATTR)
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/* { dg-final { scan-assembler "ldr.*#4]!" } } */
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PRE_LOAD(ll)
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PRE_LOAD(ll, ATTR)
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/* { dg-final { scan-assembler "ldrd.*#8]!" } } */
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POST_LOAD(char)
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POST_LOAD(char, ATTR)
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/* { dg-final { scan-assembler "ldrb.*], #1" } } */
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POST_LOAD(short)
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POST_LOAD(short, ATTR)
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/* { dg-final { scan-assembler "ldrsh.*], #2" } } */
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POST_LOAD(int)
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POST_LOAD(int, ATTR)
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/* { dg-final { scan-assembler "ldr.*], #4" } } */
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POST_LOAD(ll)
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POST_LOAD(ll, ATTR)
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/* { dg-final { scan-assembler "ldrd.*], #8" } } */
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/* { dg-final { scan-assembler-not "\tadd" } } */
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@ -1,22 +1,22 @@
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#define PRE_STORE(T) \
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T * \
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#define PRE_STORE(T, ATTR) \
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ATTR T * \
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T ## _pre_store (T *p, T v) \
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{ \
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*++p = v; \
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return p; \
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} \
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#define POST_STORE(T) \
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T * \
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#define POST_STORE(T, ATTR) \
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ATTR T * \
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T ## _post_store (T *p, T v) \
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{ \
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*p++ = v; \
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return p; \
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}
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#define POST_STORE_VEC(T, VT, OP) \
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T * \
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#define POST_STORE_VEC(T, VT, OP, ATTR) \
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ATTR T * \
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VT ## _post_store (T * p, VT v) \
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{ \
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OP (p, v); \
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@ -24,29 +24,29 @@
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return p; \
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}
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#define PRE_LOAD(T) \
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void \
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#define PRE_LOAD(T, ATTR) \
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ATTR void \
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T ## _pre_load (T *p) \
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{ \
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extern void f ## T (T*,T); \
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ATTR extern void f ## T (T*,T); \
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T x = *++p; \
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f ## T (p, x); \
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}
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#define POST_LOAD(T) \
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void \
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#define POST_LOAD(T, ATTR) \
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ATTR void \
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T ## _post_load (T *p) \
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{ \
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extern void f ## T (T*,T); \
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ATTR extern void f ## T (T*,T); \
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T x = *p++; \
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f ## T (p, x); \
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}
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#define POST_LOAD_VEC(T, VT, OP) \
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void \
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#define POST_LOAD_VEC(T, VT, OP, ATTR) \
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ATTR void \
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VT ## _post_load (T * p) \
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{ \
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extern void f ## T (T*,T); \
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ATTR extern void f ## T (T*,T); \
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VT x = OP (p, v); \
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p += sizeof (VT) / sizeof (T); \
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f ## T (p, x); \
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