diff --git a/gcc/ChangeLog b/gcc/ChangeLog index dac0d00e299..58c9a9193f5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,317 @@ +2023-04-19 Max Filippov + + * config/xtensa/xtensa-opts.h: New header. + * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as + xtensa_strict_align. + * config/xtensa/xtensa.cc (xtensa_option_override): When + -m[no-]strict-align is not specified in the command line set + xtensa_strict_align to 0 if the hardware supports both unaligned + loads and stores or to 1 otherwise. + * config/xtensa/xtensa.opt (mstrict-align): New option. + * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align. + +2023-04-19 Max Filippov + + * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New + function. + +2023-04-19 Andrew Pinski + + * config/i386/i386.md (*movsicc_noc_zext_1): New pattern. + +2023-04-19 Juzhe-Zhong + + * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support. + (VECTOR_BOOL_MODE): Ditto. + (ADJUST_NUNITS): Ditto. + (ADJUST_ALIGNMENT): Ditto. + (ADJUST_BYTESIZE): Ditto. + (ADJUST_PRECISION): Ditto. + (RVV_MODES): Ditto. + (VECTOR_MODE_WITH_PREFIX): Ditto. + * config/riscv/riscv-v.cc (ENTRY): Ditto. + (get_vlmul): Ditto. + (get_ratio): Ditto. + * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto. + * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto. + (vbool64_t): Ditto. + (vbool32_t): Ditto. + (vbool16_t): Ditto. + (vbool8_t): Ditto. + (vbool4_t): Ditto. + (vbool2_t): Ditto. + (vbool1_t): Ditto. + (vint8mf8_t): Ditto. + (vuint8mf8_t): Ditto. + (vint8mf4_t): Ditto. + (vuint8mf4_t): Ditto. + (vint8mf2_t): Ditto. + (vuint8mf2_t): Ditto. + (vint8m1_t): Ditto. + (vuint8m1_t): Ditto. + (vint8m2_t): Ditto. + (vuint8m2_t): Ditto. + (vint8m4_t): Ditto. + (vuint8m4_t): Ditto. + (vint8m8_t): Ditto. + (vuint8m8_t): Ditto. + (vint16mf4_t): Ditto. + (vuint16mf4_t): Ditto. + (vint16mf2_t): Ditto. + (vuint16mf2_t): Ditto. + (vint16m1_t): Ditto. + (vuint16m1_t): Ditto. + (vint16m2_t): Ditto. + (vuint16m2_t): Ditto. + (vint16m4_t): Ditto. + (vuint16m4_t): Ditto. + (vint16m8_t): Ditto. + (vuint16m8_t): Ditto. + (vint32mf2_t): Ditto. + (vuint32mf2_t): Ditto. + (vint32m1_t): Ditto. + (vuint32m1_t): Ditto. + (vint32m2_t): Ditto. + (vuint32m2_t): Ditto. + (vint32m4_t): Ditto. + (vuint32m4_t): Ditto. + (vint32m8_t): Ditto. + (vuint32m8_t): Ditto. + (vint64m1_t): Ditto. + (vuint64m1_t): Ditto. + (vint64m2_t): Ditto. + (vuint64m2_t): Ditto. + (vint64m4_t): Ditto. + (vuint64m4_t): Ditto. + (vint64m8_t): Ditto. + (vuint64m8_t): Ditto. + (vfloat32mf2_t): Ditto. + (vfloat32m1_t): Ditto. + (vfloat32m2_t): Ditto. + (vfloat32m4_t): Ditto. + (vfloat32m8_t): Ditto. + (vfloat64m1_t): Ditto. + (vfloat64m2_t): Ditto. + (vfloat64m4_t): Ditto. + (vfloat64m8_t): Ditto. + * config/riscv/riscv-vector-switch.def (ENTRY): Ditto. + * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto. + (riscv_convert_vector_bits): Ditto. + * config/riscv/riscv.md: + * config/riscv/vector-iterators.md: + * config/riscv/vector.md + (@pred_indexed_store): Ditto. + (@pred_indexed_store): Ditto. + (@pred_indexed_store): Ditto. + (@pred_indexed_store): Ditto. + (@pred_indexed_store): Ditto. + (@pred_reduc_): Ditto. + (@pred_widen_reduc_plus): Ditto. + (@pred_reduc_plus): Ditto. + (@pred_widen_reduc_plus): Ditto. + +2023-04-19 Pan Li + + * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): + Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND. + +2023-04-19 Uros Bizjak + + PR target/78904 + PR target/78952 + * config/i386/i386.md (*cmpqi_ext_1_mem_rex64): New insn pattern. + (*cmpqi_ext_1): Use nonimmediate_operand predicate + for operand 0. Use any_extract code iterator. + (*cmpqi_ext_1 peephole2): New peephole2 pattern. + (*cmpqi_ext_2): Use any_extract code iterator. + (*cmpqi_ext_3_mem_rex64): New insn pattern. + (*cmpqi_ext_1): Use general_operand predicate + for operand 1. Use any_extract code iterator. + (*cmpqi_ext_3 peephole2): New peephole2 pattern. + (*cmpqi_ext_4): Use any_extract code iterator. + +2023-04-19 Kyrylo Tkachov + + * config/aarch64/aarch64-simd.md (aarch64_saddw2): Delete. + (aarch64_uaddw2): Delete. + (aarch64_ssubw2): Delete. + (aarch64_usubw2): Delete. + (aarch64_w2): New define_expand. + +2023-04-19 Richard Biener + + * tree-ssa-structalias.cc (do_ds_constraint): Use + solve_add_graph_edge. + +2023-04-19 Richard Biener + + * tree-ssa-structalias.cc (solve_add_graph_edge): New function, + split out from ... + (do_sd_constraint): ... here. + +2023-04-19 Richard Biener + + * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition + rejecting the merge when A contains only a non-local label. + +2023-04-19 Uros Bizjak + + * rtl.h (VIRTUAL_REGISTER_P): New predicate. + (VIRTUAL_REGISTER_NUM_P): Ditto. + (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate. + * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate. + * function.cc (instantiate_decl_rtl): Ditto. + * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto. + (nonzero_address_p): Ditto. + (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate. + +2023-04-19 Aldy Hernandez + + * value-range.h (Value_Range::Value_Range): Avoid pointer sharing. + +2023-04-19 Richard Biener + + * system.h (auto_mpz::operator->()): New. + * realmpfr.h (auto_mpfr::operator->()): New. + * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr. + * real.cc (real_from_string): Likewise. + (dconst_e_ptr): Likewise. + (dconst_sqrt2_ptr): Likewise. + * tree-ssa-loop-niter.cc (refine_value_range_using_guard): + Use auto_mpz. + (bound_difference_of_offsetted_base): Likewise. + (number_of_iterations_ne): Likewise. + (number_of_iterations_lt_to_ne): Likewise. + * ubsan.cc: Include realmpfr.h. + (ubsan_instrument_float_cast): Use auto_mpfr. + +2023-04-19 Richard Biener + + * tree-ssa-structalias.cc (solve_graph): Remove self-copy + edges, remove edges from escaped after special-casing them. + +2023-04-19 Richard Biener + + * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape + special casing. + +2023-04-19 Richard Biener + + * tree-ssa-structalias.cc (do_sd_constraint): Do not write + to the LHS varinfo solution member. + +2023-04-19 Richard Biener + + * tree-ssa-structalias.cc (topo_visit): Look at the real + destination of edges. + +2023-04-19 Richard Biener + + PR tree-optimization/44794 + * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop): + If an epilogue loop is required set its iteration upper bound. + +2023-04-19 Xi Ruoyao + + PR target/109465 + * config/loongarch/loongarch-protos.h + (loongarch_expand_block_move): Add a parameter as alignment RTX. + * config/loongarch/loongarch.h: + (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove. + (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove. + (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define. + (LARCH_MAX_MOVE_OPS_STRAIGHT): Define. + (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of + LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER. + * config/loongarch/loongarch.cc (loongarch_expand_block_move): + Take the alignment from the parameter, but set it to + UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of + straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT + instead of LARCH_MAX_MOVE_BYTES_STRAIGHT. + (loongarch_block_move_straight): When there are left-over bytes, + half the mode size instead of falling back to byte mode at once. + (loongarch_block_move_loop): Limit the length of loop body with + LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of + LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER. + * config/loongarch/loongarch.md (cpymemsi): Pass the alignment + to loongarch_expand_block_move. + +2023-04-19 Xi Ruoyao + + * config/loongarch/loongarch.cc + (loongarch_setup_incoming_varargs): Don't save more GARs than + cfun->va_list_gpr_size / UNITS_PER_WORD. + +2023-04-19 Richard Biener + + * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix + no epilogue condition. + +2023-04-19 Richard Biener + + * gimple.h (gimple_assign_load): Outline... + * gimple.cc (gimple_assign_load): ... here. Avoid + get_base_address and instead just strip the outermost + handled component, treating a remaining handled component + as load. + +2023-04-19 Kyrylo Tkachov + + * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins + definition. + * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation. + +2023-04-19 Jakub Jelinek + + PR tree-optimization/109011 + * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ... + (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also + CLZ, CTZ and FFS. Remove vargs variable, use + gimple_build_call_internal rather than gimple_build_call_internal_vec. + (vect_vect_recog_func_ptrs): Adjust popcount entry. + +2023-04-19 Jakub Jelinek + + PR target/109040 + * dse.cc (replace_read): If read_reg is a SUBREG of a word mode + REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into + a new REG rather than the SUBREG. + +2023-04-19 Prathamesh Kulkarni + + * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero): + New pattern. + +2023-04-19 Kyrylo Tkachov + + PR target/108840 + * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and + ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1. + +2023-04-19 Richard Biener + + PR rtl-optimization/109237 + * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check + TREE_VISITED on INSN_VAR_LOCATION_DECL. + (delete_trivially_dead_insns): Maintain TREE_VISITED on + active debug bind INSN_VAR_LOCATION_DECL. + +2023-04-19 Richard Biener + + PR rtl-optimization/109237 + * cfgcleanup.cc (bb_is_just_return): Walk insns backwards. + +2023-04-19 Christophe Lyon + + * doc/install.texi (enable-decimal-float): Add AArch64. + +2023-04-19 liuhongt + + PR rtl-optimization/109351 + * ira.cc (setup_class_subset_and_memory_move_costs): Check + hard_regno_mode_ok before setting lowest memory move cost for + the mode with different reg classes. + 2023-04-18 Jason Merrill * doc/invoke.texi: Remove stray @gol. diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 59726e584d2..758629bff2e 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20230419 +20230420 diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index d6a5b88339a..ee08b14991d 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,36 @@ +2023-04-19 Patrick Palka + Jonathan Wakely + + PR c++/100157 + * cp-trait.def (TYPE_PACK_ELEMENT): Define. + * cp-tree.h (finish_trait_type): Add complain parameter. + * cxx-pretty-print.cc (pp_cxx_trait): Handle + CPTK_TYPE_PACK_ELEMENT. + * parser.cc (cp_parser_constant_expression): Document default + arguments. + (cp_parser_trait): Handle CPTK_TYPE_PACK_ELEMENT. Pass + tf_warning_or_error to finish_trait_type. + * pt.cc (tsubst) : Handle non-type first + argument. Pass complain to finish_trait_type. + * semantics.cc (finish_type_pack_element): Define. + (finish_trait_type): Add complain parameter. Handle + CPTK_TYPE_PACK_ELEMENT. + * tree.cc (strip_typedefs): Handle non-type first argument. + Pass tf_warning_or_error to finish_trait_type. + * typeck.cc (structural_comptypes) : Use + cp_tree_equal instead of same_type_p for the first argument. + +2023-04-19 Patrick Palka + + PR c++/109556 + * pt.cc (try_class_unification): Don't ggc_free the copy of + 'targs'. + +2023-04-19 Jason Merrill + + PR c++/108099 + * decl.cc (grokdeclarator): Keep typedef_decl for __int128_t. + 2023-04-17 Patrick Palka PR c++/109531 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 84c6c5a78c1..4fa4c519a8a 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,87 @@ +2023-04-19 Patrick Palka + Jonathan Wakely + + PR c++/100157 + * g++.dg/ext/type_pack_element1.C: New test. + * g++.dg/ext/type_pack_element2.C: New test. + * g++.dg/ext/type_pack_element3.C: New test. + +2023-04-19 Patrick Palka + + PR c++/109556 + * g++.dg/cpp2a/concepts-placeholder13.C: New test. + +2023-04-19 Harald Anlauf + + PR testsuite/83904 + PR fortran/100297 + * gfortran.dg/allocatable_function_1.f90: Use "__builtin_free " + instead of the naive "free". + * gfortran.dg/reshape_8.f90: Extend pattern from a simple "data". + +2023-04-19 Andrew Pinski + + * gcc.target/i386/cmov10.c: New test. + * gcc.target/i386/cmov11.c: New test. + +2023-04-19 Jason Merrill + + PR c++/108099 + * g++.dg/ext/int128-8.C: New test. + +2023-04-19 Juzhe-Zhong + + * gcc.target/riscv/rvv/base/pr108185-4.c: Adapt testcase. + * gcc.target/riscv/rvv/base/spill-1.c: Ditto. + * gcc.target/riscv/rvv/base/spill-11.c: Ditto. + * gcc.target/riscv/rvv/base/spill-2.c: Ditto. + * gcc.target/riscv/rvv/base/spill-3.c: Ditto. + * gcc.target/riscv/rvv/base/spill-5.c: Ditto. + * gcc.target/riscv/rvv/base/spill-9.c: Ditto. + +2023-04-19 Pan Li + + * gcc.target/riscv/rvv/base/mask_insn_shortcut.c: Update check + condition. + * gcc.target/riscv/simplify_ior_optimization.c: New test. + +2023-04-19 Uros Bizjak + + PR target/78904 + PR target/78952 + * gcc.target/i386/pr78952-3.c: New test. + +2023-04-19 Xi Ruoyao + + PR target/109465 + * gcc.target/loongarch/pr109465-1.c: New test. + * gcc.target/loongarch/pr109465-2.c: New test. + * gcc.target/loongarch/pr109465-3.c: New test. + +2023-04-19 Xi Ruoyao + + * gcc.target/loongarch/va_arg.c: New test. + +2023-04-19 Jakub Jelinek + + PR tree-optimization/109011 + * gcc.dg/vect/pr109011-1.c: New test. + +2023-04-19 Prathamesh Kulkarni + + * gcc.target/aarch64/vec-set-zero.c: New test. + +2023-04-19 Kyrylo Tkachov + + PR target/108840 + * gcc.target/aarch64/pr108840.c: New test. + +2023-04-19 Jakub Jelinek + + PR tree-optimization/109524 + * g++.dg/pr109524.C (nn::nn): Change argument type from nn & to + const nn &. + 2023-04-18 Uros Bizjak PR target/94908 diff --git a/include/ChangeLog b/include/ChangeLog index 76655e7ff86..6f719f88c48 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,13 @@ +2023-04-19 Max Filippov + + * xtensa-dynconfig.h (xtensa_config_v4): New struct. + (XCHAL_DATA_WIDTH, XCHAL_UNALIGNED_LOAD_EXCEPTION) + (XCHAL_UNALIGNED_STORE_EXCEPTION, XCHAL_UNALIGNED_LOAD_HW) + (XCHAL_UNALIGNED_STORE_HW, XTENSA_CONFIG_V4_ENTRY_LIST): New + definitions. + (XTENSA_CONFIG_INSTANCE_LIST): Add xtensa_config_v4 instance. + (XTENSA_CONFIG_ENTRY_LIST): Add XTENSA_CONFIG_V4_ENTRY_LIST. + 2023-02-27 Max Filippov * xtensa-dynconfig.h (xtensa_config_v3): New struct. diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index af0fd335903..745a4aaf7e7 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,51 @@ +2023-04-19 Patrick Palka + Jonathan Wakely + + PR c++/100157 + * include/bits/utility.h (_Nth_type): Conditionally define in + terms of __type_pack_element if available. + * testsuite/20_util/tuple/element_access/get_neg.cc: Prune + additional errors from the new built-in. + +2023-04-19 Jonathan Wakely + + Revert: + 2023-04-18 Jonathan Wakely + + PR libstdc++/108969 + * src/Makefile.am: Move globals_io.cc to here. + * src/Makefile.in: Regenerate. + * src/c++98/Makefile.am: Remove globals_io.cc from here. + * src/c++98/Makefile.in: Regenerate. + * src/c++98/globals_io.cc [_GLIBCXX_SYMVER_GNU] (cin): Adjust + symbol name and then export with GLIBCXX_3.4.31 symver. + (cout, cerr, clog, wcin, wcout, wcerr, wclog): Likewise. + * config/abi/post/aarch64-linux-gnu/baseline_symbols.txt: + Regenerate. + * config/abi/post/i486-linux-gnu/baseline_symbols.txt: + Regenerate. + * config/abi/post/m68k-linux-gnu/baseline_symbols.txt: + Regenerate. + * config/abi/post/powerpc64-linux-gnu/baseline_symbols.txt: + Regenerate. + * config/abi/post/riscv64-linux-gnu/baseline_symbols.txt: + Regenerate. + * config/abi/post/x86_64-linux-gnu/32/baseline_symbols.txt: + Regenerate. + * config/abi/post/s390x-linux-gnu/baseline_symbols.txt: + Regenerate. + * config/abi/post/x86_64-linux-gnu/baseline_symbols.txt: + Regenerate. + * config/abi/pre/gnu.ver: Add iostream objects to new symver. + +2023-04-19 Jonathan Wakely + + Revert: + 2023-04-18 Jonathan Wakely + + PR libstdc++/108969 + * config/abi/pre/gnu.ver: Fix preprocessor condition. + 2023-04-18 Jonathan Wakely * doc/xml/manual/extensions.xml: Fix example to declare and