r113612@merlin: rearnsha | 2006-05-07 00:19:18 +0100
r113612@merlin: rearnsha | 2006-05-07 00:19:18 +0100 * genpeep.c (main): Make insn-peep.c depend on flags.h. * arm/constraints.md: New file. * arm.h (REG_CLASS_FROM_LETTER_P): Delete. (CONST_OK_FOR_ARM_LETTER, CONST_OK_FOR_THUMB_LETTER) (CONST_OK_FOR_LETTER_P, CONST_DOUBLE_OK_FOR_ARM_LETTER) (CONST_DOUBLE_OK_FOR_LETTER_P, EXTRA_CONSTRAINT_STR_ARM) (CONSTRAINT_LEN, EXTRA_CONSTRAINT_THUMB, EXTRA_CONSTRAINT_STR) (EXTRA_MEMORY_CONSTRAINT): Likewise. * arm.md: Include constraints.md. (thumb_movsi_insn): Use satisfies_constraint_J. (movhi, movqi): Use satisfies_constraint_I. From-SVN: r113588
This commit is contained in:
Richard Earnshaw
Richard Earnshaw
parent
b3638b64c3
commit
ce92b22346
5 changed files with 206 additions and 117 deletions
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@ -1,3 +1,17 @@
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2006-05-07 Richard Earnshaw <rearnsha@arm.com>
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* genpeep.c (main): Make insn-peep.c depend on flags.h.
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* arm/constraints.md: New file.
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* arm.h (REG_CLASS_FROM_LETTER_P): Delete.
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(CONST_OK_FOR_ARM_LETTER, CONST_OK_FOR_THUMB_LETTER)
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(CONST_OK_FOR_LETTER_P, CONST_DOUBLE_OK_FOR_ARM_LETTER)
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(CONST_DOUBLE_OK_FOR_LETTER_P, EXTRA_CONSTRAINT_STR_ARM)
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(CONSTRAINT_LEN, EXTRA_CONSTRAINT_THUMB, EXTRA_CONSTRAINT_STR)
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(EXTRA_MEMORY_CONSTRAINT): Likewise.
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* arm.md: Include constraints.md.
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(thumb_movsi_insn): Use satisfies_constraint_J.
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(movhi, movqi): Use satisfies_constraint_I.
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2006-04-29 Anatoly Sokolov <aesok@post.ru>
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* config/avr/avr.h (CRT_BINUTILS_SPECS): Fixed crt* file name
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@ -1061,119 +1061,6 @@ enum reg_class
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registers. */
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#define SMALL_REGISTER_CLASSES TARGET_THUMB
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/* Get reg_class from a letter such as appears in the machine description.
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We only need constraint `f' for FPA_REGS (`r' == GENERAL_REGS) for the
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ARM, but several more letters for the Thumb. */
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#define REG_CLASS_FROM_LETTER(C) \
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( (C) == 'f' ? FPA_REGS \
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: (C) == 'v' ? CIRRUS_REGS \
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: (C) == 'w' ? VFP_REGS \
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: (C) == 'y' ? IWMMXT_REGS \
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: (C) == 'z' ? IWMMXT_GR_REGS \
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: (C) == 'l' ? (TARGET_ARM ? GENERAL_REGS : LO_REGS) \
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: TARGET_ARM ? NO_REGS \
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: (C) == 'h' ? HI_REGS \
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: (C) == 'b' ? BASE_REGS \
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: (C) == 'k' ? STACK_REG \
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: (C) == 'c' ? CC_REG \
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: NO_REGS)
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/* The letters I, J, K, L and M in a register constraint string
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can be used to stand for particular ranges of immediate operands.
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This macro defines what the ranges are.
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C is the letter, and VALUE is a constant value.
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Return 1 if VALUE is in the range specified by C.
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I: immediate arithmetic operand (i.e. 8 bits shifted as required).
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J: valid indexing constants.
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K: ~value ok in rhs argument of data operand.
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L: -value ok in rhs argument of data operand.
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M: 0..32, or a power of 2 (for shifts, or mult done by shift). */
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#define CONST_OK_FOR_ARM_LETTER(VALUE, C) \
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((C) == 'I' ? const_ok_for_arm (VALUE) : \
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(C) == 'J' ? ((VALUE) < 4096 && (VALUE) > -4096) : \
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(C) == 'K' ? (const_ok_for_arm (~(VALUE))) : \
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(C) == 'L' ? (const_ok_for_arm (-(VALUE))) : \
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(C) == 'M' ? (((VALUE >= 0 && VALUE <= 32)) \
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|| (((VALUE) & ((VALUE) - 1)) == 0)) \
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: 0)
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#define CONST_OK_FOR_THUMB_LETTER(VAL, C) \
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((C) == 'I' ? (unsigned HOST_WIDE_INT) (VAL) < 256 : \
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(C) == 'J' ? (VAL) > -256 && (VAL) < 0 : \
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(C) == 'K' ? thumb_shiftable_const (VAL) : \
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(C) == 'L' ? (VAL) > -8 && (VAL) < 8 : \
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(C) == 'M' ? ((unsigned HOST_WIDE_INT) (VAL) < 1024 \
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&& ((VAL) & 3) == 0) : \
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(C) == 'N' ? ((unsigned HOST_WIDE_INT) (VAL) < 32) : \
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(C) == 'O' ? ((VAL) >= -508 && (VAL) <= 508) \
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: 0)
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#define CONST_OK_FOR_LETTER_P(VALUE, C) \
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(TARGET_ARM ? \
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CONST_OK_FOR_ARM_LETTER (VALUE, C) : CONST_OK_FOR_THUMB_LETTER (VALUE, C))
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/* Constant letter 'G' for the FP immediate constants.
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'H' means the same constant negated. */
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#define CONST_DOUBLE_OK_FOR_ARM_LETTER(X, C) \
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((C) == 'G' ? arm_const_double_rtx (X) : \
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(C) == 'H' ? neg_const_double_rtx_ok_for_fpa (X) : 0)
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#define CONST_DOUBLE_OK_FOR_LETTER_P(X, C) \
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(TARGET_ARM ? \
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CONST_DOUBLE_OK_FOR_ARM_LETTER (X, C) : 0)
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/* For the ARM, `Q' means that this is a memory operand that is just
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an offset from a register.
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`S' means any symbol that has the SYMBOL_REF_FLAG set or a CONSTANT_POOL
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address. This means that the symbol is in the text segment and can be
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accessed without using a load.
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'D' Prefixes a number of const_double operands where:
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'Da' is a constant that takes two ARM insns to load.
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'Db' takes three ARM insns.
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'Dc' takes four ARM insns, if we allow that in this compilation.
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'U' Prefixes an extended memory constraint where:
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'Uv' is an address valid for VFP load/store insns.
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'Uy' is an address valid for iwmmxt load/store insns.
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'Uq' is an address valid for ldrsb. */
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#define EXTRA_CONSTRAINT_STR_ARM(OP, C, STR) \
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(((C) == 'D') ? ((GET_CODE (OP) == CONST_DOUBLE \
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|| GET_CODE (OP) == CONST_INT \
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|| GET_CODE (OP) == CONST_VECTOR) \
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&& (((STR)[1] == 'a' \
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&& arm_const_double_inline_cost (OP) == 2) \
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|| ((STR)[1] == 'b' \
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&& arm_const_double_inline_cost (OP) == 3) \
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|| ((STR)[1] == 'c' \
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&& arm_const_double_inline_cost (OP) == 4 \
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&& !(optimize_size || arm_ld_sched)))) : \
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((C) == 'Q') ? (GET_CODE (OP) == MEM \
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&& GET_CODE (XEXP (OP, 0)) == REG) : \
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((C) == 'R') ? (GET_CODE (OP) == MEM \
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&& GET_CODE (XEXP (OP, 0)) == SYMBOL_REF \
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&& CONSTANT_POOL_ADDRESS_P (XEXP (OP, 0))) : \
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((C) == 'S') ? (optimize > 0 && CONSTANT_ADDRESS_P (OP)) : \
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((C) == 'T') ? cirrus_memory_offset (OP) : \
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((C) == 'U' && (STR)[1] == 'v') ? arm_coproc_mem_operand (OP, FALSE) : \
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((C) == 'U' && (STR)[1] == 'y') ? arm_coproc_mem_operand (OP, TRUE) : \
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((C) == 'U' && (STR)[1] == 'q') \
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? arm_extendqisi_mem_op (OP, GET_MODE (OP)) \
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: 0)
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#define CONSTRAINT_LEN(C,STR) \
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(((C) == 'U' || (C) == 'D') ? 2 : DEFAULT_CONSTRAINT_LEN (C, STR))
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#define EXTRA_CONSTRAINT_THUMB(X, C) \
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((C) == 'Q' ? (GET_CODE (X) == MEM \
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&& GET_CODE (XEXP (X, 0)) == LABEL_REF) : 0)
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#define EXTRA_CONSTRAINT_STR(X, C, STR) \
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(TARGET_ARM \
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? EXTRA_CONSTRAINT_STR_ARM (X, C, STR) \
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: EXTRA_CONSTRAINT_THUMB (X, C))
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#define EXTRA_MEMORY_CONSTRAINT(C, STR) ((C) == 'U')
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/* Given an rtx X being reloaded into a reg required to be
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in class CLASS, return the class of reg to actually use.
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In general this is just CLASS, but for the Thumb we prefer
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@ -309,6 +309,7 @@
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;; Predicates
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(include "predicates.md")
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(include "constraints.md")
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;;---------------------------------------------------------------------------
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;; Pipeline descriptions
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@ -4443,7 +4444,7 @@
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(define_split
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[(set (match_operand:SI 0 "register_operand" "")
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(match_operand:SI 1 "const_int_operand" ""))]
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"TARGET_THUMB && CONST_OK_FOR_THUMB_LETTER (INTVAL (operands[1]), 'J')"
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"TARGET_THUMB && satisfies_constraint_J (operands[1])"
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[(set (match_dup 0) (match_dup 1))
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(set (match_dup 0) (neg:SI (match_dup 0)))]
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"operands[1] = GEN_INT (- INTVAL (operands[1]));"
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@ -4452,7 +4453,7 @@
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(define_split
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[(set (match_operand:SI 0 "register_operand" "")
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(match_operand:SI 1 "const_int_operand" ""))]
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"TARGET_THUMB && CONST_OK_FOR_THUMB_LETTER (INTVAL (operands[1]), 'K')"
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"TARGET_THUMB && satisfies_constraint_K (operands[1])"
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[(set (match_dup 0) (match_dup 1))
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(set (match_dup 0) (ashift:SI (match_dup 0) (match_dup 2)))]
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"
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@ -4905,7 +4906,7 @@
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operands[1] = force_reg (HImode, operands[1]);
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}
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else if (GET_CODE (operands[1]) == CONST_INT
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&& !CONST_OK_FOR_THUMB_LETTER (INTVAL (operands[1]), 'I'))
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&& !satisfies_constraint_I (operands[1]))
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{
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/* Handle loading a large integer during reload. */
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@ -5138,7 +5139,7 @@
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}
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else if (TARGET_THUMB
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&& GET_CODE (operands[1]) == CONST_INT
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&& !CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'I'))
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&& !satisfies_constraint_I (operands[1]))
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{
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/* Handle loading a large integer during reload. */
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186
gcc/config/arm/constraints.md
Normal file
186
gcc/config/arm/constraints.md
Normal file
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@ -0,0 +1,186 @@
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;; Constraint definitions for ARM and Thumb
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;; Copyright (C) 2006 Free Software Foundation, Inc.
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;; Contributed by ARM Ltd.
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;; This file is part of GCC.
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;; GCC is free software; you can redistribute it and/or modify it
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;; under the terms of the GNU General Public License as published
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;; by the Free Software Foundation; either version 2, or (at your
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;; option) any later version.
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;; GCC is distributed in the hope that it will be useful, but WITHOUT
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;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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;; License for more details.
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING. If not, write to
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;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
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;; Boston, MA 02110-1301, USA.
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;; The following register constraints have been used:
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;; - in ARM state: f, v, w, y, z
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;; - in Thumb state: h, k, b
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;; - in both states: l, c
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;; In ARM state, 'l' is an alias for 'r'
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;; The following normal constraints have been used:
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;; in ARM state: G, H, I, J, K, L, M
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;; in Thumb state: I, J, K, L, M, N, O
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;; The following multi-letter normal constraints have been used:
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;; in ARM state: Da, Db, Dc
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;; The following memory constraints have been used:
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;; in ARM state: Q, Uq, Uv, Uy
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(define_register_constraint "f" "TARGET_ARM ? FPA_REGS : NO_REGS"
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"Legacy FPA registers @code{f0}-@code{f7}.")
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(define_register_constraint "v" "TARGET_ARM ? CIRRUS_REGS : NO_REGS"
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"The Cirrus Maverick co-processor registers.")
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(define_register_constraint "w" "TARGET_ARM ? VFP_REGS : NO_REGS"
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"The VFP registers @code{s0}-@code{s31}.")
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(define_register_constraint "y" "TARGET_REALLY_IWMMXT ? IWMMXT_REGS : NO_REGS"
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"The Intel iWMMX co-processor registers.")
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(define_register_constraint "z"
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"TARGET_REALLY_IWMMXT ? IWMMXT_GR_REGS : NO_REGS"
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"The Intel iWMMX GR registers.")
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(define_register_constraint "l" "TARGET_THUMB ? LO_REGS : GENERAL_REGS"
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"In Thumb state the core registers @code{r0}-@code{r7}.")
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(define_register_constraint "h" "TARGET_THUMB ? HI_REGS : NO_REGS"
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"In Thumb state the core registers @code{r8}-@code{r15}.")
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(define_register_constraint "k" "TARGET_THUMB ? STACK_REG : NO_REGS"
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"@internal
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Thumb only. The stack register.")
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(define_register_constraint "b" "TARGET_THUMB ? BASE_REGS : NO_REGS"
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"@internal
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Thumb only. The union of the low registers and the stack register.")
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(define_register_constraint "c" "CC_REG"
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"@interal The condition code register.")
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(define_constraint "I"
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"In ARM state a constant that can be used as an immediate value in a Data
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Processing instruction. In Thumb state a constant in the range 0-255."
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(and (match_code "const_int")
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(match_test "TARGET_ARM ? const_ok_for_arm (ival)
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: ival >= 0 && ival <= 255")))
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(define_constraint "J"
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"In ARM state a constant in the range @minus{}4095-4095. In Thumb state
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a constant in the range @minus{}255-@minus{}1."
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(and (match_code "const_int")
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(match_test "TARGET_ARM ? (ival >= -4095 && ival <= 4095)
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: (ival >= -255 && ival <= -1)")))
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(define_constraint "K"
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"In ARM state a constant that satisfies the @code{I} constraint if inverted.
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In Thumb state a constant that satisfies the @code{I} constraint multiplied
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by any power of 2."
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(and (match_code "const_int")
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(match_test "TARGET_ARM ? const_ok_for_arm (~ival)
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: thumb_shiftable_const (ival)")))
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(define_constraint "L"
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"In ARM state a constant that satisfies the @code{I} constraint if negated.
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In Thumb state a constant in the range @minus{}7-7."
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(and (match_code "const_int")
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(match_test "TARGET_ARM ? const_ok_for_arm (-ival)
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: (ival >= -7 && ival <= 7)")))
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;; The ARM state version is internal...
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;; @internal In ARM state a constant in the range 0-32 or any power of 2.
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(define_constraint "M"
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"In Thumb state a constant that is a multiple of 4 in the range 0-1020."
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(and (match_code "const_int")
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(match_test "TARGET_ARM ? ((ival >= 0 && ival <= 32)
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|| ((ival & (ival - 1)) == 0))
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: ((ival >= 0 && ival <= 1020) && ((ival & 3) == 0))")))
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(define_constraint "N"
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"In Thumb state a constant in the range 0-31."
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(and (match_code "const_int")
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(match_test "TARGET_THUMB && ival >= 0 && ival <= 31")))
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(define_constraint "O"
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"In Thumb state a constant that is a multiple of 4 in the range
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@minus{}508-508."
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(and (match_code "const_int")
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(match_test "TARGET_THUMB && ival >= -508 && ival <= 508
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&& ((ival & 3) == 0)")))
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(define_constraint "G"
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"In ARM state a valid FPA immediate constant."
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(and (match_code "const_double")
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(match_test "TARGET_ARM && arm_const_double_rtx (op)")))
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(define_constraint "H"
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"In ARM state a valid FPA immediate constant when negated."
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(and (match_code "const_double")
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(match_test "TARGET_ARM && neg_const_double_rtx_ok_for_fpa (op)")))
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(define_constraint "Da"
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"@internal
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In ARM state a const_int, const_double or const_vector that can
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be generated with two Data Processing insns."
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(and (match_code "const_double,const_int,const_vector")
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(match_test "TARGET_ARM && arm_const_double_inline_cost (op) == 2")))
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(define_constraint "Db"
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"@internal
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In ARM state a const_int, const_double or const_vector that can
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be generated with three Data Processing insns."
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(and (match_code "const_double,const_int,const_vector")
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(match_test "TARGET_ARM && arm_const_double_inline_cost (op) == 3")))
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(define_constraint "Dc"
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"@internal
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In ARM state a const_int, const_double or const_vector that can
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be generated with four Data Processing insns. This pattern is disabled
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if optimizing for space or when we have load-delay slots to fill."
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(and (match_code "const_double,const_int,const_vector")
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(match_test "TARGET_ARM && arm_const_double_inline_cost (op) == 4
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&& !(optimize_size || arm_ld_sched)")))
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(define_memory_constraint "Uv"
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"@internal
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In ARM state a valid VFP load/store address."
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(and (match_code "mem")
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(match_test "TARGET_ARM && arm_coproc_mem_operand (op, FALSE)")))
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(define_memory_constraint "Uy"
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"@internal
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In ARM state a valid iWMMX load/store address."
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(and (match_code "mem")
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(match_test "TARGET_ARM && arm_coproc_mem_operand (op, TRUE)")))
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(define_memory_constraint "Uq"
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"@internal
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In ARM state an address valid in ldrsb instructions."
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(and (match_code "mem")
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(match_test "TARGET_ARM
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&& arm_legitimate_address_p (GET_MODE (op), XEXP (op, 0),
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SIGN_EXTEND, 0)")))
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(define_memory_constraint "Q"
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"@internal
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In ARM state an address that is a single base register."
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(and (match_code "mem")
|
||||
(match_test "REG_P (XEXP (op, 0))")))
|
||||
|
||||
;; We used to have constraint letters for S and R in ARM state, but
|
||||
;; all uses of these now appear to have been removed.
|
||||
|
||||
;; Additionally, we used to have a Q constraint in Thumb state, but
|
||||
;; this wasn't really a valid memory constraint. Again, all uses of
|
||||
;; this now seem to have been removed.
|
||||
|
|
@ -379,6 +379,7 @@ from the machine description file `md'. */\n\n");
|
|||
printf ("#include \"except.h\"\n");
|
||||
printf ("#include \"function.h\"\n");
|
||||
printf ("#include \"toplev.h\"\n");
|
||||
printf ("#include \"flags.h\"\n");
|
||||
printf ("#include \"tm-constrs.h\"\n\n");
|
||||
|
||||
printf ("#ifdef HAVE_peephole\n");
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue