convex.c: Fix comment formatting.
* config/convex/convex.c: Fix comment formatting. * config/convex/convex.h: Likewise. From-SVN: r46886
This commit is contained in:
Kazu Hirata
Kazu Hirata
parent
6ca224d34d
commit
cde34caf14
3 changed files with 74 additions and 69 deletions
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@ -1,3 +1,8 @@
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2001-11-09 Kazu Hirata <kazu@hxi.com>
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* config/convex/convex.c: Fix comment formatting.
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* config/convex/convex.h: Likewise.
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2001-11-08 Zack Weinberg <zack@codesourcery.com>
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* Makefile.in (.po.pox): Look both in srcdir and builddir
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@ -42,16 +42,16 @@ char regno_ok_for_index_p_base[1 + LAST_VIRTUAL_REGISTER + 1];
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enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
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enum reg_class reg_class_from_letter[256];
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/* Target cpu index. */
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/* Target cpu index. */
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int target_cpu;
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/* Boolean to keep track of whether the current section is .text or not.
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Used by .align handler in convex.h. */
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Used by .align handler in convex.h. */
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int current_section_is_text;
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/* Communication between output_compare and output_condjump. */
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/* Communication between output_compare and output_condjump. */
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static rtx cmp_operand0, cmp_operand1;
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static char cmp_modech;
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@ -107,18 +107,18 @@ convex_output_function_prologue (file, size)
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The function epilogue should not depend on the current stack
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pointer! It should use the frame pointer only. This is mandatory
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because of alloca; we also take advantage of it to omit stack
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adjustments before returning. */
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adjustments before returning. */
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static void
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convex_output_function_epilogue (file, size)
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FILE *file;
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HOST_WIDE_INT size ATTRIBUTE_UNUSED;
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{
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/* Follow function with a zero to stop c34 icache prefetching. */
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/* Follow function with a zero to stop c34 icache prefetching. */
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fprintf (file, "\tds.h 0\n");
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}
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/* Adjust the cost of dependences. */
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/* Adjust the cost of dependences. */
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static int
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convex_adjust_cost (insn, link, dep, cost)
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rtx insn;
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@ -126,7 +126,7 @@ convex_adjust_cost (insn, link, dep, cost)
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rtx dep;
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int cost;
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{
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/* Antidependencies don't block issue. */
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/* Antidependencies don't block issue. */
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if (REG_NOTE_KIND (link) != 0)
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cost = 0;
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/* C38 situations where delay depends on context */
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@ -155,14 +155,14 @@ convex_adjust_cost (insn, link, dep, cost)
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/* Here from OVERRIDE_OPTIONS at startup. Initialize constant tables. */
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/* Here from OVERRIDE_OPTIONS at startup. Initialize constant tables. */
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void
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init_convex ()
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{
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int regno;
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/* Set A and S reg classes. */
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/* Set A and S reg classes. */
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for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
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if (A_REGNO_P (regno))
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{
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@ -175,7 +175,7 @@ init_convex ()
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regno_reg_class[regno] = S_REGS;
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}
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/* Can't index off the stack pointer, register 0. */
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/* Can't index off the stack pointer, register 0. */
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regno_ok_for_index_p[STACK_POINTER_REGNUM] = 0;
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regno_reg_class[STACK_POINTER_REGNUM] = SP_REGS;
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@ -193,7 +193,7 @@ init_convex ()
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reg_class_from_letter['A'] = INDEX_REGS;
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reg_class_from_letter['d'] = S_REGS;
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/* Turn off floating point exception enables in the psw. */
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/* Turn off floating point exception enables in the psw. */
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psw_disable_float ();
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}
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@ -212,7 +212,7 @@ psw_disable_float ()
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}
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/* Here to output code for a compare insn. Output nothing, just
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record the operands and their mode. */
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record the operands and their mode. */
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const char *
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output_cmp (operand0, operand1, modech)
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@ -250,7 +250,7 @@ output_condjump (label, cond, jbr_sense)
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/* [BL] mean the value is being compared against immediate 0.
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Use neg.x, which produces the same carry that eq.x #0 would if it
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existed. In this case operands[1] is a scratch register, not a
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compare operand. */
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compare operand. */
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if (cmp_modech == 'B' || cmp_modech == 'L')
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{
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@ -260,7 +260,7 @@ output_condjump (label, cond, jbr_sense)
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/* [WH] mean the value being compared resulted from "add.[wh] #-1,rk"
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when rk was nonnegative -- we can omit equality compares against -1
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or inequality compares against 0. */
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or inequality compares against 0. */
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else if (cmp_modech == 'W' || cmp_modech == 'H')
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{
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@ -274,7 +274,7 @@ output_condjump (label, cond, jbr_sense)
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/* Constant must be first; swap operands if necessary.
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If lt, le, ltu, leu are swapped, change to le, lt, leu, ltu
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and reverse the sense of the jump. */
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and reverse the sense of the jump. */
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if (! REG_P (cmp_operand1))
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{
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@ -313,7 +313,7 @@ output_condjump (label, cond, jbr_sense)
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/* Return 1 if OP is valid for cmpsf.
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In IEEE mode, +/- zero compares are not handled by
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the immediate versions of eq.s and on some machines, lt.s, and le.s.
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So disallow 0.0 as the immediate operand of xx.s compares in IEEE mode. */
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So disallow 0.0 as the immediate operand of xx.s compares in IEEE mode. */
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int
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nonmemory_cmpsf_operand (op, mode)
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@ -329,7 +329,7 @@ nonmemory_cmpsf_operand (op, mode)
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}
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/* Convex /bin/as does not like unary minus in some contexts.
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Simplify CONST addresses to remove it. */
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Simplify CONST addresses to remove it. */
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rtx
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simplify_for_convex (x)
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@ -355,7 +355,7 @@ simplify_for_convex (x)
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return x;
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}
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/* Routines to separate CONST_DOUBLEs into component parts. */
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/* Routines to separate CONST_DOUBLEs into component parts. */
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int
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const_double_high_int (x)
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@ -377,7 +377,7 @@ const_double_low_int (x)
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return CONST_DOUBLE_LOW (x);
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}
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/* Inline block copy. */
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/* Inline block copy. */
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void
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expand_movstr (operands)
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@ -394,16 +394,16 @@ expand_movstr (operands)
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/* Decide how many regs to use, depending on load latency, and what
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size pieces to move, depending on whether machine does unaligned
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loads and stores efficiently. */
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loads and stores efficiently. */
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if (TARGET_C1)
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{
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/* ld.l latency is 4, no alignment problems. */
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/* ld.l latency is 4, no alignment problems. */
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nregs = 3, maxsize = 8;
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}
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else if (TARGET_C2)
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{
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/* loads are latency 2 if we avoid ld.l not at least word aligned. */
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/* loads are latency 2 if we avoid ld.l not at least word aligned. */
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if (align >= 4)
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nregs = 2, maxsize = 8;
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else
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@ -411,12 +411,12 @@ expand_movstr (operands)
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}
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else if (TARGET_C34)
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{
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/* latency is 4 if aligned, horrible if not. */
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/* latency is 4 if aligned, horrible if not. */
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nregs = 3, maxsize = align;
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}
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else if (TARGET_C38)
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{
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/* latency is 2 if at least word aligned, 3 or 4 if unaligned. */
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/* latency is 2 if at least word aligned, 3 or 4 if unaligned. */
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if (align >= 4)
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nregs = 2, maxsize = 8;
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else
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@ -426,7 +426,7 @@ expand_movstr (operands)
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abort ();
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/* Caller is not necessarily prepared for us to fail in this
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expansion. So fall back by generating memcpy call here. */
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expansion. So fall back by generating memcpy call here. */
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if (GET_CODE (operands[2]) != CONST_INT
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|| (len = INTVAL (operands[2])) > (unsigned) 32 * maxsize)
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@ -465,7 +465,7 @@ expand_movstr (operands)
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store = gen_rtx_SET (VOIDmode, dest, reg);
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/* Emit the load and the store from last time.
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When we emit a store, we can reuse its temp reg. */
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When we emit a store, we can reuse its temp reg. */
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emit_insn (load);
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if (prev_store)
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{
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@ -475,20 +475,20 @@ expand_movstr (operands)
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else
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reg = 0;
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/* Queue up the store, for next time or the time after that. */
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/* Queue up the store, for next time or the time after that. */
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if (nregs == 2)
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prev_store = store;
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else
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prev_store = prev_store_2, prev_store_2 = store;
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/* Advance to next piece. */
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/* Advance to next piece. */
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size = GET_MODE_SIZE (mode);
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src = adjust_address (src, mode, size);
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dest = adjust_address (dest, mode, size);
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len -= size;
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}
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/* Finally, emit the last stores. */
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/* Finally, emit the last stores. */
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if (prev_store)
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emit_insn (prev_store);
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if (prev_store_2)
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@ -554,7 +554,7 @@ check_float_value (mode, dp, overflow)
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/* Output the label at the start of a function.
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Precede it with the number of formal args so debuggers will have
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some idea of how many args to print. */
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some idea of how many args to print. */
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void
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asm_declare_function_name (file, name, decl)
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@ -591,7 +591,7 @@ asm_declare_function_name (file, name, decl)
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/* Print an instruction operand X on file FILE.
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CODE is the code from the %-spec that requested printing this operand;
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if `%z3' was used to print operand 3, then CODE is 'z'. */
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if `%z3' was used to print operand 3, then CODE is 'z'. */
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/* Convex codes:
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%u prints a CONST_DOUBLE's high word
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%v prints a CONST_DOUBLE's low word
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@ -670,7 +670,7 @@ print_operand (file, x, code)
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}
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}
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/* Print a memory operand whose address is X, on file FILE. */
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/* Print a memory operand whose address is X, on file FILE. */
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void
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print_operand_address (file, addr)
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@ -718,7 +718,7 @@ print_operand_address (file, addr)
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}
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/* Output a float to FILE, value VALUE, format FMT, preceded by PFX
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and followed by SFX. */
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and followed by SFX. */
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void
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outfloat (file, value, fmt, pfx, sfx)
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@ -743,7 +743,7 @@ outfloat (file, value, fmt, pfx, sfx)
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void
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replace_arg_pushes ()
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{
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/* Doesn't work yet. */
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/* Doesn't work yet. */
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}
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/* Output the insns needed to do a call. operands[] are
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@ -777,11 +777,11 @@ output_call (insn, operands)
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}
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/* Here after reloading, before the second scheduling pass. */
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/* Here after reloading, before the second scheduling pass. */
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void
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emit_ap_optimizations ()
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{
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/* Removed for now. */
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/* Removed for now. */
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}
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@ -19,7 +19,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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/* Standard GCC variables that we reference. */
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/* Standard GCC variables that we reference. */
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extern int target_flags;
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@ -107,7 +107,7 @@ extern int target_flags;
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/* Target-dependent specs.
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Some libraries come in c1 and c2+ versions; use the appropriate ones.
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Make a target-dependent __convex_cxx__ define to relay the target cpu
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to the program being compiled. */
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to the program being compiled. */
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#if (TARGET_DEFAULT | TARGET_CPU_DEFAULT) & 1
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@ -416,12 +416,12 @@ extern int target_flags;
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#endif
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/* Use /path/libgcc.a instead of -lgcc, makes bootstrap work more smoothly. */
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/* Use /path/libgcc.a instead of -lgcc, makes bootstrap work more smoothly. */
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#define LINK_LIBGCC_SPECIAL_1
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/* Since IEEE support was added to gcc, most things seem to like it
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better if we disable exceptions and check afterward for infinity. */
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better if we disable exceptions and check afterward for infinity. */
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#if __convex__
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#if _IEEE_FLOAT_
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@ -436,7 +436,7 @@ extern int target_flags;
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/* Target machine storage layout */
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/* Define this if most significant bit is lowest numbered
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in instructions that operate on numbered bit-fields. */
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in instructions that operate on numbered bit-fields. */
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#define BITS_BIG_ENDIAN 1
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/* Define this if most significant byte of a word is the lowest numbered. */
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@ -531,19 +531,19 @@ extern int target_flags;
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/* List the order in which to allocate registers. Each register must be
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listed once, even those in FIXED_REGISTERS.
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For Convex, put S0 (the return register) last. */
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For Convex, put S0 (the return register) last. */
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#define REG_ALLOC_ORDER \
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{ 1, 2, 3, 4, 5, 6, 7, 9, 10, 11, 12, 13, 0, 8, 14, 15 }
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/* Return number of consecutive hard regs needed starting at reg REGNO
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to hold something of mode MODE.
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This is ordinarily the length in words of a value of mode MODE
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but can be less for certain modes in special long registers. */
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but can be less for certain modes in special long registers. */
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#define HARD_REGNO_NREGS(REGNO, MODE) \
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((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
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/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
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On Convex, S registers can hold any type, A registers any nonfloat. */
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On Convex, S registers can hold any type, A registers any nonfloat. */
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#define HARD_REGNO_MODE_OK(REGNO, MODE) \
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(S_REGNO_P (REGNO) \
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|| (GET_MODE_SIZE (MODE) <= 4 && (MODE) != SFmode))
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@ -608,7 +608,7 @@ extern int target_flags;
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/* Convex has classes A (address) and S (scalar).
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A is further divided into SP_REGS (stack pointer) and INDEX_REGS.
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SI_REGS is S_REGS + INDEX_REGS -- all the regs except SP. */
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SI_REGS is S_REGS + INDEX_REGS -- all the regs except SP. */
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enum reg_class {
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NO_REGS, S_REGS, INDEX_REGS, SP_REGS, A_REGS, SI_REGS,
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@ -667,7 +667,7 @@ enum reg_class {
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C is the letter, and VALUE is a constant value.
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Return 1 if VALUE is in the range specified by C. */
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/* 'I' is used to pass any CONST_INT and reject any CONST_DOUBLE.
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CONST_DOUBLE integers are handled by G and H constraint chars. */
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CONST_DOUBLE integers are handled by G and H constraint chars. */
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#define CONST_OK_FOR_LETTER_P(VALUE, C) 1
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@ -689,7 +689,7 @@ enum reg_class {
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/* Optional extra constraints for this machine.
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For Convex, 'Q' means that OP is a volatile MEM.
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For volatile scalars, we use instructions that bypass the data cache. */
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For volatile scalars, we use instructions that bypass the data cache. */
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#define EXTRA_CONSTRAINT(OP, C) \
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((C) == 'Q' ? (GET_CODE (OP) == MEM && MEM_VOLATILE_P (OP) \
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@ -701,7 +701,7 @@ enum reg_class {
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In general this is just CLASS; but on some machines
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in some cases it is preferable to use a more restrictive class. */
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/* Put 2-word constants that can't be immediate operands into memory. */
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/* Put 2-word constants that can't be immediate operands into memory. */
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#define PREFERRED_RELOAD_CLASS(X,CLASS) \
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((GET_CODE (X) != CONST_DOUBLE \
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@ -734,7 +734,7 @@ enum reg_class {
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#define STARTING_FRAME_OFFSET 0
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/* If we generate an insn to push BYTES bytes,
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this says how many the stack pointer really advances by. */
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this says how many the stack pointer really advances by. */
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#define PUSH_ROUNDING(BYTES) (((BYTES) + 3) & ~3)
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/* Offset of first parameter from the argument pointer register value. */
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@ -772,7 +772,7 @@ enum reg_class {
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#define FUNCTION_VALUE_REGNO_P(N) ((N) == S0_REGNUM)
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/* 1 if N is a possible register number for function argument passing. */
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/* 1 if N is a possible register number for function argument passing. */
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#define FUNCTION_ARG_REGNO_P(N) 0
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@ -780,14 +780,14 @@ enum reg_class {
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during the scan of that argument list. This data type should
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hold all necessary information about the function itself
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and about the args processed so far, enough to enable macros
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such as FUNCTION_ARG to determine where the next arg should go. */
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/* On convex, simply count the arguments in case TARGET_ARGCOUNT is set. */
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such as FUNCTION_ARG to determine where the next arg should go. */
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/* On convex, simply count the arguments in case TARGET_ARGCOUNT is set. */
|
||||
|
||||
#define CUMULATIVE_ARGS int
|
||||
|
||||
/* Initialize a variable CUM of type CUMULATIVE_ARGS
|
||||
for a call to a function whose data type is FNTYPE.
|
||||
For a library call, FNTYPE is 0. */
|
||||
For a library call, FNTYPE is 0. */
|
||||
|
||||
#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
|
||||
((CUM) = 0)
|
||||
|
|
@ -906,7 +906,7 @@ enum reg_class {
|
|||
/* Nonzero if the constant value X is a legitimate general operand.
|
||||
It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
|
||||
|
||||
/* For convex, bounce 2-word constants that can't be immediate operands. */
|
||||
/* For convex, bounce 2-word constants that can't be immediate operands. */
|
||||
|
||||
#define LEGITIMATE_CONSTANT_P(X) \
|
||||
(GET_CODE (X) != CONST_DOUBLE \
|
||||
|
|
@ -958,7 +958,7 @@ enum reg_class {
|
|||
const, reg, (PLUS reg const)
|
||||
|
||||
We don't use indirection since with insn scheduling, load + indexing
|
||||
is better. */
|
||||
is better. */
|
||||
|
||||
/* 1 if X is an address that we could indirect through. */
|
||||
#define INDIRECTABLE_ADDRESS_P(X) \
|
||||
|
|
@ -973,7 +973,7 @@ enum reg_class {
|
|||
&& REG_OK_FOR_BASE_P (XEXP (X, 1)) \
|
||||
&& CONSTANT_ADDRESS_P (XEXP (X, 0))))
|
||||
|
||||
/* Go to ADDR if X is a valid address. */
|
||||
/* Go to ADDR if X is a valid address. */
|
||||
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
|
||||
{ register rtx xfoob = (X); \
|
||||
if (INDIRECTABLE_ADDRESS_P (xfoob)) \
|
||||
|
|
@ -1000,7 +1000,7 @@ enum reg_class {
|
|||
#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
|
||||
|
||||
/* Go to LABEL if ADDR (a legitimate address expression)
|
||||
has an effect that depends on the machine mode it is used for. */
|
||||
has an effect that depends on the machine mode it is used for. */
|
||||
|
||||
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
|
||||
|
||||
|
|
@ -1011,7 +1011,7 @@ enum reg_class {
|
|||
/* Define as C expression which evaluates to nonzero if the tablejump
|
||||
instruction expects the table to contain offsets from the address of the
|
||||
table.
|
||||
Do not define this if the table should contain absolute addresses. */
|
||||
Do not define this if the table should contain absolute addresses. */
|
||||
/* #define CASE_VECTOR_PC_RELATIVE 1 */
|
||||
|
||||
/* Define this if the case instruction drops through after the table
|
||||
|
|
@ -1052,7 +1052,7 @@ enum reg_class {
|
|||
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
|
||||
|
||||
/* On Convex, it is as good to call a constant function address as to
|
||||
call an address kept in a register. */
|
||||
call an address kept in a register. */
|
||||
#define NO_FUNCTION_CSE
|
||||
|
||||
/* When a prototype says `char' or `short', really pass an `int'. */
|
||||
|
|
@ -1116,7 +1116,7 @@ enum reg_class {
|
|||
#define BRANCH_COST 0
|
||||
|
||||
/* Convex uses VAX or IEEE floats.
|
||||
Follow the host format. */
|
||||
Follow the host format. */
|
||||
#define TARGET_FLOAT_FORMAT HOST_FLOAT_FORMAT
|
||||
|
||||
/* But must prevent real.c from constructing VAX dfloats */
|
||||
|
|
@ -1204,7 +1204,7 @@ enum reg_class {
|
|||
|
||||
#define DBX_DEBUGGING_INFO
|
||||
|
||||
/* How to renumber registers for dbx and gdb. */
|
||||
/* How to renumber registers for dbx and gdb. */
|
||||
|
||||
#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
|
||||
|
||||
|
|
@ -1217,7 +1217,7 @@ enum reg_class {
|
|||
|
||||
#define DBX_CONTIN_CHAR '?'
|
||||
|
||||
/* Don't use stab extensions until GDB v4 port is available for convex. */
|
||||
/* Don't use stab extensions until GDB v4 port is available for convex. */
|
||||
|
||||
#define DEFAULT_GDB_EXTENSIONS 0
|
||||
#define DBX_NO_XREFS
|
||||
|
|
@ -1234,7 +1234,7 @@ enum reg_class {
|
|||
#define ASM_GLOBALIZE_LABEL(FILE,NAME) \
|
||||
do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
|
||||
|
||||
/* The prefix to add to user-visible assembler symbols. */
|
||||
/* The prefix to add to user-visible assembler symbols. */
|
||||
|
||||
#define USER_LABEL_PREFIX "_"
|
||||
|
||||
|
|
@ -1342,7 +1342,7 @@ enum reg_class {
|
|||
S_REGNO_P (REGNO) ? 'l' : 'w', \
|
||||
reg_names[REGNO])
|
||||
|
||||
/* This is how to output an element of a case-vector that is absolute. */
|
||||
/* This is how to output an element of a case-vector that is absolute. */
|
||||
|
||||
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
|
||||
fprintf (FILE, "\tds.w L%d\n", VALUE)
|
||||
|
|
@ -1383,19 +1383,19 @@ enum reg_class {
|
|||
( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
|
||||
sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
|
||||
|
||||
/* Output an arg count before function entries. */
|
||||
/* Output an arg count before function entries. */
|
||||
|
||||
#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
|
||||
asm_declare_function_name (FILE, NAME, DECL)
|
||||
|
||||
/* Print an instruction operand X on file FILE.
|
||||
CODE is the code from the %-spec that requested printing this operand;
|
||||
if `%z3' was used to print operand 3, then CODE is 'z'. */
|
||||
if `%z3' was used to print operand 3, then CODE is 'z'. */
|
||||
|
||||
#define PRINT_OPERAND(FILE, X, CODE) \
|
||||
print_operand (FILE, X, CODE)
|
||||
|
||||
/* Print a memory operand whose address is X, on file FILE. */
|
||||
/* Print a memory operand whose address is X, on file FILE. */
|
||||
|
||||
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
|
||||
print_operand_address (FILE, ADDR)
|
||||
|
|
@ -1406,7 +1406,7 @@ enum reg_class {
|
|||
#define FASCIST_ASSEMBLER
|
||||
|
||||
/* __gcc_cleanup is loader-aliased to __ap$do_registered_functions if we
|
||||
are linking against standard libc, 0 if old (-traditional) libc. */
|
||||
are linking against standard libc, 0 if old (-traditional) libc. */
|
||||
|
||||
#define EXIT_BODY \
|
||||
{ \
|
||||
|
|
@ -1417,7 +1417,7 @@ enum reg_class {
|
|||
}
|
||||
|
||||
/* Header for convex.c.
|
||||
Here at the end so we can use types defined above. */
|
||||
Here at the end so we can use types defined above. */
|
||||
|
||||
extern int target_cpu;
|
||||
extern int current_section_is_text;
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue