re PR rtl-optimization/20249 (ICE with -fprofile-arcs on ppc)

PR rtl-optimization/20249
	* cse.c (insert_regs): Do not record equivalence of registers in
	different modes.

	* gcc.dg/20050325-1.c: New test.

From-SVN: r97039
This commit is contained in:
Zdenek Dvorak 2005-03-25 10:23:47 +01:00 committed by Zdenek Dvorak
parent 256f7136ca
commit cd92865225
4 changed files with 48 additions and 1 deletions

View file

@ -1,3 +1,9 @@
2005-03-25 Zdenek Dvorak <dvorakz@suse.cz>
PR rtl-optimization/20249
* cse.c (insert_regs): Do not record equivalence of registers in
different modes.
2005-03-24 Kazu Hirata <kazu@cs.umass.edu>
* emit-rtl.c (reverse_comparison): Remove.

View file

@ -1234,7 +1234,24 @@ insert_regs (rtx x, struct table_elt *classp, int modified)
if (REG_P (classp->exp)
&& GET_MODE (classp->exp) == GET_MODE (x))
{
make_regs_eqv (regno, REGNO (classp->exp));
unsigned c_regno = REGNO (classp->exp);
gcc_assert (REGNO_QTY_VALID_P (c_regno));
/* Suppose that 5 is hard reg and 100 and 101 are
pseudos. Consider
(set (reg:si 100) (reg:si 5))
(set (reg:si 5) (reg:si 100))
(set (reg:di 101) (reg:di 5))
We would now set REG_QTY (101) = REG_QTY (5), but the
entry for 5 is in SImode. When we use this later in
copy propagation, we get the register in wrong mode. */
if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x))
continue;
make_regs_eqv (regno, c_regno);
return 1;
}

View file

@ -1,3 +1,8 @@
2005-03-25 Zdenek Dvorak <dvorakz@suse.cz>
PR rtl-optimization/20249
* gcc.dg/20050325-1.c: New test.
2005-03-25 Francois-Xavier Coudert <coudert@clipper.ens.fr>
PR libfortran/15332

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@ -0,0 +1,19 @@
/* PR 20249 */
/* { dg-do compile } */
/* dg-options "-O2 -fprofile-arcs" } */
extern int *g (int x, void* y);
extern void fg (long long x, int y);
static void
ff (int y, long long z)
{
fg (z, 1);
}
void
f ()
{
g (42, ff);
}