re PR target/62120 ([ICE] ADDITIONAL_REGISTER_NAMES for [YZ]MMs, regno>8 should be disable in 32-bit)
Fix PR 62120. gcc/ 2014-09-30 Ilya Tocar <ilya.tocar@intel.com> PR middle-end/62120 * varasm.c (decode_reg_name_and_count): Check availability for registers from ADDITIONAL_REGISTER_NAMES. testsuite/ 2014-09-30 Ilya Tocar <ilya.tocar@intel.com> PR middle-end/62120 * gcc.target/i386/avx512f-additional-reg-names.c: Use register valid in 32-bit mode. * gcc.target/i386/pr62120.c: New. From-SVN: r215729
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5 changed files with 25 additions and 3 deletions
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@ -1,3 +1,9 @@
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2014-09-30 Ilya Tocar <ilya.tocar@intel.com>
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PR middle-end/62120
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* varasm.c (decode_reg_name_and_count): Check availability for
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registers from ADDITIONAL_REGISTER_NAMES.
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2014-09-30 David Malcolm <dmalcolm@redhat.com>
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PR plugins/63410
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@ -1,3 +1,10 @@
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2014-09-30 Ilya Tocar <ilya.tocar@intel.com>
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PR middle-end/62120
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* gcc.target/i386/avx512f-additional-reg-names.c: Use register valid
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in 32-bit mode.
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* gcc.target/i386/pr62120.c: New.
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2014-09-30 James Greenhalgh <james.greenhalgh@arm.com>
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* gcc.target/aarch64/simd/vqdmullh_laneq_s16.c: New.
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@ -3,7 +3,7 @@
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void foo ()
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{
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register int zmm_var asm ("zmm9") __attribute__((unused));
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register int zmm_var asm ("zmm6") __attribute__((unused));
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__asm__ __volatile__("vxorpd %%zmm0, %%zmm0, %%zmm7\n" : : : "zmm7" );
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}
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8
gcc/testsuite/gcc.target/i386/pr62120.c
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8
gcc/testsuite/gcc.target/i386/pr62120.c
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@ -0,0 +1,8 @@
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/* { dg-do compile } */
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/* { dg-options "-mno-sse" } */
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void foo ()
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{
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register int zmm_var asm ("ymm9");/* { dg-error "invalid register name" } */
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register int zmm_var2 asm ("23");/* { dg-error "invalid register name" } */
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}
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@ -888,7 +888,7 @@ decode_reg_name_and_count (const char *asmspec, int *pnregs)
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if (asmspec[0] != 0 && i < 0)
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{
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i = atoi (asmspec);
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if (i < FIRST_PSEUDO_REGISTER && i >= 0)
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if (i < FIRST_PSEUDO_REGISTER && i >= 0 && reg_names[i][0])
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return i;
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else
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return -2;
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@ -925,7 +925,8 @@ decode_reg_name_and_count (const char *asmspec, int *pnregs)
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for (i = 0; i < (int) ARRAY_SIZE (table); i++)
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if (table[i].name[0]
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&& ! strcmp (asmspec, table[i].name))
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&& ! strcmp (asmspec, table[i].name)
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&& reg_names[table[i].number][0])
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return table[i].number;
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}
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#endif /* ADDITIONAL_REGISTER_NAMES */
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