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s390.c (addr_generation_dependency_p): Handle SUBREG and STRICT_LOW_PART within SET_DEST.

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* config/s390/s390.c (addr_generation_dependency_p): Handle SUBREG
	and STRICT_LOW_PART within SET_DEST.
	* config/s390/s390.md ("*extractqi", "*extracthi"): New insns with
	splitters, replacing pre-reload splitters.
	("*zero_extendhisi2_31", "*zero_extendqisi2_31",
	"*zero_extendqihi2_31"): New insns.
	("*zero_extendqihi2_64"): Do not clobber CC.

From-SVN: r57309
This commit is contained in:
Ulrich Weigand 2002-09-19 17:06:29 +00:00 • committed by Ulrich Weigand
parent 70b76b34a3
commit cc7ab9b79c
3 changed files with 80 additions and 17 deletions
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10
gcc/ChangeLog
View file

@ -1,3 +1,13 @@
2002-09-19 Ulrich Weigand <uweigand@de.ibm.com>
* config/s390/s390.c (addr_generation_dependency_p): Handle SUBREG
and STRICT_LOW_PART within SET_DEST.
* config/s390/s390.md ("*extractqi", "*extracthi"): New insns with
splitters, replacing pre-reload splitters.
("*zero_extendhisi2_31", "*zero_extendqisi2_31",
"*zero_extendqihi2_31"): New insns.
("*zero_extendqihi2_64"): Do not clobber CC.
2002-09-18 Devang Patel <dpatel@apple.com>
* cp/cp-tree.h: New prototype for walk_vtabls().

6
gcc/config/s390/s390.c
View file

@ -2812,7 +2812,11 @@ addr_generation_dependency_p (dep_rtx, insn)
if (GET_CODE (dep_rtx) == SET)
{
target = SET_DEST (dep_rtx);
if (GET_CODE (target) == STRICT_LOW_PART)
target = XEXP (target, 0);
while (GET_CODE (target) == SUBREG)
target = SUBREG_REG (target);
if (GET_CODE (target) == REG)
{
int regno = REGNO (target);

81
gcc/config/s390/s390.md
View file

@ -1931,13 +1931,16 @@
[(set_attr "op_type" "RS")
(set_attr "atype" "mem")])
(define_split
[(set (match_operand:SI 0 "register_operand" "")
(zero_extract:SI (match_operand:QI 1 "s_operand" "")
(match_operand 2 "const_int_operand" "")
(const_int 0)))]
"!TARGET_64BIT && !reload_completed
(define_insn_and_split "*extractqi"
[(set (match_operand:SI 0 "register_operand" "=d")
(zero_extract:SI (match_operand:QI 1 "s_operand" "Q")
(match_operand 2 "const_int_operand" "n")
(const_int 0)))
(clobber (reg:CC 33))]
"!TARGET_64BIT
&& INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 8"
"#"
"&& reload_completed"
[(parallel
[(set (match_dup 0) (unspec:SI [(match_dup 1)] 10))
(clobber (reg:CC 33))])
@ -1946,15 +1949,20 @@
{
operands[2] = GEN_INT (32 - INTVAL (operands[2]));
operands[1] = change_address (operands[1], QImode, 0);
}")
}"
[(set_attr "type" "o2")
(set_attr "atype" "mem")])
(define_split
[(set (match_operand:SI 0 "register_operand" "")
(zero_extract:SI (match_operand:QI 1 "s_operand" "")
(match_operand 2 "const_int_operand" "")
(const_int 0)))]
"!TARGET_64BIT && !reload_completed
(define_insn_and_split "*extracthi"
[(set (match_operand:SI 0 "register_operand" "=d")
(zero_extract:SI (match_operand:QI 1 "s_operand" "Q")
(match_operand 2 "const_int_operand" "n")
(const_int 0)))
(clobber (reg:CC 33))]
"!TARGET_64BIT
&& INTVAL (operands[2]) >= 8 && INTVAL (operands[2]) < 16"
"#"
"&& reload_completed"
[(parallel
[(set (match_dup 0) (unspec:SI [(match_dup 1)] 10))
(clobber (reg:CC 33))])
@ -1963,7 +1971,9 @@
{
operands[2] = GEN_INT (32 - INTVAL (operands[2]));
operands[1] = change_address (operands[1], HImode, 0);
}")
}"
[(set_attr "type" "o2")
(set_attr "atype" "mem")])
;
; extendsidi2 instruction pattern(s).
@ -2252,6 +2262,21 @@
"llgh\\t%0,%1"
[(set_attr "op_type" "RXE")
(set_attr "atype" "mem")])
(define_insn_and_split "*zero_extendhisi2_31"
[(set (match_operand:SI 0 "register_operand" "=&d")
(zero_extend:SI (match_operand:HI 1 "memory_operand" "Q")))
(clobber (reg:CC 33))]
"!TARGET_64BIT"
"#"
"&& reload_completed"
[(set (match_dup 0) (const_int 0))
(parallel
[(set (strict_low_part (match_dup 2)) (match_dup 1))
(clobber (reg:CC 33))])]
"operands[2] = gen_lowpart (HImode, operands[0]);"
[(set_attr "type" "o2")
(set_attr "atype" "mem")])
;
; zero_extendqisi2 instruction pattern(s).
@ -2276,6 +2301,18 @@
"llgc\\t%0,%1"
[(set_attr "op_type" "RXE")
(set_attr "atype" "mem")])
(define_insn_and_split "*zero_extendqisi2_31"
[(set (match_operand:SI 0 "register_operand" "=&d")
(zero_extend:SI (match_operand:QI 1 "memory_operand" "m")))]
"!TARGET_64BIT"
"#"
"&& reload_completed"
[(set (match_dup 0) (const_int 0))
(set (strict_low_part (match_dup 2)) (match_dup 1))]
"operands[2] = gen_lowpart (QImode, operands[0]);"
[(set_attr "type" "o2")
(set_attr "atype" "mem")])
;
; zero_extendqihi2 instruction pattern(s).
@ -2295,13 +2332,25 @@
(define_insn "*zero_extendqihi2_64"
[(set (match_operand:HI 0 "register_operand" "=d")
(zero_extend:HI (match_operand:QI 1 "memory_operand" "m")))
(clobber (reg:CC 33))]
(zero_extend:HI (match_operand:QI 1 "memory_operand" "m")))]
"TARGET_64BIT"
"llgc\\t%0,%1"
[(set_attr "op_type" "RXE")
(set_attr "atype" "mem")])
(define_insn_and_split "*zero_extendqihi2_31"
[(set (match_operand:HI 0 "register_operand" "=&d")
(zero_extend:HI (match_operand:QI 1 "memory_operand" "m")))]
"!TARGET_64BIT"
"#"
"&& reload_completed"
[(set (match_dup 0) (const_int 0))
(set (strict_low_part (match_dup 2)) (match_dup 1))]
"operands[2] = gen_lowpart (QImode, operands[0]);"
[(set_attr "type" "o2")
(set_attr "atype" "mem")])
;
; fixuns_truncdfdi2 and fix_truncdfsi2 instruction pattern(s).
;