system.h (CASE_USE_BIT_TESTS): Poison.

* system.h (CASE_USE_BIT_TESTS): Poison.
	* stmt.c (CASE_USE_BIT_TESTS): Fold away into its only user ...
	(expand_switch_using_bit_tests_p): ...here.
	* doc/tm.texi.in (CASE_USE_BIT_TESTS): Remove documentation.
	* doc/tm.texi (CASE_USE_BIT_TESTS): Regenerate.

From-SVN: r189078
This commit is contained in:
Steven Bosscher 2012-06-29 14:48:08 +00:00
parent 7211c82f34
commit cc193fba85
5 changed files with 14 additions and 30 deletions

View file

@ -1,3 +1,11 @@
2012-06-29 Steven Bosscher <steven@gcc.gnu.org>
* system.h (CASE_USE_BIT_TESTS): Poison.
* stmt.c (CASE_USE_BIT_TESTS): Fold away into its only user ...
(expand_switch_using_bit_tests_p): ...here.
* doc/tm.texi.in (CASE_USE_BIT_TESTS): Remove documentation.
* doc/tm.texi (CASE_USE_BIT_TESTS): Regenerate.
2012-06-29 Steven Bosscher <steven@gcc.gnu.org>
* system.h (IFCVT_EXTRA_FIELDS): Poison.

View file

@ -10306,16 +10306,6 @@ The default is four for machines with a @code{casesi} instruction and
five otherwise. This is best for most machines.
@end deftypefn
@defmac CASE_USE_BIT_TESTS
Define this macro to be a C expression to indicate whether C switch
statements may be implemented by a sequence of bit tests. This is
advantageous on processors that can efficiently implement left shift
of 1 by the number of bits held in a register, but inappropriate on
targets that would require a loop. By default, this macro returns
@code{true} if the target defines an @code{ashlsi3} pattern, and
@code{false} otherwise.
@end defmac
@defmac WORD_REGISTER_OPERATIONS
Define this macro if operations between registers with integral mode
smaller than a word are always performed on the entire register.

View file

@ -10180,16 +10180,6 @@ The default is four for machines with a @code{casesi} instruction and
five otherwise. This is best for most machines.
@end deftypefn
@defmac CASE_USE_BIT_TESTS
Define this macro to be a C expression to indicate whether C switch
statements may be implemented by a sequence of bit tests. This is
advantageous on processors that can efficiently implement left shift
of 1 by the number of bits held in a register, but inappropriate on
targets that would require a loop. By default, this macro returns
@code{true} if the target defines an @code{ashlsi3} pattern, and
@code{false} otherwise.
@end defmac
@defmac WORD_REGISTER_OPERATIONS
Define this macro if operations between registers with integral mode
smaller than a word are always performed on the entire register.

View file

@ -1722,13 +1722,6 @@ add_case_node (struct case_node *head, tree type, tree low, tree high,
/* Maximum number of case bit tests. */
#define MAX_CASE_BIT_TESTS 3
/* By default, enable case bit tests on targets with ashlsi3. */
#ifndef CASE_USE_BIT_TESTS
#define CASE_USE_BIT_TESTS (optab_handler (ashl_optab, word_mode) \
!= CODE_FOR_nothing)
#endif
/* A case_bit_test represents a set of case nodes that may be
selected from using a bit-wise comparison. HI and LO hold
the integer to be tested against, LABEL contains the label
@ -1888,8 +1881,10 @@ bool
expand_switch_using_bit_tests_p (tree index_expr, tree range,
unsigned int uniq, unsigned int count)
{
return (CASE_USE_BIT_TESTS
&& ! TREE_CONSTANT (index_expr)
if (optab_handler (ashl_optab, word_mode) == CODE_FOR_nothing)
return false;
return (! TREE_CONSTANT (index_expr)
&& compare_tree_int (range, GET_MODE_BITSIZE (word_mode)) < 0
&& compare_tree_int (range, 0) > 0
&& lshift_cheap_p ()

View file

@ -895,7 +895,8 @@ extern void fancy_abort (const char *, int, const char *) ATTRIBUTE_NORETURN;
TARGET_ALIGN_ANON_BITFIELDS TARGET_NARROW_VOLATILE_BITFIELDS \
IDENT_ASM_OP UNALIGNED_SHORT_ASM_OP UNALIGNED_INT_ASM_OP \
UNALIGNED_LONG_ASM_OP UNALIGNED_DOUBLE_INT_ASM_OP \
USE_COMMON_FOR_ONE_ONLY IFCVT_EXTRA_FIELDS IFCVT_INIT_EXTRA_FIELDS
USE_COMMON_FOR_ONE_ONLY IFCVT_EXTRA_FIELDS IFCVT_INIT_EXTRA_FIELDS \
CASE_USE_BIT_TESTS
/* Hooks that are no longer used. */
#pragma GCC poison LANG_HOOKS_FUNCTION_MARK LANG_HOOKS_FUNCTION_FREE \