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arm.md (UNSPEC_RBIT): New constant.

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2009-09-03  Daniel Gutson  <dgutson@codesourcery.com>

	* config/arm/arm.md (UNSPEC_RBIT): New constant.
	(rbitsi2): New insn.
	(ctzsi2): New expand.
	* config/arm/arm.h (CTZ_DEFINED_VALUE_AT_ZERO): New macro.

	testsuite/
	* gcc.target/arm/ctz.c: New test case.

From-SVN: r151402
This commit is contained in:
Daniel Gutson 2009-09-04 02:52:08 +00:00 • committed by Daniel Gutson
parent 9af43ec7a2
commit ca96ed43b2
4 changed files with 44 additions and 0 deletions
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10
gcc/ChangeLog
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@ -1,3 +1,13 @@
2009-09-03 Daniel Gutson <dgutson@codesourcery.com>
* config/arm/arm.md (UNSPEC_RBIT): New constant.
(rbitsi2): New insn.
(ctzsi2): New expand.
* config/arm/arm.h (CTZ_DEFINED_VALUE_AT_ZERO): New macro.
testsuite/
* gcc.target/arm/ctz.c: New test case.
2009-09-03 Martin Jambor <mjambor@suse.cz>
* tree-sra.c (duplicate_expr_for_different_base): Removed.

1
gcc/config/arm/arm.h
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@ -2368,6 +2368,7 @@ extern int making_const_table;
/* The arm5 clz instruction returns 32. */
#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1)
#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1)
#undef ASM_APP_OFF
#define ASM_APP_OFF (TARGET_THUMB1 ? "\t.code\t16\n" : \

21
gcc/config/arm/arm.md
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@ -100,6 +100,7 @@
(UNSPEC_GOTSYM_OFF 24) ; The offset of the start of the the GOT from a
; a given symbolic address.
(UNSPEC_THUMB1_CASESI 25) ; A Thumb1 compressed dispatch-table call.
(UNSPEC_RBIT 26) ; rbit operation.
]
)
@ -10955,6 +10956,26 @@
[(set_attr "predicable" "yes")
(set_attr "insn" "clz")])
(define_insn "rbitsi2"
[(set (match_operand:SI 0 "s_register_operand" "=r")
(unspec:SI [(match_operand:SI 1 "s_register_operand" "r")] UNSPEC_RBIT))]
"TARGET_32BIT && arm_arch_thumb2"
"rbit%?\\t%0, %1"
[(set_attr "predicable" "yes")
(set_attr "insn" "clz")])
(define_expand "ctzsi2"
[(set (match_operand:SI 0 "s_register_operand" "")
(ctz:SI (match_operand:SI 1 "s_register_operand" "")))]
"TARGET_32BIT && arm_arch_thumb2"
"
rtx tmp = gen_reg_rtx (SImode);
emit_insn (gen_rbitsi2 (tmp, operands[1]));
emit_insn (gen_clzsi2 (operands[0], tmp));
DONE;
"
)
;; V5E instructions.
(define_insn "prefetch"

12
gcc/testsuite/gcc.target/arm/ctz.c Normal file
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@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm32 } */
/* { dg-options "-O2 -march=armv6t2" } */
unsigned int functest(unsigned int x)
{
return __builtin_ctz(x);
}
/* { dg-final { scan-assembler "rbit" } } */
/* { dg-final { scan-assembler "clz" } } */
/* { dg-final { scan-assembler-not "rsb" } } */