diff --git a/gcc/config/aarch64/driver-aarch64.cc b/gcc/config/aarch64/driver-aarch64.cc
index b620351e572..abe6e7df7dc 100644
--- a/gcc/config/aarch64/driver-aarch64.cc
+++ b/gcc/config/aarch64/driver-aarch64.cc
@@ -256,9 +256,9 @@ host_detect_local_cpu (int argc, const char **argv)
   bool cpu = false;
   unsigned int i = 0;
   unsigned char imp = INVALID_IMP;
-  unsigned int cores[2] = { INVALID_CORE, INVALID_CORE };
+  unsigned int cores[3] = { INVALID_CORE, INVALID_CORE, INVALID_CORE };
   unsigned int n_cores = 0;
-  unsigned int variants[2] = { ALL_VARIANTS, ALL_VARIANTS };
+  unsigned int variants[3] = { ALL_VARIANTS, ALL_VARIANTS, ALL_VARIANTS };
   unsigned int n_variants = 0;
   bool processed_exts = false;
   aarch64_feature_flags extension_flags = 0;
@@ -314,7 +314,7 @@ host_detect_local_cpu (int argc, const char **argv)
 	  unsigned cvariant = parse_field (buf);
 	  if (!contains_core_p (variants, cvariant))
 	    {
-              if (n_variants == 2)
+	      if (n_variants == 3)
                 goto not_found;
 
               variants[n_variants++] = cvariant;
@@ -326,7 +326,7 @@ host_detect_local_cpu (int argc, const char **argv)
 	  unsigned ccore = parse_field (buf);
 	  if (!contains_core_p (cores, ccore))
 	    {
-	      if (n_cores == 2)
+	      if (n_cores == 3)
 		goto not_found;
 
 	      cores[n_cores++] = ccore;
@@ -383,11 +383,15 @@ host_detect_local_cpu (int argc, const char **argv)
   /* Weird cpuinfo format that we don't know how to handle.  */
   if (n_cores == 0
       || n_cores > 2
-      || (n_cores == 1 && n_variants != 1)
       || imp == INVALID_IMP
       || !processed_exts)
     goto not_found;
 
+  /* If we have one core type but multiple variants, consider
+     that as one variant with ALL_VARIANTS instead.  */
+  if (n_cores == 1 && n_variants != 1)
+    variants[0] = ALL_VARIANTS;
+
   /* Simple case, one core type or just looking for the arch. */
   if (n_cores == 1 || arch)
     {
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_25 b/gcc/testsuite/gcc.target/aarch64/cpunative/info_25
new file mode 100644
index 00000000000..d6e83ccab09
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_25
@@ -0,0 +1,17 @@
+processor	: 0
+BogoMIPS	: 38.40
+Features	: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 asimdfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint i8mm bf16 rng bti ecv afp rpres
+CPU implementer	: 0x51
+CPU architecture: 8
+CPU variant	: 0x2
+CPU part	: 0x001
+CPU revision	: 1
+
+processor	: 1
+BogoMIPS	: 38.40
+Features	: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 asimdfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint i8mm bf16 rng bti ecv afp rpres
+CPU implementer	: 0x51
+CPU architecture: 8
+CPU variant	: 0x1
+CPU part	: 0x001
+CPU revision	: 1
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_26 b/gcc/testsuite/gcc.target/aarch64/cpunative/info_26
new file mode 100644
index 00000000000..7631baf3239
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_26
@@ -0,0 +1,26 @@
+processor	: 0
+BogoMIPS	: 38.40
+Features	: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 asimdfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint i8mm bf16 rng bti ecv afp rpres
+CPU implementer	: 0x51
+CPU architecture: 8
+CPU variant	: 0x2
+CPU part	: 0x001
+CPU revision	: 1
+
+processor	: 1
+BogoMIPS	: 38.40
+Features	: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 asimdfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint i8mm bf16 rng bti ecv afp rpres
+CPU implementer	: 0x51
+CPU architecture: 8
+CPU variant	: 0x1
+CPU part	: 0x001
+CPU revision	: 1
+
+processor	: 2
+BogoMIPS	: 38.40
+Features	: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 asimdfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint i8mm bf16 rng bti ecv afp rpres
+CPU implementer	: 0x51
+CPU architecture: 8
+CPU variant	: 0x2
+CPU part	: 0x001
+CPU revision	: 1
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_25.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_25.c
new file mode 100644
index 00000000000..05c88a2edc8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_25.c
@@ -0,0 +1,11 @@
+/* { dg-do compile { target { { aarch64*-*-linux*} && native } } } */
+/* { dg-set-compiler-env-var GCC_CPUINFO "$srcdir/gcc.target/aarch64/cpunative/info_25" } */
+/* { dg-additional-options "-mcpu=native --save-temps " } */
+
+int main()
+{
+  return 0;
+}
+
+/* { dg-final { scan-assembler {\.arch armv8.6-a\+rng\+sm4\+crc\+aes\+sha3\+fp16} } } */
+/* Test that SoC with cores of 2 variants work.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_26.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_26.c
new file mode 100644
index 00000000000..4eb943d5204
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_26.c
@@ -0,0 +1,11 @@
+/* { dg-do compile { target { { aarch64*-*-linux*} && native } } } */
+/* { dg-set-compiler-env-var GCC_CPUINFO "$srcdir/gcc.target/aarch64/cpunative/info_26" } */
+/* { dg-additional-options "-mcpu=native --save-temps " } */
+
+int main()
+{
+  return 0;
+}
+
+/* { dg-final { scan-assembler {\.arch armv8.6-a\+rng\+sm4\+crc\+aes\+sha3\+fp16} } } */
+/* Test that SoC with cores of 3 variants work.  */
\ No newline at end of file