arm: Call thumb1_gen_const_int from thumb1_movsi_insn

thumb1_movsi_insn used the same algorithm to build a constant in asm
than thumb1_gen_const_int_1 does in RTL. Since the previous patch added
support for asm generation in thumb1_gen_const_int_1, this patch calls
it from thumb1_movsi_insn to avoid duplication.

We need to introduce a new proxy function, thumb1_gen_const_int_print
to select the right template.

This patch also adds a new testcase as the updated alternative is only
used by thumb-1 processors that also support movt/movw.

2020-11-02  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/
	* config/arm/thumb1.md (thumb1_movsi_insn): Call
	thumb1_gen_const_int_print.
	* config/arm/arm-protos.h (thumb1_gen_const_int_print): Add
	prototype.
	* config/arm/arm.c (thumb1_gen_const_int_print): New.

	gcc/testsuite/
	* gcc.target/arm/pure-code/no-literal-pool-m23.c: New.
This commit is contained in:
Christophe Lyon 2020-11-02 14:39:52 +00:00
parent 011f5e92f8
commit c7f49e0579
4 changed files with 184 additions and 34 deletions

View file

@ -75,6 +75,7 @@ extern int const_ok_for_arm (HOST_WIDE_INT);
extern int const_ok_for_op (HOST_WIDE_INT, enum rtx_code);
extern int const_ok_for_dimode_op (HOST_WIDE_INT, enum rtx_code);
extern void thumb1_gen_const_int_rtl (rtx, HOST_WIDE_INT);
extern void thumb1_gen_const_int_print (rtx, HOST_WIDE_INT);
extern int arm_split_constant (RTX_CODE, machine_mode, rtx,
HOST_WIDE_INT, rtx, rtx, int);
extern int legitimate_pic_operand_p (rtx);

View file

@ -28414,7 +28414,7 @@ thumb1_gen_const_int_1 (T dst, HOST_WIDE_INT op1)
}
}
/* Proxy for thumb1.md, since the thumb1_const_print and
/* Proxies for thumb1.md, since the thumb1_const_print and
thumb1_const_rtl classes are not exported. */
void
thumb1_gen_const_int_rtl (rtx dst, HOST_WIDE_INT op1)
@ -28423,6 +28423,13 @@ thumb1_gen_const_int_rtl (rtx dst, HOST_WIDE_INT op1)
thumb1_gen_const_int_1 (t, op1);
}
void
thumb1_gen_const_int_print (rtx dst, HOST_WIDE_INT op1)
{
thumb1_const_print t (asm_out_file, REGNO (dst));
thumb1_gen_const_int_1 (t, op1);
}
/* Output code to add DELTA to the first argument, and then jump
to FUNCTION. Used for C++ multiple inheritance. */

View file

@ -688,40 +688,11 @@
}
else if (GET_CODE (operands[1]) == CONST_INT)
{
int i;
HOST_WIDE_INT op1 = INTVAL (operands[1]);
bool mov_done_p = false;
rtx ops[2];
ops[0] = operands[0];
/* Emit upper 3 bytes if needed. */
for (i = 0; i < 3; i++)
{
int byte = (op1 >> (8 * (3 - i))) & 0xff;
if (byte)
{
ops[1] = GEN_INT (byte);
if (mov_done_p)
output_asm_insn ("adds\t%0, %1", ops);
else
output_asm_insn ("movs\t%0, %1", ops);
mov_done_p = true;
}
if (mov_done_p)
output_asm_insn ("lsls\t%0, #8", ops);
}
/* Emit lower byte if needed. */
ops[1] = GEN_INT (op1 & 0xff);
if (!mov_done_p)
output_asm_insn ("movs\t%0, %1", ops);
else if (op1 & 0xff)
output_asm_insn ("adds\t%0, %1", ops);
return "";
thumb1_gen_const_int_print (operands[0], INTVAL (operands[1]));
return \"\";
}
gcc_unreachable ();
gcc_unreachable ();
case 8: return "ldr\t%0, %1";
case 9: return "str\t%1, %0";

View file

@ -0,0 +1,171 @@
/* { dg-do compile } */
/* { dg-options "-mpure-code -mcpu=cortex-m23 -march=armv8-m.base -mthumb" } */
/* { dg-final { check-function-bodies "**" "" } } */
/*
** testi:
** ...
** movs r[0-3], #1
** lsls r[0-3], #13
** rsbs r[0-3], #0
** ...
*/
int
testi (int *p)
{
if (*p > 0x12345678)
return *p-8192;
else
return *p+8192;
}
/* Does not use thumb1_gen_const_int.
** test_0:
** ...
** movs r[0-3], #0
** ...
*/
int
test_0 ()
{
return 0;
}
/* Does not use thumb1_gen_const_int.
** test_128:
** ...
** movs r[0-3], #128
** ...
*/
int
test_128 ()
{
return 128;
}
/* Does not use thumb1_gen_const_int.
** test_264:
** ...
** movw r[0-3], #264
** ...
*/
int
test_264 ()
{
return 264;
}
/* Does not use thumb1_gen_const_int.
** test_510:
** ...
** movw r[0-3], #510
** ...
*/
int
test_510 ()
{
return 510;
}
/* Does not use thumb1_gen_const_int.
** test_512:
** ...
** movw r[0-3], #512
** ...
*/
int
test_512 ()
{
return 512;
}
/* Does not use thumb1_gen_const_int.
** test_764:
** ...
** movw r[0-3], #764
** ...
*/
int
test_764 ()
{
return 764;
}
/* Does not use thumb1_gen_const_int.
** test_65536:
** ...
** movs r[0-3], #128
** lsls r[0-3], r[0-3], #9
** ...
*/
int
test_65536 ()
{
return 65536;
}
/* Does not use thumb1_gen_const_int.
** test_0x123456:
** ...
** movw r[0-3], #13398
** movt r[0-3], 18
** ...
*/
int
test_0x123456 ()
{
return 0x123456;
}
/* Does not use thumb1_gen_const_int.
** test_0x1123456:
** ...
** movw r[0-3], #13398
** movt r[0-3], 274
** ...
*/
int
test_0x1123456 ()
{
return 0x1123456;
}
/* Does not use thumb1_gen_const_int.
** test_0x1000010:
** ...
** movs r[0-3], #16
** movt r[0-3], 256
** ...
*/
int
test_0x1000010 ()
{
return 0x1000010;
}
/* Does not use thumb1_gen_const_int.
** test_0x1000011:
** ...
** movs r[0-3], #17
** movt r[0-3], 256
** ...
*/
int
test_0x1000011 ()
{
return 0x1000011;
}
/*
** test_m8192:
** ...
** movs r[0-3], #1
** lsls r[0-3], #13
** rsbs r[0-3], #0
** ...
*/
int
test_m8192 ()
{
return -8192;
}