diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e67aacafd80..238f6f0fdeb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,15 +1,22 @@ +2011-03-24 Uros Bizjak + + PR target/48237 + * config/i386/i386.md (*movdf_internal_rex64): Do not split + alternatives that can be handled with movq or movabsq insn. + (*movdf_internal): Disable for !TARGET_64BIT. + (*movdf_internal_nointeger): Ditto. + * config/i386/i386.c (ix86_print_operand): Handle DFmode immediates. + 2011-03-24 Nathan Froyd * system.h (FUNCTION_ARG, FUNCTION_INCOMING_ARG): Poison. (FUNCTION_ARG_ADVANCE): Likewise. * tm.texi.in: Change references to them to hook references. * tm.texi: Regenerate. - * targhooks.c (default_function_arg): Eliminate check for target - macro. + * targhooks.c (default_function_arg): Eliminate check for target macro. (default_function_incoming_arg): Likewise. (default_function_arg_advance): Likewise. - * target.def (function_arg, function_incoming_arg): Change to - DEFHOOK. + * target.def (function_arg, function_incoming_arg): Change to DEFHOOK. (function_arg_advance): Likewise. * target-def.h: Eliminate FUNCTION_INCOMING_ARG check. @@ -22,8 +29,7 @@ 2011-03-24 Diego Novillo * lto-opts.c (input_data_block): Move to lto-streamer-in.c. - * lto-streamer-in.c (input_string_internal): Add clarifying - comments. + * lto-streamer-in.c (input_string_internal): Add clarifying comments. (lto_input_data_block): Move from lto-opts.c. Make extern. Update all users. (lto_input_string): Rename from input_string. Make extern. @@ -134,8 +140,7 @@ 2011-03-23 Richard Guenther - * tree-stdarg.c (va_list_counter_bump): Handle bumps via - MEM_REF. + * tree-stdarg.c (va_list_counter_bump): Handle bumps via MEM_REF. (check_va_list_escapes): Likewise. (check_all_va_list_escapes): Likewise. @@ -332,10 +337,8 @@ (v850_handle_option): Access target_flags via opts pointer. Don't assert that global structures are in use. Update calls to v850_handle_memory_option. - (v850_encode_data_area): Update references to small memory - settings. - * config/v850/v850.h (struct small_memory_info, small_memory): - Remove. + (v850_encode_data_area): Update references to small memory settings. + * config/v850/v850.h (struct small_memory_info, small_memory): Remove. (enum small_memory_type): Move to v850-opts.h. * config/v850/v850.opt (config/v850/v850-opts.h): New HeaderInclude entry. @@ -425,8 +428,7 @@ * config/iq2000/iq2000-opts.h: New. * config/iq2000/iq2000.c: Don't include opts.h. (iq2000_tune, iq2000_handle_option, TARGET_HANDLE_OPTION): Remove. - * config/iq2000/iq2000.h (enum processor_type, iq2000_tune): - Remove. + * config/iq2000/iq2000.h (enum processor_type, iq2000_tune): Remove. * config/iq2000/iq2000.opt (config/iq2000/iq2000-opts.h): New HeaderInclude entry. (iq2000_tune): New Variable entry. @@ -458,8 +460,7 @@ (frv_cpu_type): Remove. * config/frv/frv.c: Don't include opts.h. (frv_cpu_type, frv_handle_option, TARGET_HANDLE_OPTION): Remove. - * config/frv/frv.opt (config/frv/frv-opts.h): New HeaderInclude - entry. + * config/frv/frv.opt (config/frv/frv-opts.h): New HeaderInclude entry. (frv_cpu_type): New Variable entry. (frv_cpu): New Enum and EnumValue entries. @@ -480,8 +481,7 @@ not bfin_lib_id_given. (bfin_handle_option): Don't set bfin_lib_id_given. Access bfin_cpu_type, bfin_si_revision and bfin_workarounds via opts - pointer. Use error_at. Don't assert that global structures are in - use. + pointer. Use error_at. Don't assert that global structures are in use. * config/bfin/bfin.h: Include bfin-opts.h. (enum bfin_cpu_type, bfin_cpu_t): Move to bfin-opts.h. (bfin_cpu_type, bfin_si_revision, bfin_workarounds): Remove. @@ -496,8 +496,7 @@ or -msoft-float here. * config/arm/arm.h (CPP_SPEC): Handle -mfloat-abi=*, not -msoft-float and -mhard-float. - (OPTION_DEFAULT_SPECS): Don't handle -mhard-float and - -msoft-float. + (OPTION_DEFAULT_SPECS): Don't handle -mhard-float and -msoft-float. * config/arm/coff.h (MULTILIB_DEFAULTS): Use mfloat-abi=soft, not msoft-float. * config/arm/elf.h (ASM_SPEC): Don't handle -mhard-float and @@ -557,8 +556,7 @@ global structures are in use. (ix86_function_specific_save, ix86_function_specific_restore): Update ix86_isa_flags_explicit field name. - * config/i386/i386.opt (ix86_isa_flags_explicit): New Variable - entry. + * config/i386/i386.opt (ix86_isa_flags_explicit): New Variable entry. (ix86_isa_flags_explicit): Rename TargetSave entry to x_ix86_isa_flags_explicit. @@ -813,8 +811,7 @@ macro. (default_function_incoming_arg): Likewise. (default_function_arg_advance): Likewise. - * target.def (function_arg, function_incoming_arg): Change to - DEFHOOK. + * target.def (function_arg, function_incoming_arg): Change to DEFHOOK. (function_arg_advance): Likewise. * target-def.h: Eliminate FUNCTION_INCOMING_ARG check. @@ -890,7 +887,8 @@ * function.c (safe_insn_predicate, assign_parm_setup_reg): Likewise. * optabs.c (can_compare_p, prepare_cmp_insn): Likewise. (emit_cmp_and_jump_insn_1, gen_add2_insn, gen_add3_insn): Likewise. - (have_add2_insn, gen_sub2_insn, gen_sub3_insn, have_sub2_insn): Likewise. + (have_add2_insn, gen_sub2_insn, gen_sub3_insn, have_sub2_insn): + Likewise. (gen_cond_trap): Likewise. (prepare_operand): Likewise. Change icode to an insn_code. (insn_operand_matches): New function. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 88ae3d709cd..17f09757253 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -14398,17 +14398,26 @@ ix86_print_operand (FILE *file, rtx x, int code) fprintf (file, "0x%08x", (unsigned int) l); } - /* These float cases don't actually occur as immediate operands. */ else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode) { - char dstr[30]; + REAL_VALUE_TYPE r; + long l[2]; - real_to_decimal (dstr, CONST_DOUBLE_REAL_VALUE (x), sizeof (dstr), 0, 1); - fputs (dstr, file); + REAL_VALUE_FROM_CONST_DOUBLE (r, x); + REAL_VALUE_TO_TARGET_DOUBLE (r, l); + + if (ASSEMBLER_DIALECT == ASM_ATT) + putc ('$', file); + /* We can use %d if the number is <32 bits and positive. */ + if (l[1] || l[0] < 0) + fprintf (file, "0x%lx%08lx", + (unsigned long) l[1], (unsigned long) l[0]); + else + fprintf (file, HOST_WIDE_INT_PRINT_DEC, l[0]); } - else if (GET_CODE (x) == CONST_DOUBLE - && GET_MODE (x) == XFmode) + /* These float cases don't actually occur as immediate operands. */ + else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == XFmode) { char dstr[30]; diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index c2901decdf3..b74136368ae 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -2915,9 +2915,9 @@ (define_insn "*movdf_internal_rex64" [(set (match_operand:DF 0 "nonimmediate_operand" - "=f,m,f,r ,m ,Y2*x,Y2*x,Y2*x,m ,Yi,r ") + "=f,m,f,r ,m,!r,!m,Y2*x,Y2*x,Y2*x,m ,Yi,r ") (match_operand:DF 1 "general_operand" - "fm,f,G,rmF,Fr,C ,Y2*x,m ,Y2*x,r ,Yi"))] + "fm,f,G,rm,r,F ,F ,C ,Y2*x,m ,Y2*x,r ,Yi"))] "TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1])) && (reload_in_progress || reload_completed || (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE) @@ -2938,9 +2938,15 @@ case 3: case 4: - return "#"; + return "mov{q}\t{%1, %0|%0, %1}"; case 5: + return "movabs{q}\t{%1, %0|%0, %1}"; + + case 6: + return "#"; + + case 7: switch (get_attr_mode (insn)) { case MODE_V4SF: @@ -2958,9 +2964,9 @@ default: gcc_unreachable (); } - case 6: - case 7: case 8: + case 9: + case 10: switch (get_attr_mode (insn)) { case MODE_V4SF: @@ -2995,17 +3001,27 @@ gcc_unreachable (); } - case 9: - case 10: + case 11: + case 12: return "%vmovd\t{%1, %0|%0, %1}"; default: gcc_unreachable(); } } - [(set_attr "type" "fmov,fmov,fmov,multi,multi,sselog1,ssemov,ssemov,ssemov,ssemov,ssemov") + [(set_attr "type" "fmov,fmov,fmov,imov,imov,imov,multi,sselog1,ssemov,ssemov,ssemov,ssemov,ssemov") + (set (attr "modrm") + (if_then_else + (and (eq_attr "alternative" "5") (eq_attr "type" "imov")) + (const_string "0") + (const_string "*"))) + (set (attr "length_immediate") + (if_then_else + (and (eq_attr "alternative" "5") (eq_attr "type" "imov")) + (const_string "8") + (const_string "*"))) (set (attr "prefix") - (if_then_else (eq_attr "alternative" "0,1,2,3,4") + (if_then_else (eq_attr "alternative" "0,1,2,3,4,5,6") (const_string "orig") (const_string "maybe_vex"))) (set (attr "prefix_data16") @@ -3015,18 +3031,18 @@ (set (attr "mode") (cond [(eq_attr "alternative" "0,1,2") (const_string "DF") - (eq_attr "alternative" "3,4,9,10") + (eq_attr "alternative" "3,4,5,6,11,12") (const_string "DI") /* For SSE1, we have many fewer alternatives. */ (eq (symbol_ref "TARGET_SSE2") (const_int 0)) - (cond [(eq_attr "alternative" "5,6") + (cond [(eq_attr "alternative" "7,8") (const_string "V4SF") ] (const_string "V2SF")) /* xorps is one byte shorter. */ - (eq_attr "alternative" "5") + (eq_attr "alternative" "7") (cond [(ne (symbol_ref "optimize_function_for_size_p (cfun)") (const_int 0)) (const_string "V4SF") @@ -3041,7 +3057,7 @@ chains, otherwise use short move to avoid extra work. movaps encodes one byte shorter. */ - (eq_attr "alternative" "6") + (eq_attr "alternative" "8") (cond [(ne (symbol_ref "optimize_function_for_size_p (cfun)") (const_int 0)) @@ -3054,7 +3070,7 @@ /* For architectures resolving dependencies on register parts we may avoid extra work to zero out upper part of register. */ - (eq_attr "alternative" "7") + (eq_attr "alternative" "9") (if_then_else (ne (symbol_ref "TARGET_SSE_SPLIT_REGS") (const_int 0)) @@ -3068,7 +3084,7 @@ "=f,m,f,r ,o ,Y2*x,Y2*x,Y2*x,m ") (match_operand:DF 1 "general_operand" "fm,f,G,roF,Fr,C ,Y2*x,m ,Y2*x"))] - "!(MEM_P (operands[0]) && MEM_P (operands[1])) + "!TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1])) && optimize_function_for_speed_p (cfun) && TARGET_INTEGER_DFMODE_MOVES && (reload_in_progress || reload_completed @@ -3208,9 +3224,9 @@ "=f,m,f,*r ,o ,Y2*x,Y2*x,Y2*x ,m ") (match_operand:DF 1 "general_operand" "fm,f,G,*roF,*Fr,C ,Y2*x,mY2*x,Y2*x"))] - "!(MEM_P (operands[0]) && MEM_P (operands[1])) - && ((optimize_function_for_size_p (cfun) - || !TARGET_INTEGER_DFMODE_MOVES) && !TARGET_64BIT) + "!TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1])) + && (optimize_function_for_size_p (cfun) + || !TARGET_INTEGER_DFMODE_MOVES) && (reload_in_progress || reload_completed || (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE) || (!(TARGET_SSE2 && TARGET_SSE_MATH) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0d331be99f7..6b9b249d9d6 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2011-03-24 Uros Bizjak + + PR target/48237 + * gcc.target/i386/pr48237.c: New test. + 2011-03-24 Richard Guenther PR middle-end/48269 @@ -328,7 +333,7 @@ 2011-03-15 Rodrigo Rivas Costa - * g++.dg/cpp0x/constexpr-attribute.C: New. + * g++.dg/cpp0x/constexpr-attribute.C: New. 2011-03-15 Manuel López-Ibáñez diff --git a/gcc/testsuite/gcc.target/i386/pr48237.c b/gcc/testsuite/gcc.target/i386/pr48237.c new file mode 100644 index 00000000000..e20446eab04 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr48237.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-O -fcaller-saves -fschedule-insns2 -fselective-scheduling2 -mtune=core2" } */ + +union double_union +{ + double d; + int i[2]; +}; + +void bar (int, ...); + +void +foo (double d) +{ + union double_union du = { d }; + while (1) + { + du.i[1] -= 0x100000L; + bar (0, du.d); + du.d += d; + } +}