rtl-optimization/54052 - RTL SSA PHI insertion compile-time hog
The following tries to address the PHI insertion compile-time hog in RTL fwprop observed with the PR54052 testcase where the loop computing the "unfiltered" set of variables possibly needing PHI nodes for each block exhibits quadratic compile-time and memory-use. It does so by pruning the local DEFs with LR_OUT of the block, removing regs that can never be LR_IN (defined by this block) in the dominance frontier. PR rtl-optimization/54052 * rtl-ssa/blocks.cc (function_info::place_phis): Filter local defs by LR_OUT.
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1 changed files with 6 additions and 1 deletions
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@ -645,7 +645,12 @@ function_info::place_phis (build_info &bi)
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if (bitmap_empty_p (&frontiers[b1]))
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continue;
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bitmap b1_def = &DF_LR_BB_INFO (BASIC_BLOCK_FOR_FN (m_fn, b1))->def;
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// Defs in B1 that are possibly in LR_IN in the dominance frontier
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// blocks.
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auto_bitmap b1_def;
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bitmap_and (b1_def, &DF_LR_BB_INFO (BASIC_BLOCK_FOR_FN (m_fn, b1))->def,
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DF_LR_OUT (BASIC_BLOCK_FOR_FN (m_fn, b1)));
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bitmap_iterator bmi;
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unsigned int b2;
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EXECUTE_IF_SET_IN_BITMAP (&frontiers[b1], 0, b2, bmi)
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