rs6000.c (rs6000_emit_sISEL): Let rs6000_emit_int_cmove do all the work.
* config/rs6000/rs6000.c (rs6000_emit_sISEL): Let rs6000_emit_int_cmove do all the work. (rs6000_emit_int_cmove): Use function pointers for insn generation. Don't force values into registers unnecessarily. (output_isel): Assert that we're not given conditions we can't handle. Delete corresponding code. * config/rs6000/rs6000.md (isel_signed_<mode>): Use scc_comparison_operator constraint. Permit 0 for the consequent operand. Permit any GPR for the alternative operand. (isel_unsigned_<mode>): Likewise. From-SVN: r162263
This commit is contained in:
Nathan Froyd
Nathan Froyd
parent
8d63d4055e
commit
c5af628dbe
3 changed files with 59 additions and 77 deletions
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@ -1,3 +1,16 @@
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2010-07-16 Nathan Froyd <froydnj@codesourcery.com>
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* config/rs6000/rs6000.c (rs6000_emit_sISEL): Let rs6000_emit_int_cmove
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do all the work.
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(rs6000_emit_int_cmove): Use function pointers for insn generation.
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Don't force values into registers unnecessarily.
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(output_isel): Assert that we're not given conditions we can't handle.
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Delete corresponding code.
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* config/rs6000/rs6000.md (isel_signed_<mode>): Use
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scc_comparison_operator constraint. Permit 0 for the consequent
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operand. Permit any GPR for the alternative operand.
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(isel_unsigned_<mode>): Likewise.
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2010-07-16 Jakub Jelinek <jakub@redhat.com>
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PR target/44942
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@ -15997,53 +15997,12 @@ rs6000_generate_compare (rtx cmp, enum machine_mode mode)
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}
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/* Emit the RTL for an sCOND pattern. */
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/* Emit the RTL for an sISEL pattern. */
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void
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rs6000_emit_sISEL (enum machine_mode mode, rtx operands[])
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rs6000_emit_sISEL (enum machine_mode mode ATTRIBUTE_UNUSED, rtx operands[])
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{
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rtx condition_rtx;
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enum machine_mode op_mode;
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enum rtx_code cond_code;
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rtx result = operands[0];
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condition_rtx = rs6000_generate_compare (operands[1], mode);
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cond_code = GET_CODE (condition_rtx);
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op_mode = GET_MODE (XEXP (operands[1], 0));
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if (op_mode == VOIDmode)
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op_mode = GET_MODE (XEXP (operands[1], 1));
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if (TARGET_POWERPC64 && GET_MODE (result) == DImode)
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{
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PUT_MODE (condition_rtx, DImode);
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if (cond_code == GEU || cond_code == GTU || cond_code == LEU
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|| cond_code == LTU)
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emit_insn (gen_isel_unsigned_di (result, condition_rtx,
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force_reg (DImode, const1_rtx),
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force_reg (DImode, const0_rtx),
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XEXP (condition_rtx, 0)));
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else
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emit_insn (gen_isel_signed_di (result, condition_rtx,
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force_reg (DImode, const1_rtx),
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force_reg (DImode, const0_rtx),
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XEXP (condition_rtx, 0)));
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}
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else
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{
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PUT_MODE (condition_rtx, SImode);
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if (cond_code == GEU || cond_code == GTU || cond_code == LEU
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|| cond_code == LTU)
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emit_insn (gen_isel_unsigned_si (result, condition_rtx,
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force_reg (SImode, const1_rtx),
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force_reg (SImode, const0_rtx),
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XEXP (condition_rtx, 0)));
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else
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emit_insn (gen_isel_signed_si (result, condition_rtx,
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force_reg (SImode, const1_rtx),
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force_reg (SImode, const0_rtx),
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XEXP (condition_rtx, 0)));
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}
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rs6000_emit_int_cmove (operands[0], operands[1], const1_rtx, const0_rtx);
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}
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void
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@ -16710,6 +16669,9 @@ rs6000_emit_int_cmove (rtx dest, rtx op, rtx true_cond, rtx false_cond)
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{
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rtx condition_rtx, cr;
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enum machine_mode mode = GET_MODE (dest);
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enum rtx_code cond_code;
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rtx (*isel_func) (rtx, rtx, rtx, rtx, rtx);
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bool signedp;
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if (mode != SImode && (!TARGET_POWERPC64 || mode != DImode))
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return 0;
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@ -16718,27 +16680,37 @@ rs6000_emit_int_cmove (rtx dest, rtx op, rtx true_cond, rtx false_cond)
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compare, it just looks at the CRx bits set by a previous compare
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instruction. */
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condition_rtx = rs6000_generate_compare (op, mode);
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cond_code = GET_CODE (condition_rtx);
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cr = XEXP (condition_rtx, 0);
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signedp = GET_MODE (cr) == CCmode;
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if (mode == SImode)
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isel_func = (mode == SImode
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? (signedp ? gen_isel_signed_si : gen_isel_unsigned_si)
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: (signedp ? gen_isel_signed_di : gen_isel_unsigned_di));
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switch (cond_code)
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{
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if (GET_MODE (cr) == CCmode)
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emit_insn (gen_isel_signed_si (dest, condition_rtx,
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true_cond, false_cond, cr));
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else
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emit_insn (gen_isel_unsigned_si (dest, condition_rtx,
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true_cond, false_cond, cr));
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}
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else
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{
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if (GET_MODE (cr) == CCmode)
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emit_insn (gen_isel_signed_di (dest, condition_rtx,
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true_cond, false_cond, cr));
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else
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emit_insn (gen_isel_unsigned_di (dest, condition_rtx,
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true_cond, false_cond, cr));
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case LT: case GT: case LTU: case GTU: case EQ:
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/* isel handles these directly. */
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break;
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default:
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/* We need to swap the sense of the comparison. */
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{
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rtx t = true_cond;
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true_cond = false_cond;
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false_cond = t;
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PUT_CODE (condition_rtx, reverse_condition (cond_code));
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}
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break;
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}
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false_cond = force_reg (mode, false_cond);
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if (true_cond != const0_rtx)
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true_cond = force_reg (mode, true_cond);
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emit_insn (isel_func (dest, condition_rtx, true_cond, false_cond, cr));
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return 1;
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}
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@ -16748,13 +16720,10 @@ output_isel (rtx *operands)
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enum rtx_code code;
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code = GET_CODE (operands[1]);
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if (code == GE || code == GEU || code == LE || code == LEU || code == NE)
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{
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PUT_CODE (operands[1], reverse_condition (code));
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return "isel %0,%3,%2,%j1";
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}
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else
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return "isel %0,%2,%3,%j1";
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gcc_assert (!(code == GE || code == GEU || code == LE || code == LEU || code == NE));
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return "isel %0,%2,%3,%j1";
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}
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void
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@ -6091,13 +6091,13 @@
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;; change the mode underneath our feet and then gets confused trying
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;; to reload the value.
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(define_insn "isel_signed_<mode>"
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[(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
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[(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r")
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(if_then_else:GPR
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(match_operator 1 "comparison_operator"
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[(match_operand:CC 4 "cc_reg_operand" "y")
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(match_operator 1 "scc_comparison_operator"
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[(match_operand:CC 4 "cc_reg_operand" "y,y")
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(const_int 0)])
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(match_operand:GPR 2 "gpc_reg_operand" "b")
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(match_operand:GPR 3 "gpc_reg_operand" "b")))]
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(match_operand:GPR 2 "reg_or_cint_operand" "O,b")
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(match_operand:GPR 3 "gpc_reg_operand" "r,r")))]
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"TARGET_ISEL<sel>"
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"*
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{ return output_isel (operands); }"
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@ -6105,13 +6105,13 @@
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(set_attr "length" "4")])
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(define_insn "isel_unsigned_<mode>"
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[(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
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[(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r")
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(if_then_else:GPR
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(match_operator 1 "comparison_operator"
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[(match_operand:CCUNS 4 "cc_reg_operand" "y")
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(match_operator 1 "scc_comparison_operator"
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[(match_operand:CCUNS 4 "cc_reg_operand" "y,y")
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(const_int 0)])
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(match_operand:GPR 2 "gpc_reg_operand" "b")
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(match_operand:GPR 3 "gpc_reg_operand" "b")))]
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(match_operand:GPR 2 "reg_or_cint_operand" "O,b")
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(match_operand:GPR 3 "gpc_reg_operand" "r,r")))]
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"TARGET_ISEL<sel>"
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"*
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{ return output_isel (operands); }"
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