re PR target/71559 (ICE in ix86_fp_cmp_code_to_pcmp_immediate, at config/i386/i386.c:23042 (KNL/AVX512))
PR target/71559 * config/i386/i386.c (ix86_fp_cmp_code_to_pcmp_immediate): Fix up returned values and add UN*/LTGT/*ORDERED cases with values matching D operand modifier on vcmp for AVX. * gcc.target/i386/sse2-pr71559.c: New test. * gcc.target/i386/avx-pr71559.c: New test. * gcc.target/i386/avx512f-pr71559.c: New test. From-SVN: r237614
This commit is contained in:
Jakub Jelinek
Jakub Jelinek
parent
f1b5abfbbb
commit
c4ff221ea8
6 changed files with 124 additions and 5 deletions
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2016-06-20 Jakub Jelinek <jakub@redhat.com>
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PR target/71559
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* config/i386/i386.c (ix86_fp_cmp_code_to_pcmp_immediate): Fix up
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returned values and add UN*/LTGT/*ORDERED cases with values matching
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D operand modifier on vcmp for AVX.
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2016-06-20 Wilco Dijkstra <wdijkstr@arm.com>
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* config/aarch64/aarch64.opt
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@ -23622,17 +23622,33 @@ ix86_fp_cmp_code_to_pcmp_immediate (enum rtx_code code)
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switch (code)
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{
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case EQ:
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return 0x08;
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return 0x00;
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case NE:
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return 0x04;
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case GT:
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return 0x16;
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return 0x0e;
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case LE:
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return 0x1a;
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return 0x02;
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case GE:
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return 0x15;
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return 0x0d;
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case LT:
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return 0x19;
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return 0x01;
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case UNLE:
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return 0x0a;
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case UNLT:
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return 0x09;
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case UNGE:
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return 0x05;
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case UNGT:
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return 0x06;
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case UNEQ:
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return 0x18;
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case LTGT:
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return 0x0c;
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case ORDERED:
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return 0x07;
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case UNORDERED:
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return 0x03;
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default:
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gcc_unreachable ();
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}
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@ -1,3 +1,10 @@
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2016-06-20 Jakub Jelinek <jakub@redhat.com>
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PR target/71559
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* gcc.target/i386/sse2-pr71559.c: New test.
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* gcc.target/i386/avx-pr71559.c: New test.
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* gcc.target/i386/avx512f-pr71559.c: New test.
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2016-06-20 Tobias Burnus <burnus@net-b.de>
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PR fortran/71194
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8
gcc/testsuite/gcc.target/i386/avx-pr71559.c
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8
gcc/testsuite/gcc.target/i386/avx-pr71559.c
Normal file
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@ -0,0 +1,8 @@
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/* PR target/71559 */
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/* { dg-do run { target avx } } */
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/* { dg-options "-O2 -ftree-vectorize -mavx" } */
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#include "avx-check.h"
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#define PR71559_TEST avx_test
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#include "sse2-pr71559.c"
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8
gcc/testsuite/gcc.target/i386/avx512f-pr71559.c
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8
gcc/testsuite/gcc.target/i386/avx512f-pr71559.c
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/* PR target/71559 */
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/* { dg-do run { target avx512f } } */
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/* { dg-options "-O2 -ftree-vectorize -mavx512f" } */
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#include "avx512f-check.h"
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#define PR71559_TEST avx512f_test
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#include "sse2-pr71559.c"
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73
gcc/testsuite/gcc.target/i386/sse2-pr71559.c
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73
gcc/testsuite/gcc.target/i386/sse2-pr71559.c
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@ -0,0 +1,73 @@
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/* PR target/71559 */
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/* { dg-do run { target sse2 } } */
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/* { dg-options "-O2 -ftree-vectorize -msse2" } */
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#ifndef PR71559_TEST
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#include "sse2-check.h"
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#define PR71559_TEST sse2_test
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#endif
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#define N 16
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float a[N] = { 5.0f, -3.0f, 1.0f, __builtin_nanf (""), 9.0f, 7.0f, -3.0f, -9.0f,
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-3.0f, -5.0f, -9.0f, __builtin_nanf (""), 0.5f, -0.5f, 0.0f, 0.0f };
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float b[N] = { -5.0f, 3.0f, 1.0f, 7.0f, 8.0f, 8.0f, -3.0f, __builtin_nanf (""),
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-4.0f, -4.0f, -9.0f, __builtin_nanf (""), 0.0f, 0.0f, 0.0f, __builtin_nanf ("") };
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int c[N], d[N];
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#define FN(name, op) \
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void \
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name (void) \
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{ \
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int i; \
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for (i = 0; i < N; i++) \
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c[i] = (op || d[i] > 37) ? 5 : 32; \
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}
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FN (eq, a[i] == b[i])
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FN (ne, a[i] != b[i])
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FN (gt, a[i] > b[i])
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FN (ge, a[i] >= b[i])
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FN (lt, a[i] < b[i])
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FN (le, a[i] <= b[i])
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FN (unle, !__builtin_isgreater (a[i], b[i]))
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FN (unlt, !__builtin_isgreaterequal (a[i], b[i]))
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FN (unge, !__builtin_isless (a[i], b[i]))
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FN (ungt, !__builtin_islessequal (a[i], b[i]))
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FN (uneq, !__builtin_islessgreater (a[i], b[i]))
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FN (ordered, !__builtin_isunordered (a[i], b[i]))
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FN (unordered, __builtin_isunordered (a[i], b[i]))
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#define TEST(name, GT, LT, EQ, UO) \
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name (); \
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for (i = 0; i < N; i++) \
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{ \
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int v; \
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switch (i % 4) \
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{ \
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case 0: v = GT ? 5 : 32; break; \
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case 1: v = LT ? 5 : 32; break; \
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case 2: v = EQ ? 5 : 32; break; \
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case 3: v = UO ? 5 : 32; break; \
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} \
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if (c[i] != v) \
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__builtin_abort (); \
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}
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void
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PR71559_TEST (void)
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{
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int i;
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asm volatile ("" : : "g" (a), "g" (b), "g" (c), "g" (d) : "memory");
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TEST (eq, 0, 0, 1, 0)
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TEST (ne, 1, 1, 0, 1)
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TEST (gt, 1, 0, 0, 0)
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TEST (ge, 1, 0, 1, 0)
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TEST (lt, 0, 1, 0, 0)
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TEST (le, 0, 1, 1, 0)
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TEST (unle, 0, 1, 1, 1)
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TEST (unlt, 0, 1, 0, 1)
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TEST (unge, 1, 0, 1, 1)
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TEST (ungt, 1, 0, 0, 1)
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TEST (uneq, 0, 0, 1, 1)
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TEST (ordered, 1, 1, 1, 0)
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TEST (unordered, 0, 0, 0, 1)
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}
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