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invoke.texi (MN10300 Options): Document -mno-crt0.

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* doc/invoke.texi (MN10300 Options): Document -mno-crt0.
(SH Options): Document -mieee.
* doc/install.texi (Final install): Remove obsolete information
about installing cross compilers.
* doc/gcc.1: Rebuilt.

From-SVN: r43164
This commit is contained in:
Alexandre Oliva 2001-06-11 01:03:12 +00:00 • committed by Alexandre Oliva
parent 61c7194612
commit c474f76beb
4 changed files with 60 additions and 33 deletions
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10
gcc/ChangeLog
View file

@ -1,3 +1,11 @@
2001-06-10 Alexandre Oliva <aoliva@redhat.com>
* doc/invoke.texi (MN10300 Options): Document -mno-crt0.
(SH Options): Document -mieee.
* doc/install.texi (Final install): Remove obsolete information
about installing cross compilers.
* doc/gcc.1: Rebuilt.
2001-06-10 Richard Henderson <rth@redhat.com>
* config/alpha/alpha.c (override_options): Set align_loops,
@ -85,8 +93,6 @@ Sun Jun 10 10:00:17 CEST 2001 Jan Hubicka <jh@suse.cz>
-print-multi-lib.
* doc/gcc.1: Rebuilt.
2001-06-09 Alexandre Oliva <aoliva@redhat.com>
* toplev.c (independent_decode_option): Require `=' between
`-aux-info' and filename in the same argument.
* gcc.c: Don't pass -aux-info=filename twice.

47
gcc/doc/gcc.1
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@ -1,5 +1,5 @@
.\" Automatically generated by Pod::Man version 1.15
.\" Sat Jun 9 21:33:22 2001
.\" Sun Jun 10 22:02:47 2001
.\"
.\" Standard preamble:
.\" ======================================================================
@ -138,7 +138,7 @@
.\" ======================================================================
.\"
.IX Title "GCC 1"
.TH GCC 1 "gcc-3.1" "2001-06-09" "GNU"
.TH GCC 1 "gcc-3.1" "2001-06-10" "GNU"
.UC
.SH "NAME"
gcc \- \s-1GNU\s0 project C and \*(C+ compiler
@ -293,7 +293,7 @@ in the following sections.
\&\-fkeep-static-consts \-fmove-all-movables
\&\-fno-default-inline \-fno-defer-pop
\&\-fno-function-cse \-fno-guess-branch-probability
\&\-fno-inline \-fno-math-errno \-fno-peephole
\&\-fno-inline \-fno-math-errno \-fno-peephole \-fno-peephole2
\&\-funsafe-math-optimizations \-fno-trapping-math
\&\-fomit-frame-pointer \-foptimize-register-move
\&\-foptimize-sibling-calls \-freduce-all-givs
@ -413,11 +413,9 @@ in the following sections.
.Sp
\&\fI\s-1MN10300\s0 Options\fR
.Sp
\&\fB\-mmult-bug
\&\-mno-mult-bug
\&\-mam33
\&\-mno-am33
\&\-mrelax\fR
\&\fB\-mmult-bug \-mno-mult-bug
\&\-mam33 \-mno-am33
\&\-mno-crt0 \-mrelax\fR
.Sp
\&\fIM32R/D Options\fR
.Sp
@ -541,9 +539,8 @@ in the following sections.
\&\-m4\-nofpu \-m4\-single-only \-m4\-single \-m4
\&\-mb \-ml \-mdalign \-mrelax
\&\-mbigtable \-mfmovd \-mhitachi \-mnomacsave
\&\-misize \-mpadstruct \-mspace
\&\-mprefergot
\&\-musermode\fR
\&\-mieee \-misize \-mpadstruct \-mspace
\&\-mprefergot \-musermode\fR
.Sp
\&\fISystem V Options\fR
.Sp
@ -599,8 +596,9 @@ in the following sections.
.Ip "\fICode Generation Options\fR" 4
.IX Item "Code Generation Options"
\&\fB\-fcall-saved-\fR\fIreg\fR \fB\-fcall-used-\fR\fIreg\fR
\&\fB\-fexceptions \-funwind-tables \-ffixed-\fR\fIreg\fR
\&\fB\-finhibit-size-directive \-finstrument-functions
\&\fB\-ffixed-\fR\fIreg\fR \fB\-fexceptions
\&\-fnon-call-exceptions \-funwind-tables
\&\-finhibit-size-directive \-finstrument-functions
\&\-fcheck-memory-usage \-fprefix-function-name
\&\-fno-common \-fno-ident \-fno-gnu-linker
\&\-fpcc-struct-return \-fpic \-fPIC
@ -3201,7 +3199,14 @@ We're very interested in code that runs \fIslower\fR
when these options are \fIenabled\fR.
.Ip "\fB\-fno-peephole\fR" 4
.IX Item "-fno-peephole"
Disable any machine-specific peephole optimizations.
.PD 0
.Ip "\fB\-fno-peephole2\fR" 4
.IX Item "-fno-peephole2"
.PD
Disable any machine-specific peephole optimizations. The difference
between \fB\-fno-peephole\fR and \fB\-fno-peephole2\fR is in how they
are implemented in the compiler; some targets use one, some use the
other, a few use both.
.Ip "\fB\-fbranch-probabilities\fR" 4
.IX Item "-fbranch-probabilities"
After running a program compiled with \fB\-fprofile-arcs\fR, you can compile it a second time using
@ -4941,6 +4946,9 @@ Generate code which uses features specific to the \s-1AM33\s0 processor.
.IX Item "-mno-am33"
Do not generate code which uses features specific to the \s-1AM33\s0 processor. This
is the default.
.Ip "\fB\-mno-crt0\fR" 4
.IX Item "-mno-crt0"
Do not link in the C run-time initialization object file.
.Ip "\fB\-mrelax\fR" 4
.IX Item "-mrelax"
Indicate to the linker that it should perform a relaxation optimization pass
@ -6851,6 +6859,9 @@ Comply with the calling conventions defined by Hitachi.
.IX Item "-mnomacsave"
Mark the \f(CW\*(C`MAC\*(C'\fR register as call-clobbered, even if
\&\fB\-mhitachi\fR is given.
.Ip "\fB\-mieee\fR" 4
.IX Item "-mieee"
Increase IEEE-compliance of floating-point code.
.Ip "\fB\-misize\fR" 4
.IX Item "-misize"
Dump instruction size and location in the assembly code.
@ -7548,6 +7559,14 @@ to enable this option when compiling C code that needs to interoperate
properly with exception handlers written in \*(C+. You may also wish to
disable this option if you are compiling older \*(C+ programs that don't
use exception handling.
.Ip "\fB\-fnon-call-exceptions\fR" 4
.IX Item "-fnon-call-exceptions"
Generate code that allows trapping instructions to throw exceptions.
Note that this requires platform-specific runtime support that does
not exist everywhere. Moreover, it only allows \fItrapping\fR
instructions to throw exceptions, i.e. memory references or floating
point instructions. It does not allow exceptions to be thrown from
arbitrary signal handlers such as \f(CW\*(C`SIGALRM\*(C'\fR.
.Ip "\fB\-funwind-tables\fR" 4
.IX Item "-funwind-tables"
Similar to \fB\-fexceptions\fR, except that it will just generate any needed

15
gcc/doc/install.texi
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@ -33,7 +33,7 @@
@settitle Installing GCC: Binaries
@end ifset
@comment $Id: install.texi,v 1.15 2001/06/03 19:06:55 jsm28 Exp $
@comment $Id: install.texi,v 1.16 2001/06/04 22:56:52 ljrittle Exp $
@c Copyright (C) 2001 Free Software Foundation, Inc.
@c *** Converted to texinfo by Dean Wakerley, dean@wakerley.com
@ -958,10 +958,7 @@ should look here first if you think your results are unreasonable.
@end ifnothtml
Now that GCC has been built and tested, you can install it with
@samp{cd @var{objdir}; make install} for a native compiler or
@samp{cd @var{objdir}; make install LANGUAGES="c c++"} for
a cross compiler (note installing cross compilers will be easier in the
next release!).
@samp{cd @var{objdir}; make install}.
That step completes the installation of GCC; user level binaries can
be found in @file{@var{prefix}/bin} where @var{prefix} is the value you
@ -969,14 +966,14 @@ specified with the @option{--prefix} to configure (or @file{/usr/local}
by default).
If you don't mind, please quickly review the
@uref{http://gcc.gnu.org/gcc-2.95/buildstat.html,,build status page}.
@uref{http://gcc.gnu.org/gcc-3.0/buildstat.html,,build status page}.
If your system is not listed, send a note to
@uref{mailto:gcc@@gcc.gnu.org,,gcc@@gcc.gnu.org} indicating
that you successfully built and installed GCC.
Include the output from running @file{@var{srcdir}/config.guess}. (Do not
send us the config.guess file itself, just the output from running
it!)
Include the output from running @file{@var{srcdir}/config.guess}. (Do
not send us the config.guess file itself, just the one-line output from
running it!)
If you find a bug, please report it following our
@uref{../bugs.html,,bug reporting guidelines}.

21
gcc/doc/invoke.texi
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@ -394,11 +394,9 @@ in the following sections.
@emph{MN10300 Options}
@gccoptlist{
-mmult-bug @gol
-mno-mult-bug @gol
-mam33 @gol
-mno-am33 @gol
-mrelax}
-mmult-bug -mno-mult-bug @gol
-mam33 -mno-am33 @gol
-mno-crt0 -mrelax}
@emph{M32R/D Options}
@gccoptlist{
@ -522,9 +520,8 @@ in the following sections.
-m4-nofpu -m4-single-only -m4-single -m4 @gol
-mb -ml -mdalign -mrelax @gol
-mbigtable -mfmovd -mhitachi -mnomacsave @gol
-misize -mpadstruct -mspace @gol
-mprefergot
-musermode}
-mieee -misize -mpadstruct -mspace @gol
-mprefergot -musermode}
@emph{System V Options}
@gccoptlist{
@ -6102,6 +6099,10 @@ Generate code which uses features specific to the AM33 processor.
Do not generate code which uses features specific to the AM33 processor. This
is the default.
@item -mno-crt0
@opindex mno-crt0
Do not link in the C run-time initialization object file.
@item -mrelax
@opindex mrelax
Indicate to the linker that it should perform a relaxation optimization pass
@ -8154,6 +8155,10 @@ Comply with the calling conventions defined by Hitachi.
Mark the @code{MAC} register as call-clobbered, even if
@option{-mhitachi} is given.
@item -mieee
@opindex mieee
Increase IEEE-compliance of floating-point code.
@item -misize
@opindex misize
Dump instruction size and location in the assembly code.