m68hc11.md ("bitcmpqi"): New pattern for bitb instruction.
* config/m68hc11/m68hc11.md ("bitcmpqi"): New pattern for bitb instruction. ("bitcmpqi2"): New pattern for bit-extract and test. ("bitcmphi"): New pattern for bitb/bita instructions. From-SVN: r41812
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2001-05-03 Stephane Carrez <Stephane.Carrez@worldnet.fr>
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* config/m68hc11/m68hc11.md ("bitcmpqi"): New pattern for bitb
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instruction.
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("bitcmpqi2"): New pattern for bit-extract and test.
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("bitcmphi"): New pattern for bitb/bita instructions.
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2001-05-03 Joseph S. Myers <jsm28@cam.ac.uk>
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* gccbug.in: Use a temporary directory when the mktemp command is
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@ -383,6 +383,87 @@
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DONE;
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}")
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(define_insn "bitcmpqi"
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[(set (cc0)
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(and:QI (match_operand:QI 0 "tst_operand" "d,d,d")
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(match_operand:QI 1 "cmp_operand" "im,*A,u")))]
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""
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"@
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bitb\\t%1
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#
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bitb\\t%1")
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(define_insn "bitcmpqi_z_used"
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[(set (cc0)
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(and:QI (match_operand:QI 0 "tst_operand" "d")
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(match_operand:QI 1 "cmp_operand" "m")))
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(use (match_operand:HI 2 "hard_reg_operand" "xy"))
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(use (reg:HI 11))]
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""
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"#")
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(define_split /* "bitcmpqi_z_used" */
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[(set (cc0)
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(and:QI (match_operand:QI 0 "tst_operand" "d")
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(match_operand:QI 1 "cmp_operand" "m")))
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(use (match_operand:HI 2 "hard_reg_operand" "xy"))
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(use (reg:HI 11))]
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"z_replacement_completed == 2"
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[(set (mem:HI (pre_dec:HI (reg:HI 3))) (match_dup 2))
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(set (match_dup 2) (match_dup 3))
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(set (cc0) (and:QI (match_dup 0) (match_dup 1)))
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(set (match_dup 2) (mem:HI (post_inc:HI (reg:HI 3))))]
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"operands[3] = gen_rtx (REG, HImode, SOFT_Z_REGNUM);")
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(define_insn "bitcmphi"
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[(set (cc0)
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(and:HI (match_operand:HI 0 "tst_operand" "d")
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(match_operand:HI 1 "const_int_operand" "i")))]
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"(INTVAL (operands[1]) & 0x0ff) == 0
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|| (INTVAL (operands[1]) & 0x0ff00) == 0"
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"*
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{
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if ((INTVAL (operands[1]) & 0x0ff) == 0)
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return \"bita\\t%h1\";
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else
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return \"bitb\\t%1\";
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}")
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(define_insn "bitcmpqi_12"
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[(set (cc0)
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(zero_extract (match_operand:HI 0 "tst_operand" "d")
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(match_operand:HI 1 "const_int_operand" "i")
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(match_operand:HI 2 "const_int_operand" "i")))]
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"(unsigned) (INTVAL (operands[2]) + INTVAL (operands[1])) <= 8
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|| (((unsigned) (INTVAL (operands[2]) + INTVAL (operands[1])) <= 16)
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&& (unsigned) INTVAL (operands[2]) >= 8)"
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"*
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{
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rtx ops[1];
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int mask;
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int startpos = INTVAL (operands[2]);
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int bitsize = INTVAL (operands[1]);
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if (startpos >= 8)
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{
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startpos -= 8;
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mask = (1 << (startpos + bitsize)) - 1;
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mask &= ~((1 << startpos) - 1);
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ops[0] = GEN_INT (mask);
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output_asm_insn (\"bita\\t%0\", ops);
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}
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else
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{
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mask = (1 << (startpos + bitsize)) - 1;
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mask &= ~((1 << startpos) - 1);
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ops[0] = GEN_INT (mask);
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output_asm_insn (\"bitb\\t%0\", ops);
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}
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return \"\";
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}")
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(define_insn "cmpqi_1"
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[(set (cc0)
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(compare (match_operand:QI 0 "tst_operand" "d,d,*x*y,*x*y")
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