libgcc, aarch64: Allow for BE platforms in heap trampolines.

This arranges that the byte order of the instruction sequences is
independent of the byte order of memory.

libgcc/ChangeLog:

	* config/aarch64/heap-trampoline.c
	(aarch64_trampoline_insns): Arrange to encode instructions as a
	byte array so that the order is independent of memory byte order.
	(struct aarch64_trampoline): Likewise.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
This commit is contained in:
Iain Sandoe 2024-02-18 06:52:47 +00:00
parent 0a6a5f8656
commit c0a80af4a1

View file

@ -30,23 +30,23 @@ void __gcc_nested_func_ptr_created (void *chain, void *func, void *dst);
void __gcc_nested_func_ptr_deleted (void);
#if defined(__linux__)
static const uint32_t aarch64_trampoline_insns[] = {
0xd503245f, /* hint 34 */
0x580000b1, /* ldr x17, .+20 */
0x580000d2, /* ldr x18, .+24 */
0xd61f0220, /* br x17 */
0xd5033f9f, /* dsb sy */
0xd5033fdf /* isb */
static const unsigned char aarch64_trampoline_insns[6][4] = {
{0x5f, 0x24, 0x03, 0xd5}, /* hint 34 */
{0xb1, 0x00, 0x00, 0x58}, /* ldr x17, .+20 */
{0xd2, 0x00, 0x00, 0x58}, /* ldr x18, .+24 */
{0x20, 0x02, 0x1f, 0xd6}, /* br x17 */
{0x9f, 0x3f, 0x03, 0xd5}, /* dsb sy */
{0xdf, 0x3f, 0x03, 0xd5} /* isb */
};
#elif __APPLE__
static const uint32_t aarch64_trampoline_insns[] = {
0xd503245f, /* hint 34 */
0x580000b1, /* ldr x17, .+20 */
0x580000d0, /* ldr x16, .+24 */
0xd61f0220, /* br x17 */
0xd5033f9f, /* dsb sy */
0xd5033fdf /* isb */
static const unsigned char aarch64_trampoline_insns[6][4] = {
{0x5f, 0x24, 0x03, 0xd5}, /* hint 34 */
{0xb1, 0x00, 0x00, 0x58}, /* ldr x17, .+20 */
{0xd0, 0x00, 0x00, 0x58}, /* ldr x16, .+24 */
{0x20, 0x02, 0x1f, 0xd6}, /* br x17 */
{0x9f, 0x3f, 0x03, 0xd5}, /* dsb sy */
{0xdf, 0x3f, 0x03, 0xd5} /* isb */
};
#else
@ -54,7 +54,7 @@ static const uint32_t aarch64_trampoline_insns[] = {
#endif
struct aarch64_trampoline {
uint32_t insns[6];
unsigned char insns[6][4];
void *func_ptr;
void *chain_ptr;
};