i386: Improve code generation for vector __builtin_signbit (x.x[i]) ? -1 : 0 [PR112816]
On the testcase I've recently fixed I've noticed bad code generation, we emit pxor %xmm1, %xmm1 psrld $31, %xmm0 pcmpeqd %xmm1, %xmm0 pcmpeqd %xmm1, %xmm0 or vpxor %xmm1, %xmm1, %xmm1 vpsrld $31, %xmm0, %xmm0 vpcmpeqd %xmm1, %xmm0, %xmm0 vpcmpeqd %xmm1, %xmm0, %xmm2 rather than psrad $31, %xmm2 or vpsrad $31, %xmm1, %xmm2 The following patch fixes that using a combiner splitter. 2023-12-05 Jakub Jelinek <jakub@redhat.com> PR target/112816 * config/i386/sse.md ((eq (eq (lshiftrt x elt_bits-1) 0) 0)): New splitter to turn psrld $31; pcmpeq; pcmpeq into psrad $31. * gcc.target/i386/pr112816.c: New test.
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@ -16614,6 +16614,18 @@
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DONE;
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})
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(define_split
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[(set (match_operand:VI248_AVX2 0 "register_operand")
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(eq:VI248_AVX2
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(eq:VI248_AVX2
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(lshiftrt:VI248_AVX2
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(match_operand:VI248_AVX2 1 "register_operand")
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(match_operand:SI 2 "const_int_operand"))
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(match_operand:VI248_AVX2 3 "const0_operand"))
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(match_operand:VI248_AVX2 4 "const0_operand")))]
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"INTVAL (operands[2]) == GET_MODE_PRECISION (<ssescalarmode>mode) - 1"
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[(set (match_dup 0) (ashiftrt:VI248_AVX2 (match_dup 1) (match_dup 2)))])
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(define_expand "rotlv1ti3"
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[(set (match_operand:V1TI 0 "register_operand")
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(rotate:V1TI
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27
gcc/testsuite/gcc.target/i386/pr112816.c
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27
gcc/testsuite/gcc.target/i386/pr112816.c
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@ -0,0 +1,27 @@
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/* PR target/112816 */
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/* { dg-do compile } */
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/* { dg-options "-O2 -mno-avx512f -masm=att" } */
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/* { dg-final { scan-assembler-times "psrad\t\\\$31," 2 } } */
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/* { dg-final { scan-assembler-not "pcmpeqd\t" } } */
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#define N 4
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struct S { float x[N]; };
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struct T { int x[N]; };
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__attribute__((target ("no-sse3,sse2"))) struct T
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foo (struct S x)
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{
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struct T res;
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for (int i = 0; i < N; ++i)
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res.x[i] = __builtin_signbit (x.x[i]) ? -1 : 0;
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return res;
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}
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__attribute__((target ("avx2"))) struct T
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bar (struct S x)
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{
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struct T res;
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for (int i = 0; i < N; ++i)
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res.x[i] = __builtin_signbit (x.x[i]) ? -1 : 0;
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return res;
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}
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