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sse.md (HALFMASKMODE): New attribute.

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gcc/

	* config/i386/sse.md (HALFMASKMODE): New attribute.
	(DOUBLEMASKMODE): New attribute.
	(vec_pack_trunc_qi): New.
	(vec_pack_trunc_<mode>): New.
	(vec_unpacks_lo_hi): New.
	(vec_unpacks_lo_si): New.
	(vec_unpacks_lo_di): New.
	(vec_unpacks_hi_hi): New.
	(vec_unpacks_hi_<mode>): New.

gcc/testsuite/

	* gcc.target/i386/mask-pack.c: New test.
	* gcc.target/i386/mask-unpack.c: New test.

From-SVN: r230104
This commit is contained in:
Ilya Enkovich 2015-11-10 12:19:42 +00:00 • committed by Ilya Enkovich
parent e6f5c25d91
commit bea408857a
5 changed files with 272 additions and 0 deletions
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12
gcc/ChangeLog
View file

@ -1,3 +1,15 @@
2015-11-10 Ilya Enkovich <enkovich.gnu@gmail.com>
* config/i386/sse.md (HALFMASKMODE): New attribute.
(DOUBLEMASKMODE): New attribute.
(vec_pack_trunc_qi): New.
(vec_pack_trunc_<mode>): New.
(vec_unpacks_lo_hi): New.
(vec_unpacks_lo_si): New.
(vec_unpacks_lo_di): New.
(vec_unpacks_hi_hi): New.
(vec_unpacks_hi_<mode>): New.
2015-11-10 Ilya Enkovich <enkovich.gnu@gmail.com>
* optabs.c (expand_binop_directly): Allow scalar mode for

55
gcc/config/i386/sse.md
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@ -799,6 +799,14 @@
[(V32QI "t") (V16HI "t") (V8SI "t") (V4DI "t") (V8SF "t") (V4DF "t")
(V64QI "g") (V32HI "g") (V16SI "g") (V8DI "g") (V16SF "g") (V8DF "g")])
;; Half mask mode for unpacks
(define_mode_attr HALFMASKMODE
[(DI "SI") (SI "HI")])
;; Double mask mode for packs
(define_mode_attr DOUBLEMASKMODE
[(HI "SI") (SI "DI")])
;; Include define_subst patterns for instructions with mask
(include "subst.md")
@ -11578,6 +11586,23 @@
DONE;
})
(define_expand "vec_pack_trunc_qi"
[(set (match_operand:HI 0 ("register_operand"))
(ior:HI (ashift:HI (zero_extend:HI (match_operand:QI 1 ("register_operand")))
(const_int 8))
(zero_extend:HI (match_operand:QI 2 ("register_operand")))))]
"TARGET_AVX512F")
(define_expand "vec_pack_trunc_<mode>"
[(set (match_operand:<DOUBLEMASKMODE> 0 ("register_operand"))
(ior:<DOUBLEMASKMODE> (ashift:<DOUBLEMASKMODE> (zero_extend:<DOUBLEMASKMODE> (match_operand:SWI24 1 ("register_operand")))
(match_dup 3))
(zero_extend:<DOUBLEMASKMODE> (match_operand:SWI24 2 ("register_operand")))))]
"TARGET_AVX512BW"
{
operands[3] = GEN_INT (GET_MODE_BITSIZE (<MODE>mode));
})
(define_insn "<sse2_avx2>_packsswb<mask_name>"
[(set (match_operand:VI1_AVX512 0 "register_operand" "=x,x")
(vec_concat:VI1_AVX512
@ -13474,12 +13499,42 @@
"TARGET_SSE2"
"ix86_expand_sse_unpack (operands[0], operands[1], true, false); DONE;")
(define_expand "vec_unpacks_lo_hi"
[(set (match_operand:QI 0 "register_operand")
(subreg:QI (match_operand:HI 1 "register_operand") 0))]
"TARGET_AVX512DQ")
(define_expand "vec_unpacks_lo_si"
[(set (match_operand:HI 0 "register_operand")
(subreg:HI (match_operand:SI 1 "register_operand") 0))]
"TARGET_AVX512F")
(define_expand "vec_unpacks_lo_di"
[(set (match_operand:SI 0 "register_operand")
(subreg:SI (match_operand:DI 1 "register_operand") 0))]
"TARGET_AVX512BW")
(define_expand "vec_unpacku_hi_<mode>"
[(match_operand:<sseunpackmode> 0 "register_operand")
(match_operand:VI124_AVX2_24_AVX512F_1_AVX512BW 1 "register_operand")]
"TARGET_SSE2"
"ix86_expand_sse_unpack (operands[0], operands[1], true, true); DONE;")
(define_expand "vec_unpacks_hi_hi"
[(set (subreg:HI (match_operand:QI 0 "register_operand") 0)
(lshiftrt:HI (match_operand:HI 1 "register_operand")
(const_int 8)))]
"TARGET_AVX512F")
(define_expand "vec_unpacks_hi_<mode>"
[(set (subreg:SWI48x (match_operand:<HALFMASKMODE> 0 "register_operand") 0)
(lshiftrt:SWI48x (match_operand:SWI48x 1 "register_operand")
(match_dup 2)))]
"TARGET_AVX512BW"
{
operands[2] = GEN_INT (GET_MODE_BITSIZE (<HALFMASKMODE>mode));
})
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Miscellaneous

5
gcc/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2015-11-10 Ilya Enkovich <enkovich.gnu@gmail.com>
* gcc.target/i386/mask-pack.c: New test.
* gcc.target/i386/mask-unpack.c: New test.
2015-11-10 Ilya Enkovich <enkovich.gnu@gmail.com>
* gcc.target/i386/avx2-vec-mask-bit-not.c: New test.

100
gcc/testsuite/gcc.target/i386/mask-pack.c Normal file
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@ -0,0 +1,100 @@
/* { dg-do compile } */
/* { dg-options "-mavx512bw -O3 -fopenmp-simd -fdump-tree-vect-details" } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 10 "vect" } } */
/* { dg-final { scan-assembler-not "maskmov" } } */
#define LENGTH 1000
long l1[LENGTH], l2[LENGTH];
int i1[LENGTH], i2[LENGTH];
short s1[LENGTH], s2[LENGTH];
char c1[LENGTH], c2[LENGTH];
double d1[LENGTH], d2[LENGTH];
int test1 (int n)
{
int i;
#pragma omp simd safelen(16)
for (i = 0; i < LENGTH; i++)
if (l1[i] > l2[i])
i1[i] = 1;
}
int test2 (int n)
{
int i;
#pragma omp simd safelen(16)
for (i = 0; i < LENGTH; i++)
if (i1[i] > i2[i])
s1[i] = 1;
}
int test3 (int n)
{
int i;
#pragma omp simd safelen(16)
for (i = 0; i < LENGTH; i++)
if (s1[i] > s2[i])
c1[i] = 1;
}
int test4 (int n)
{
int i;
#pragma omp simd safelen(16)
for (i = 0; i < LENGTH; i++)
if (d1[i] > d2[i])
c1[i] = 1;
}
int test5 (int n)
{
int i;
#pragma omp simd safelen(16)
for (i = 0; i < LENGTH; i++)
i1[i] = l1[i] > l2[i] ? 3 : 4;
}
int test6 (int n)
{
int i;
#pragma omp simd safelen(16)
for (i = 0; i < LENGTH; i++)
s1[i] = i1[i] > i2[i] ? 3 : 4;
}
int test7 (int n)
{
int i;
#pragma omp simd safelen(16)
for (i = 0; i < LENGTH; i++)
c1[i] = s1[i] > s2[i] ? 3 : 4;
}
int test8 (int n)
{
int i;
#pragma omp simd safelen(16)
for (i = 0; i < LENGTH; i++)
c1[i] = d1[i] > d2[i] ? 3 : 4;
}
int test9 (int n)
{
int i;
#pragma omp simd safelen(16)
for (i = 0; i < LENGTH; i++)
if (l1[i] > l2[i] && i1[i] < i2[i])
c1[i] = 1;
}
int test10 (int n)
{
int i;
#pragma omp simd safelen(16)
for (i = 0; i < LENGTH; i++)
if (l1[i] > l2[i] && i1[i] < i2[i])
c1[i] = 1;
else
c1[i] = 2;
}

100
gcc/testsuite/gcc.target/i386/mask-unpack.c Normal file
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@ -0,0 +1,100 @@
/* { dg-do compile } */
/* { dg-options "-mavx512bw -mavx512dq -O3 -fopenmp-simd -fdump-tree-vect-details" } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 10 "vect" } } */
/* { dg-final { scan-assembler-not "maskmov" } } */
#define LENGTH 1000
long l1[LENGTH], l2[LENGTH];
int i1[LENGTH], i2[LENGTH];
short s1[LENGTH], s2[LENGTH];
char c1[LENGTH], c2[LENGTH];
double d1[LENGTH], d2[LENGTH];
int test1 ()
{
int i;
#pragma omp simd safelen(16)
for (i = 0; i < LENGTH; i++)
if (i1[i] > i2[i])
l1[i] = 1;
}
int test2 (int n)
{
int i;
#pragma omp simd safelen(32)
for (i = 0; i < LENGTH; i++)
if (s1[i] > s2[i])
i1[i] = 1;
}
int test3 (int n)
{
int i;
#pragma omp simd safelen(32)
for (i = 0; i < LENGTH; i++)
if (c1[i] > c2[i])
s1[i] = 1;
}
int test4 (int n)
{
int i;
#pragma omp simd safelen(32)
for (i = 0; i < LENGTH; i++)
if (c1[i] > c2[i])
d1[i] = 1;
}
int test5 (int n)
{
int i;
#pragma omp simd safelen(32)
for (i = 0; i < LENGTH; i++)
l1[i] = i1[i] > i2[i] ? 1 : 2;
}
int test6 (int n)
{
int i;
#pragma omp simd safelen(32)
for (i = 0; i < LENGTH; i++)
i1[i] = s1[i] > s2[i] ? 1 : 2;
}
int test7 (int n)
{
int i;
#pragma omp simd safelen(32)
for (i = 0; i < LENGTH; i++)
s1[i] = c1[i] > c2[i] ? 1 : 2;
}
int test8 (int n)
{
int i;
#pragma omp simd safelen(32)
for (i = 0; i < LENGTH; i++)
d1[i] = c1[i] > c2[i] ? 1 : 2;
}
int test9 (int n)
{
int i;
#pragma omp simd safelen(16)
for (i = 0; i < LENGTH; i++)
if (c1[i] > c2[i] && i1[i] < i2[i])
l1[i] = 1;
}
int test10 (int n)
{
int i;
#pragma omp simd safelen(16)
for (i = 0; i < LENGTH; i++)
if (c1[i] > c2[i] && i1[i] < i2[i])
l1[i] = 1;
else
l1[i] = 2;
}