optabs.c (expand_float): Convert unsigned integer as signed only if it provides sufficient accuracy...
gcc/ * optabs.c (expand_float): Convert unsigned integer as signed only if it provides sufficient accuracy; add mode argument to real_2expN. (expand_fix): Fix comment typos; extend binary float into mode wider than destination for converion to unsigned integer; add mode argument to real_2expN. * real.c (real_2expN): Add mode argument to special-case decimal float values. * real.h (real_2expN): Ditto. * fixed-value.c (check_real_for_fixed_mode): Add mode argument to real_2expN. (fixed_from_string): Ditto. (fixed_to_decimal): Ditto. (fixed_convert_from_real): Ditto. (real_convert_from_fixed): Ditto. * config/rs6000/rs6000.md (FP): Include DD and TD modes. * config/rs6000/dfp.md (extendddtd2, adddd3, addtd3, subdd3, subtd3, muldd3, multd3, divdd3, divtd3, cmpdd_internal1, cmptd_internal1, floatditd2, ftruncdd2, fixdddi2, ftrunctd2, fixddi2): New. gcc/testsuite/ * gcc.target/powerpc/dfp-dd.c: New test. * gcc.target/powerpc/dfp-td.c: New test. From-SVN: r128156
This commit is contained in:
Janis Johnson
Janis Johnson
parent
7336815f6f
commit
be677dc12a
10 changed files with 268 additions and 19 deletions
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@ -1,3 +1,24 @@
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2007-09-05 Janis Johnson <janis187@us.ibm.com>
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* optabs.c (expand_float): Convert unsigned integer as signed only
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if it provides sufficient accuracy; add mode argument to real_2expN.
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(expand_fix): Fix comment typos; extend binary float into mode
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wider than destination for converion to unsigned integer; add mode
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argument to real_2expN.
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* real.c (real_2expN): Add mode argument to special-case decimal
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float values.
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* real.h (real_2expN): Ditto.
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* fixed-value.c (check_real_for_fixed_mode): Add mode argument to
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real_2expN.
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(fixed_from_string): Ditto.
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(fixed_to_decimal): Ditto.
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(fixed_convert_from_real): Ditto.
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(real_convert_from_fixed): Ditto.
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* config/rs6000/rs6000.md (FP): Include DD and TD modes.
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* config/rs6000/dfp.md (extendddtd2, adddd3, addtd3, subdd3, subtd3,
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muldd3, multd3, divdd3, divtd3, cmpdd_internal1, cmptd_internal1,
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floatditd2, ftruncdd2, fixdddi2, ftrunctd2, fixddi2): New.
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2007-09-05 Ian Lance Taylor <iant@google.com>
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* init-regs.c (initialize_uninitialized_regs): Call
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@ -405,3 +405,151 @@
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{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; }
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[(set_attr "length" "8,8,8,20,20,16")])
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;; Hardware support for decimal floating point operations.
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(define_insn "extendddtd2"
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[(set (match_operand:TD 0 "gpc_reg_operand" "=f")
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(float_extend:TD (match_operand:DD 1 "gpc_reg_operand" "f")))]
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"TARGET_DFP"
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"dctqpq %0,%1"
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[(set_attr "type" "fp")])
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;; The result of drdpq is an even/odd register pair with the converted
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;; value in the even register and zero in the odd register.
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;; FIXME: Avoid the register move by using a reload constraint to ensure
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;; that the result is the first of the pair receiving the result of drdpq.
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(define_insn "trunctddd2"
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[(set (match_operand:DD 0 "gpc_reg_operand" "=f")
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(float_truncate:DD (match_operand:TD 1 "gpc_reg_operand" "f")))
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(clobber (match_scratch:TD 2 "=f"))]
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"TARGET_DFP"
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"drdpq %2,%1\;fmr %0,%2"
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[(set_attr "type" "fp")])
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(define_insn "adddd3"
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[(set (match_operand:DD 0 "gpc_reg_operand" "=f")
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(plus:DD (match_operand:DD 1 "gpc_reg_operand" "%f")
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(match_operand:DD 2 "gpc_reg_operand" "f")))]
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"TARGET_DFP"
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"dadd %0,%1,%2"
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[(set_attr "type" "fp")])
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(define_insn "addtd3"
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[(set (match_operand:TD 0 "gpc_reg_operand" "=f")
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(plus:TD (match_operand:TD 1 "gpc_reg_operand" "%f")
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(match_operand:TD 2 "gpc_reg_operand" "f")))]
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"TARGET_DFP"
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"daddq %0,%1,%2"
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[(set_attr "type" "fp")])
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(define_insn "subdd3"
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[(set (match_operand:DD 0 "gpc_reg_operand" "=f")
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(minus:DD (match_operand:DD 1 "gpc_reg_operand" "f")
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(match_operand:DD 2 "gpc_reg_operand" "f")))]
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"TARGET_DFP"
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"dsub %0,%1,%2"
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[(set_attr "type" "fp")])
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(define_insn "subtd3"
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[(set (match_operand:TD 0 "gpc_reg_operand" "=f")
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(minus:TD (match_operand:TD 1 "gpc_reg_operand" "f")
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(match_operand:TD 2 "gpc_reg_operand" "f")))]
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"TARGET_DFP"
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"dsubq %0,%1,%2"
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[(set_attr "type" "fp")])
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(define_insn "muldd3"
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[(set (match_operand:DD 0 "gpc_reg_operand" "=f")
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(mult:DD (match_operand:DD 1 "gpc_reg_operand" "%f")
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(match_operand:DD 2 "gpc_reg_operand" "f")))]
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"TARGET_DFP"
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"dmul %0,%1,%2"
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[(set_attr "type" "fp")])
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(define_insn "multd3"
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[(set (match_operand:TD 0 "gpc_reg_operand" "=f")
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(mult:TD (match_operand:TD 1 "gpc_reg_operand" "%f")
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(match_operand:TD 2 "gpc_reg_operand" "f")))]
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"TARGET_DFP"
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"dmulq %0,%1,%2"
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[(set_attr "type" "fp")])
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(define_insn "divdd3"
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[(set (match_operand:DD 0 "gpc_reg_operand" "=f")
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(div:DD (match_operand:DD 1 "gpc_reg_operand" "f")
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(match_operand:DD 2 "gpc_reg_operand" "f")))]
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"TARGET_DFP"
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"ddiv %0,%1,%2"
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[(set_attr "type" "fp")])
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(define_insn "divtd3"
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[(set (match_operand:TD 0 "gpc_reg_operand" "=f")
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(div:TD (match_operand:TD 1 "gpc_reg_operand" "f")
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(match_operand:TD 2 "gpc_reg_operand" "f")))]
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"TARGET_DFP"
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"ddivq %0,%1,%2"
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[(set_attr "type" "fp")])
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(define_insn "*cmpdd_internal1"
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[(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
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(compare:CCFP (match_operand:DD 1 "gpc_reg_operand" "f")
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(match_operand:DD 2 "gpc_reg_operand" "f")))]
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"TARGET_DFP"
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"dcmpu %0,%1,%2"
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[(set_attr "type" "fpcompare")])
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(define_insn "*cmptd_internal1"
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[(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
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(compare:CCFP (match_operand:TD 1 "gpc_reg_operand" "f")
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(match_operand:TD 2 "gpc_reg_operand" "f")))]
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"TARGET_DFP"
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"dcmpuq %0,%1,%2"
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[(set_attr "type" "fpcompare")])
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(define_insn "floatditd2"
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[(set (match_operand:TD 0 "gpc_reg_operand" "=f")
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(float:TD (match_operand:DI 1 "gpc_reg_operand" "f")))]
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"TARGET_DFP"
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"dcffixq %0,%1"
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[(set_attr "type" "fp")])
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;; Convert a decimal64 to a decimal64 whose value is an integer.
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;; This is the first stage of converting it to an integer type.
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(define_insn "ftruncdd2"
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[(set (match_operand:DD 0 "gpc_reg_operand" "=f")
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(fix:DD (match_operand:DD 1 "gpc_reg_operand" "f")))]
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"TARGET_DFP"
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"drintn. 0,%0,%1,1"
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[(set_attr "type" "fp")])
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;; Convert a decimal64 whose value is an integer to an actual integer.
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;; This is the second stage of converting decimal float to integer type.
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(define_insn "fixdddi2"
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[(set (match_operand:DI 0 "gpc_reg_operand" "=f")
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(fix:DI (match_operand:DD 1 "gpc_reg_operand" "f")))]
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"TARGET_DFP"
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"dctfix %0,%1"
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[(set_attr "type" "fp")])
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;; Convert a decimal128 to a decimal128 whose value is an integer.
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;; This is the first stage of converting it to an integer type.
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(define_insn "ftrunctd2"
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[(set (match_operand:TD 0 "gpc_reg_operand" "=f")
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(fix:TD (match_operand:TD 1 "gpc_reg_operand" "f")))]
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"TARGET_DFP"
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"drintnq. 0,%0,%1,1"
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[(set_attr "type" "fp")])
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;; Convert a decimal128 whose value is an integer to an actual integer.
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;; This is the second stage of converting decimal float to integer type.
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(define_insn "fixtddi2"
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[(set (match_operand:DI 0 "gpc_reg_operand" "=f")
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(fix:DI (match_operand:TD 1 "gpc_reg_operand" "f")))]
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"TARGET_DFP"
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"dctfixq %0,%1"
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[(set_attr "type" "fp")])
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@ -204,7 +204,9 @@
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(TF "!TARGET_IEEEQUAD
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&& TARGET_HARD_FLOAT
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&& (TARGET_FPRS || TARGET_E500_DOUBLE)
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&& TARGET_LONG_DOUBLE_128")])
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&& TARGET_LONG_DOUBLE_128")
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(DD "TARGET_DFP")
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(TD "TARGET_DFP")])
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; Various instructions that come in SI and DI forms.
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; A generic w/d attribute, for things like cmpw/cmpd.
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@ -64,8 +64,8 @@ check_real_for_fixed_mode (REAL_VALUE_TYPE *real_value, enum machine_mode mode)
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{
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REAL_VALUE_TYPE max_value, min_value, epsilon_value;
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real_2expN (&max_value, GET_MODE_IBIT (mode));
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real_2expN (&epsilon_value, -GET_MODE_FBIT (mode));
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real_2expN (&max_value, GET_MODE_IBIT (mode), mode);
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real_2expN (&epsilon_value, -GET_MODE_FBIT (mode), mode);
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if (SIGNED_FIXED_POINT_MODE_P (mode))
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min_value = REAL_VALUE_NEGATE (max_value);
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@ -102,7 +102,7 @@ fixed_from_string (FIXED_VALUE_TYPE *f, const char *str, enum machine_mode mode)
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|| (temp == FIXED_MAX_EPS && ALL_ACCUM_MODE_P (f->mode)))
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warning (OPT_Woverflow,
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"large fixed-point constant implicitly truncated to fixed-point type");
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real_2expN (&base_value, fbit);
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real_2expN (&base_value, fbit, mode);
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real_arithmetic (&fixed_value, MULT_EXPR, &real_value, &base_value);
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real_to_integer2 ((HOST_WIDE_INT *)&f->data.low, &f->data.high,
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&fixed_value);
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@ -132,7 +132,7 @@ fixed_to_decimal (char *str, const FIXED_VALUE_TYPE *f_orig,
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{
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REAL_VALUE_TYPE real_value, base_value, fixed_value;
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real_2expN (&base_value, GET_MODE_FBIT (f_orig->mode));
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real_2expN (&base_value, GET_MODE_FBIT (f_orig->mode), f_orig->mode);
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real_from_integer (&real_value, VOIDmode, f_orig->data.low, f_orig->data.high,
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UNSIGNED_FIXED_POINT_MODE_P (f_orig->mode));
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real_arithmetic (&fixed_value, RDIV_EXPR, &real_value, &base_value);
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@ -1067,7 +1067,7 @@ fixed_convert_from_real (FIXED_VALUE_TYPE *f, enum machine_mode mode,
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real_value = *a;
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f->mode = mode;
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real_2expN (&base_value, fbit);
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real_2expN (&base_value, fbit, mode);
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real_arithmetic (&fixed_value, MULT_EXPR, &real_value, &base_value);
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real_to_integer2 ((HOST_WIDE_INT *)&f->data.low, &f->data.high, &fixed_value);
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temp = check_real_for_fixed_mode (&real_value, mode);
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@ -1116,7 +1116,7 @@ real_convert_from_fixed (REAL_VALUE_TYPE *r, enum machine_mode mode,
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{
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REAL_VALUE_TYPE base_value, fixed_value, real_value;
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real_2expN (&base_value, GET_MODE_FBIT (f->mode));
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real_2expN (&base_value, GET_MODE_FBIT (f->mode), f->mode);
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real_from_integer (&fixed_value, VOIDmode, f->data.low, f->data.high,
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UNSIGNED_FIXED_POINT_MODE_P (f->mode));
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real_arithmetic (&real_value, RDIV_EXPR, &fixed_value, &base_value);
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24
gcc/optabs.c
24
gcc/optabs.c
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@ -5120,10 +5120,11 @@ expand_float (rtx to, rtx from, int unsignedp)
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}
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}
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/* Unsigned integer, and no way to convert directly. For binary
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floating point modes, convert as signed, then conditionally adjust
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the result. */
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if (unsignedp && can_do_signed && !DECIMAL_FLOAT_MODE_P (GET_MODE (to)))
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/* Unsigned integer, and no way to convert directly. Convert as signed,
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then unconditionally adjust the result. For decimal float values we
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do this only if we have already determined that a signed conversion
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provides sufficient accuracy. */
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if (unsignedp && (can_do_signed || !DECIMAL_FLOAT_MODE_P (GET_MODE (to))))
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{
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rtx label = gen_label_rtx ();
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rtx temp;
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@ -5214,7 +5215,7 @@ expand_float (rtx to, rtx from, int unsignedp)
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0, label);
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real_2expN (&offset, GET_MODE_BITSIZE (GET_MODE (from)));
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real_2expN (&offset, GET_MODE_BITSIZE (GET_MODE (from)), fmode);
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temp = expand_binop (fmode, add_optab, target,
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CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode),
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target, 0, OPTAB_LIB_WIDEN);
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@ -5325,14 +5326,16 @@ expand_fix (rtx to, rtx from, int unsignedp)
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anything with a wider integer mode.
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This code used to extend FP value into mode wider than the destination.
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This is not needed. Consider, for instance conversion from SFmode
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This is needed for decimal float modes which cannot accurately
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represent one plus the highest signed number of the same size, but
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not for binary modes. Consider, for instance conversion from SFmode
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into DImode.
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The hot path through the code is dealing with inputs smaller than 2^63
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and doing just the conversion, so there is no bits to lose.
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In the other path we know the value is positive in the range 2^63..2^64-1
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inclusive. (as for other imput overflow happens and result is undefined)
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inclusive. (as for other input overflow happens and result is undefined)
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So we know that the most important bit set in mantissa corresponds to
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2^63. The subtraction of 2^63 should not generate any rounding as it
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simply clears out that bit. The rest is trivial. */
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@ -5340,15 +5343,16 @@ expand_fix (rtx to, rtx from, int unsignedp)
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if (unsignedp && GET_MODE_BITSIZE (GET_MODE (to)) <= HOST_BITS_PER_WIDE_INT)
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for (fmode = GET_MODE (from); fmode != VOIDmode;
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fmode = GET_MODE_WIDER_MODE (fmode))
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if (CODE_FOR_nothing != can_fix_p (GET_MODE (to), fmode, 0,
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&must_trunc))
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if (CODE_FOR_nothing != can_fix_p (GET_MODE (to), fmode, 0, &must_trunc)
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&& (!DECIMAL_FLOAT_MODE_P (fmode)
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|| GET_MODE_BITSIZE (fmode) > GET_MODE_BITSIZE (GET_MODE (to))))
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{
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int bitsize;
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REAL_VALUE_TYPE offset;
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rtx limit, lab1, lab2, insn;
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bitsize = GET_MODE_BITSIZE (GET_MODE (to));
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real_2expN (&offset, bitsize - 1);
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real_2expN (&offset, bitsize - 1, fmode);
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limit = CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode);
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lab1 = gen_label_rtx ();
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lab2 = gen_label_rtx ();
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@ -2304,7 +2304,7 @@ real_maxval (REAL_VALUE_TYPE *r, int sign, enum machine_mode mode)
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/* Fills R with 2**N. */
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void
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real_2expN (REAL_VALUE_TYPE *r, int n)
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real_2expN (REAL_VALUE_TYPE *r, int n, enum machine_mode fmode)
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{
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memset (r, 0, sizeof (*r));
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@ -2319,6 +2319,9 @@ real_2expN (REAL_VALUE_TYPE *r, int n)
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SET_REAL_EXP (r, n);
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r->sig[SIGSZ-1] = SIG_MSB;
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}
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if (DECIMAL_FLOAT_MODE_P (fmode))
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decimal_real_convert (r, fmode, r);
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}
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@ -248,7 +248,7 @@ extern bool real_nan (REAL_VALUE_TYPE *, const char *, int, enum machine_mode);
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extern void real_maxval (REAL_VALUE_TYPE *, int, enum machine_mode);
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extern void real_2expN (REAL_VALUE_TYPE *, int);
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extern void real_2expN (REAL_VALUE_TYPE *, int, enum machine_mode);
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extern unsigned int real_hash (const REAL_VALUE_TYPE *);
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@ -1,3 +1,8 @@
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2007-09-05 Janis Johnson <janis187@us.ibm.com>
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* gcc.target/powerpc/dfp-dd.c: New test.
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* gcc.target/powerpc/dfp-td.c: New test.
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2007-09-05 Jakub Jelinek <jakub@redhat.com>
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* gcc.c-torture/execute/va-arg-pack-1.c: New test.
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33
gcc/testsuite/gcc.target/powerpc/dfp-dd.c
Normal file
33
gcc/testsuite/gcc.target/powerpc/dfp-dd.c
Normal file
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@ -0,0 +1,33 @@
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/* Test generation of DFP instructions for POWER6. */
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/* Origin: Janis Johnson <janis187@us.ibm.com> */
|
||||
/* { dg-do compile { target powerpc*-*-linux* } } */
|
||||
/* { dg-options "-std=gnu99 -mcpu=power6" } */
|
||||
|
||||
/* { dg-final { scan-assembler "dadd" } } */
|
||||
/* { dg-final { scan-assembler "ddiv" } } */
|
||||
/* { dg-final { scan-assembler "dmul" } } */
|
||||
/* { dg-final { scan-assembler "dsub" } } */
|
||||
/* { dg-final { scan-assembler-times "dcmpu" 6 } } */
|
||||
/* { dg-final { scan-assembler-times "dctfix" 2 } } */
|
||||
/* { dg-final { scan-assembler-times "drintn" 2 } } */
|
||||
/* { dg-final { scan-assembler-times "dcffixq" 2 } } */
|
||||
|
||||
extern _Decimal64 a, b, c;
|
||||
extern int result;
|
||||
extern int si;
|
||||
extern long long di;
|
||||
|
||||
void add (void) { a = b + c; }
|
||||
void div (void) { a = b / c; }
|
||||
void mul (void) { a = b * c; }
|
||||
void sub (void) { a = b - c; }
|
||||
void eq (void) { result = a == b; }
|
||||
void ne (void) { result = a != b; }
|
||||
void lt (void) { result = a < b; }
|
||||
void le (void) { result = a <= b; }
|
||||
void gt (void) { result = a > b; }
|
||||
void ge (void) { result = a >= b; }
|
||||
void ddsi (void) { si = a; }
|
||||
void dddi (void) { di = a; }
|
||||
void sidd (void) { a = si; }
|
||||
void didd (void) { a = di; }
|
||||
33
gcc/testsuite/gcc.target/powerpc/dfp-td.c
Normal file
33
gcc/testsuite/gcc.target/powerpc/dfp-td.c
Normal file
|
|
@ -0,0 +1,33 @@
|
|||
/* Test generation of DFP instructions for POWER6. */
|
||||
/* Origin: Janis Johnson <janis187@us.ibm.com> */
|
||||
/* { dg-do compile { target powerpc*-*-linux* } } */
|
||||
/* { dg-options "-std=gnu99 -mcpu=power6" } */
|
||||
|
||||
/* { dg-final { scan-assembler "daddq" } } */
|
||||
/* { dg-final { scan-assembler "ddivq" } } */
|
||||
/* { dg-final { scan-assembler "dmulq" } } */
|
||||
/* { dg-final { scan-assembler "dsubq" } } */
|
||||
/* { dg-final { scan-assembler-times "dcmpuq" 6 } } */
|
||||
/* { dg-final { scan-assembler-times "dctfixq" 2 } } */
|
||||
/* { dg-final { scan-assembler-times "drintnq" 2 } } */
|
||||
/* { dg-final { scan-assembler-times "dcffixq" 2 } } */
|
||||
|
||||
extern _Decimal128 a, b, c;
|
||||
extern int result;
|
||||
extern int si;
|
||||
extern long long di;
|
||||
|
||||
void add (void) { a = b + c; }
|
||||
void div (void) { a = b / c; }
|
||||
void mul (void) { a = b * c; }
|
||||
void sub (void) { a = b - c; }
|
||||
void eq (void) { result = a == b; }
|
||||
void ne (void) { result = a != b; }
|
||||
void lt (void) { result = a < b; }
|
||||
void le (void) { result = a <= b; }
|
||||
void gt (void) { result = a > b; }
|
||||
void ge (void) { result = a >= b; }
|
||||
void tdsi (void) { si = a; }
|
||||
void tddi (void) { di = a; }
|
||||
void sitd (void) { a = si; }
|
||||
void ditd (void) { a = di; }
|
||||
Loading…
Add table
Reference in a new issue