nvptx.md (nvptx_register_operand): Don't accept and then reject subregs.
* config/nvptx/nvptx.md (nvptx_register_operand): Don't accept and then reject subregs. (nvptx_reg_or_mem_operand): Likewise. (nvptx_nonmemory_operand): Likewise. (call_insn_operand): A regular predicate, check SYMBOL_REF_FUNCTION_P. (call_insn, call_value_insn): Address is not SImode. * config/nvptx/nvptx.h (FIXED_REGISTERS): Make return reg fixed. (enum reg_class, REG_CLASS_NAMES, REG_CLASS_CONTENTS): Remove RETURN_REG class. (REGNO_REG_CLASS): Alwaus ALL_REGS. (PROMOTE_MODE): QI and HI are the only smaller than SI int modes. (HARD_FRAME_POINTER_REGNUM): Delete. (REGISTER_NAMES): Move earlier. (struct nvptx_args): Remove 'off'. (INIT_CUMULATIVE_ARGS): Don't initialize 'off'. (ELIMINABLE_REGS): Remove HARD_FRAME_POINTER_REGNUM. * config/nvptx/nvptx.c (arg_promotion): Delete. (nvptx_expand_call): Remove check for funtype being an fntype. From-SVN: r231659
This commit is contained in:
Nathan Sidwell
parent
951c9e90e3
commit
bd5d4b6538
4 changed files with 47 additions and 66 deletions
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@ -1,3 +1,24 @@
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2015-12-15 Nathan Sidwell <nathan@acm.org>
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* config/nvptx/nvptx.md (nvptx_register_operand): Don't accept and
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then reject subregs.
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(nvptx_reg_or_mem_operand): Likewise.
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(nvptx_nonmemory_operand): Likewise.
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(call_insn_operand): A regular predicate, check SYMBOL_REF_FUNCTION_P.
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(call_insn, call_value_insn): Address is not SImode.
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* config/nvptx/nvptx.h (FIXED_REGISTERS): Make return reg fixed.
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(enum reg_class, REG_CLASS_NAMES, REG_CLASS_CONTENTS): Remove
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RETURN_REG class.
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(REGNO_REG_CLASS): Alwaus ALL_REGS.
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(PROMOTE_MODE): QI and HI are the only smaller than SI int modes.
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(HARD_FRAME_POINTER_REGNUM): Delete.
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(REGISTER_NAMES): Move earlier.
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(struct nvptx_args): Remove 'off'.
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(INIT_CUMULATIVE_ARGS): Don't initialize 'off'.
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(ELIMINABLE_REGS): Remove HARD_FRAME_POINTER_REGNUM.
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* config/nvptx/nvptx.c (arg_promotion): Delete.
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(nvptx_expand_call): Remove check for funtype being an fntype.
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2015-12-15 Jason Merrill <jason@redhat.com>
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* hash-map.h, hash-table.h: Make copy constructors explicit.
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@ -10,9 +31,10 @@
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"omp declare target link" variables.
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* omp-low.c (scan_sharing_clauses): Do not remove mapping of "omp
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declare target link" variables.
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(add_decls_addresses_to_decl_constructor): For "omp declare target link"
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variables output address of the artificial pointer instead of address of
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the variable. Set most significant bit of the size to mark them.
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(add_decls_addresses_to_decl_constructor): For "omp declare target
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link" variables output address of the artificial pointer instead
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of address of the variable. Set most significant bit of the size
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to mark them.
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(pass_data_omp_target_link): New pass_data.
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(pass_omp_target_link): New class.
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(find_link_var_op): New static function.
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@ -366,17 +366,6 @@ nvptx_emit_joining (unsigned mask, bool is_call)
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}
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/* Perform a mode promotion for a function argument with MODE. Return
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the promoted mode. */
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static machine_mode
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arg_promotion (machine_mode mode)
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{
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if (mode == QImode || mode == HImode)
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return SImode;
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return mode;
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}
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/* Determine whether MODE and TYPE (possibly NULL) should be passed or
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returned in memory. Integer and floating types supported by the
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machine are passed in registers, everything else is passed in
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@ -1165,11 +1154,6 @@ nvptx_expand_call (rtx retval, rtx address)
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}
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if (cfun->machine->funtype
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/* It's possible to construct testcases where we call a variable.
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See compile/20020129-1.c. stdarg_p will crash so avoid calling it
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in such a case. */
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&& (TREE_CODE (cfun->machine->funtype) == FUNCTION_TYPE
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|| TREE_CODE (cfun->machine->funtype) == METHOD_TYPE)
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&& stdarg_p (cfun->machine->funtype))
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{
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varargs = gen_reg_rtx (Pmode);
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@ -85,8 +85,10 @@
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hard registers for special purposes and leave pseudos unallocated. */
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#define FIRST_PSEUDO_REGISTER 16
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/* We have to have some available hard registers, to keep gcc setup
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happy. */
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#define FIXED_REGISTERS \
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{ 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1 }
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{ 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1 }
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#define CALL_USED_REGISTERS \
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{ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
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@ -102,7 +104,6 @@
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enum reg_class
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{
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NO_REGS,
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RETURN_REG,
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ALL_REGS,
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LIM_REG_CLASSES
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};
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@ -110,7 +111,6 @@ enum reg_class
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#define N_REG_CLASSES (int) LIM_REG_CLASSES
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#define REG_CLASS_NAMES { \
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"RETURN_REG", \
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"NO_REGS", \
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"ALL_REGS" }
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@ -118,15 +118,13 @@ enum reg_class
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{ \
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/* NO_REGS. */ \
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{ 0x0000 }, \
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/* RETURN_REG. */ \
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{ 0x0008 }, \
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/* ALL_REGS. */ \
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{ 0xFFFF }, \
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}
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#define GENERAL_REGS ALL_REGS
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#define REGNO_REG_CLASS(R) ((R) == 4 ? RETURN_REG : ALL_REGS)
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#define REGNO_REG_CLASS(R) ((void)(R), ALL_REGS)
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#define BASE_REG_CLASS ALL_REGS
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#define INDEX_REG_CLASS NO_REGS
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@ -140,10 +138,11 @@ enum reg_class
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#define MODES_TIEABLE_P(M1, M2) false
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#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
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if (GET_MODE_CLASS (MODE) == MODE_INT \
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&& GET_MODE_SIZE (MODE) < GET_MODE_SIZE (SImode)) \
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if ((MODE) == QImode || (MODE) == HImode) \
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{ \
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(MODE) = SImode; \
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(void)(UNSIGNEDP); \
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(void)(TYPE); \
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}
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/* Stack and Calling. */
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@ -153,7 +152,6 @@ enum reg_class
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#define STACK_GROWS_DOWNWARD 1
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#define STACK_POINTER_REGNUM 1
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#define HARD_FRAME_POINTER_REGNUM 2
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#define NVPTX_RETURN_REGNUM 4
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#define FRAME_POINTER_REGNUM 15
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#define ARG_POINTER_REGNUM 14
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@ -161,6 +159,12 @@ enum reg_class
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#define STATIC_CHAIN_REGNUM 12
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#define OUTGOING_STATIC_CHAIN_REGNUM 10
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#define REGISTER_NAMES \
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{ \
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"%hr0", "%outargs", "%hfp", "%hr3", "%retval", "%hr5", "%hr6", "%hr7", \
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"%hr8", "%hr9", "%chain_out", "%hr11", "%chain_in", "%hr13", "%argp", "%frame" \
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}
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#define FIRST_PARM_OFFSET(FNDECL) ((void)(FNDECL), 0)
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#define PUSH_ARGS_REVERSED 1
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#define ACCUMULATE_OUTGOING_ARGS 1
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@ -173,15 +177,13 @@ struct nvptx_args {
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tree fntype;
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/* Number of arguments passed in registers so far. */
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int count;
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/* Offset into the stdarg area so far. */
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HOST_WIDE_INT off;
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};
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#endif
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#define CUMULATIVE_ARGS struct nvptx_args
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#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
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((CUM).fntype = (FNTYPE), (CUM).count = 0, (CUM).off = 0, (void)0)
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((CUM).fntype = (FNTYPE), (CUM).count = 0, (void)0)
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#define FUNCTION_ARG_REGNO_P(r) 0
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@ -199,8 +201,7 @@ struct nvptx_args {
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expand_builtin_setjmp_receiver from generating invalid insns. */
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#define ELIMINABLE_REGS \
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{ \
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{ FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
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{ ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM} \
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{ ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM} \
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}
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/* Define the offset between two registers, one to be eliminated, and the other
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@ -253,12 +254,6 @@ struct GTY(()) machine_function
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#undef ASM_APP_OFF
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#define ASM_APP_OFF "\t// #NO_APP \n"
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#define REGISTER_NAMES \
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{ \
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"%hr0", "%outargs", "%hfp", "%hr3", "%retval", "%hr5", "%hr6", "%hr7", \
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"%hr8", "%hr9", "%chain_out", "%hr11", "%chain_in", "%hr13", "%argp", "%frame" \
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}
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#define DBX_REGISTER_NUMBER(N) N
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#define TEXT_SECTION_ASM_OP ""
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@ -64,26 +64,18 @@
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(const_string "false"))
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(define_predicate "nvptx_register_operand"
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(match_code "reg,subreg")
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(match_code "reg")
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{
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if (REG_P (op))
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return !HARD_REGISTER_P (op);
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if (GET_CODE (op) == SUBREG && MEM_P (SUBREG_REG (op)))
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return false;
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if (GET_CODE (op) == SUBREG)
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return false;
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return register_operand (op, mode);
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})
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(define_predicate "nvptx_reg_or_mem_operand"
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(match_code "mem,reg,subreg")
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(match_code "mem,reg")
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{
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if (REG_P (op))
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return !HARD_REGISTER_P (op);
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if (GET_CODE (op) == SUBREG && MEM_P (SUBREG_REG (op)))
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return false;
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if (GET_CODE (op) == SUBREG)
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return false;
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return memory_operand (op, mode) || register_operand (op, mode);
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})
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@ -94,14 +86,10 @@
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;; Registers or constants for normal instructions. Does not allow symbolic
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;; constants.
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(define_predicate "nvptx_nonmemory_operand"
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(match_code "reg,subreg,const_int,const_double")
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(match_code "reg,const_int,const_double")
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{
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if (REG_P (op))
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return !HARD_REGISTER_P (op);
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if (GET_CODE (op) == SUBREG && MEM_P (SUBREG_REG (op)))
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return false;
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if (GET_CODE (op) == SUBREG)
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return false;
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return nonmemory_operand (op, mode);
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})
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@ -145,18 +133,10 @@
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(match_code "eq,ne,le,ge,lt,gt,uneq,unle,unge,unlt,ungt,unordered,ordered"))
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;; Test for a valid operand for a call instruction.
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(define_special_predicate "call_insn_operand"
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(define_predicate "call_insn_operand"
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(match_code "symbol_ref,reg")
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{
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if (GET_CODE (op) == SYMBOL_REF)
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{
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tree decl = SYMBOL_REF_DECL (op);
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/* This happens for libcalls. */
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if (decl == NULL_TREE)
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return true;
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return TREE_CODE (SYMBOL_REF_DECL (op)) == FUNCTION_DECL;
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}
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return true;
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return GET_CODE (op) != SYMBOL_REF || SYMBOL_REF_FUNCTION_P (op);
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})
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;; Return true if OP is a call with parallel USEs of the argument
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@ -753,7 +733,7 @@
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(define_insn "call_insn"
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[(match_parallel 2 "call_operation"
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[(call (mem:QI (match_operand:SI 0 "call_insn_operand" "Rs"))
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[(call (mem:QI (match_operand 0 "call_insn_operand" "Rs"))
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(match_operand 1))])]
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""
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{
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@ -763,7 +743,7 @@
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(define_insn "call_value_insn"
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[(match_parallel 3 "call_operation"
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[(set (match_operand 0 "nvptx_register_operand" "=R")
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(call (mem:QI (match_operand:SI 1 "call_insn_operand" "Rs"))
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(call (mem:QI (match_operand 1 "call_insn_operand" "Rs"))
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(match_operand 2)))])]
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""
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{
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