recog: Change return type of predicate functions from int to bool
Also change some internal variables to bool and change return type of split_all_insns_noflow to void. gcc/ChangeLog: * recog.h (check_asm_operands): Change return type from int to bool. (insn_invalid_p): Ditto. (verify_changes): Ditto. (apply_change_group): Ditto. (constrain_operands): Ditto. (constrain_operands_cached): Ditto. (validate_replace_rtx_subexp): Ditto. (validate_replace_rtx): Ditto. (validate_replace_rtx_part): Ditto. (validate_replace_rtx_part_nosimplify): Ditto. (added_clobbers_hard_reg_p): Ditto. (peep2_regno_dead_p): Ditto. (peep2_reg_dead_p): Ditto. (store_data_bypass_p): Ditto. (if_test_bypass_p): Ditto. * rtl.h (split_all_insns_noflow): Change return type from unsigned int to void. * genemit.cc (output_added_clobbers_hard_reg_p): Change return type of generated added_clobbers_hard_reg_p from int to bool and adjust function body accordingly. Change "used" variable type from int to bool. * recog.cc (check_asm_operands): Change return type from int to bool and adjust function body accordingly. (insn_invalid_p): Ditto. Change "is_asm" variable to bool. (verify_changes): Change return type from int to bool. (apply_change_group): Change return type from int to bool and adjust function body accordingly. (validate_replace_rtx_subexp): Change return type from int to bool. (validate_replace_rtx): Ditto. (validate_replace_rtx_part): Ditto. (validate_replace_rtx_part_nosimplify): Ditto. (constrain_operands_cached): Ditto. (constrain_operands): Ditto. Change "lose" and "win" variables type from int to bool. (split_all_insns_noflow): Change return type from unsigned int to void and adjust function body accordingly. (peep2_regno_dead_p): Change return type from int to bool. (peep2_reg_dead_p): Ditto. (peep2_find_free_register): Change "success" variable type from int to bool (store_data_bypass_p_1): Change return type from int to bool. (store_data_bypass_p): Ditto.
This commit is contained in:
parent
5fad778571
commit
bd579e1c69
4 changed files with 91 additions and 89 deletions
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@ -688,26 +688,27 @@ output_added_clobbers_hard_reg_p (void)
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{
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struct clobber_pat *clobber;
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struct clobber_ent *ent;
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int clobber_p, used;
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int clobber_p;
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bool used;
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printf ("\n\nint\nadded_clobbers_hard_reg_p (int insn_code_number)\n");
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printf ("\n\nbool\nadded_clobbers_hard_reg_p (int insn_code_number)\n");
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printf ("{\n");
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printf (" switch (insn_code_number)\n");
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printf (" {\n");
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for (clobber_p = 0; clobber_p <= 1; clobber_p++)
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{
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used = 0;
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used = false;
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for (clobber = clobber_list; clobber; clobber = clobber->next)
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if (clobber->has_hard_reg == clobber_p)
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for (ent = clobber->insns; ent; ent = ent->next)
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{
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printf (" case %d:\n", ent->code_number);
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used++;
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used = true;
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}
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if (used)
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printf (" return %d;\n\n", clobber_p);
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printf (" return %s;\n\n", clobber_p ? "true" : "false");
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}
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printf (" default:\n");
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137
gcc/recog.cc
137
gcc/recog.cc
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@ -133,7 +133,7 @@ asm_labels_ok (rtx body)
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/* Check that X is an insn-body for an `asm' with operands
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and that the operands mentioned in it are legitimate. */
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int
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bool
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check_asm_operands (rtx x)
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{
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int noperands;
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@ -142,7 +142,7 @@ check_asm_operands (rtx x)
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int i;
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if (!asm_labels_ok (x))
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return 0;
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return false;
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/* Post-reload, be more strict with things. */
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if (reload_completed)
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@ -156,9 +156,9 @@ check_asm_operands (rtx x)
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noperands = asm_noperands (x);
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if (noperands < 0)
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return 0;
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return false;
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if (noperands == 0)
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return 1;
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return true;
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operands = XALLOCAVEC (rtx, noperands);
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constraints = XALLOCAVEC (const char *, noperands);
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@ -171,10 +171,10 @@ check_asm_operands (rtx x)
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if (c[0] == '%')
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c++;
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if (! asm_operand_ok (operands[i], c, constraints))
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return 0;
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return false;
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}
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return 1;
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return true;
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}
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/* Static data for the next two routines. */
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@ -212,8 +212,8 @@ static int temporarily_undone_changes = 0;
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If IN_GROUP is zero, this is a single change. Try to recognize the insn
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or validate the memory reference with the change applied. If the result
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is not valid for the machine, suppress the change and return zero.
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Otherwise, perform the change and return 1. */
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is not valid for the machine, suppress the change and return false.
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Otherwise, perform the change and return true. */
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static bool
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validate_change_1 (rtx object, rtx *loc, rtx new_rtx, bool in_group,
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@ -232,7 +232,7 @@ validate_change_1 (rtx object, rtx *loc, rtx new_rtx, bool in_group,
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if ((old == new_rtx || rtx_equal_p (old, new_rtx))
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&& (new_len < 0 || XVECLEN (new_rtx, 0) == new_len))
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return 1;
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return true;
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gcc_assert ((in_group != 0 || num_changes == 0)
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&& (new_len < 0 || new_rtx == *loc));
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@ -275,7 +275,7 @@ validate_change_1 (rtx object, rtx *loc, rtx new_rtx, bool in_group,
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change group we made. */
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if (in_group)
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return 1;
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return true;
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else
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return apply_change_group ();
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}
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@ -348,7 +348,7 @@ check_invalid_inc_dec (rtx reg, const_rtx, void *data)
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match the instructions will be added to the current change group.
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Otherwise the changes will take effect immediately. */
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int
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bool
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insn_invalid_p (rtx_insn *insn, bool in_group)
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{
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rtx pat = PATTERN (insn);
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@ -360,14 +360,14 @@ insn_invalid_p (rtx_insn *insn, bool in_group)
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&& ! reload_completed
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&& ! reload_in_progress)
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? &num_clobbers : 0);
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int is_asm = icode < 0 && asm_noperands (PATTERN (insn)) >= 0;
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bool is_asm = icode < 0 && asm_noperands (PATTERN (insn)) >= 0;
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/* If this is an asm and the operand aren't legal, then fail. Likewise if
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this is not an asm and the insn wasn't recognized. */
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if ((is_asm && ! check_asm_operands (PATTERN (insn)))
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|| (!is_asm && icode < 0))
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return 1;
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return true;
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/* If we have to add CLOBBERs, fail if we have to add ones that reference
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hard registers since our callers can't know if they are live or not.
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@ -377,7 +377,7 @@ insn_invalid_p (rtx_insn *insn, bool in_group)
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rtx newpat;
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if (added_clobbers_hard_reg_p (icode))
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return 1;
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return true;
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newpat = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (num_clobbers + 1));
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XVECEXP (newpat, 0, 0) = pat;
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@ -394,7 +394,7 @@ insn_invalid_p (rtx_insn *insn, bool in_group)
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extract_insn (insn);
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if (! constrain_operands (1, get_preferred_alternatives (insn)))
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return 1;
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return true;
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}
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/* Punt if REG_INC argument overlaps some stored REG. */
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@ -405,11 +405,11 @@ insn_invalid_p (rtx_insn *insn, bool in_group)
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rtx reg = XEXP (link, 0);
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note_stores (insn, check_invalid_inc_dec, ®);
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if (reg == NULL_RTX)
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return 1;
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return true;
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}
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INSN_CODE (insn) = icode;
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return 0;
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return false;
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}
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/* Return number of changes made and not validated yet. */
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@ -420,9 +420,9 @@ num_changes_pending (void)
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}
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/* Tentatively apply the changes numbered NUM and up.
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Return 1 if all changes are valid, zero otherwise. */
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Return true if all changes are valid, false otherwise. */
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int
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bool
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verify_changes (int num)
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{
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int i;
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@ -554,21 +554,21 @@ confirm_change_group (void)
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}
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/* Apply a group of changes previously issued with `validate_change'.
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If all changes are valid, call confirm_change_group and return 1,
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otherwise, call cancel_changes and return 0. */
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If all changes are valid, call confirm_change_group and return true,
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otherwise, call cancel_changes and return false. */
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int
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bool
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apply_change_group (void)
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{
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if (verify_changes (0))
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{
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confirm_change_group ();
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return 1;
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return true;
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}
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else
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{
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cancel_changes (0);
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return 0;
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return false;
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}
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}
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@ -894,7 +894,7 @@ validate_replace_rtx_1 (rtx *loc, rtx from, rtx to, rtx_insn *object,
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with TO. After all changes have been made, validate by seeing
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if INSN is still valid. */
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int
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bool
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validate_replace_rtx_subexp (rtx from, rtx to, rtx_insn *insn, rtx *loc)
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{
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validate_replace_rtx_1 (loc, from, to, insn, true);
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@ -904,7 +904,7 @@ validate_replace_rtx_subexp (rtx from, rtx to, rtx_insn *insn, rtx *loc)
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/* Try replacing every occurrence of FROM in INSN with TO. After all
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changes have been made, validate by seeing if INSN is still valid. */
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int
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bool
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validate_replace_rtx (rtx from, rtx to, rtx_insn *insn)
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{
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validate_replace_rtx_1 (&PATTERN (insn), from, to, insn, true);
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@ -917,7 +917,7 @@ validate_replace_rtx (rtx from, rtx to, rtx_insn *insn)
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validate_replace_rtx (from, to, insn) is equivalent to
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validate_replace_rtx_part (from, to, &PATTERN (insn), insn). */
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int
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bool
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validate_replace_rtx_part (rtx from, rtx to, rtx *where, rtx_insn *insn)
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{
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validate_replace_rtx_1 (where, from, to, insn, true);
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@ -925,7 +925,7 @@ validate_replace_rtx_part (rtx from, rtx to, rtx *where, rtx_insn *insn)
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}
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/* Same as above, but do not simplify rtx afterwards. */
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int
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bool
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validate_replace_rtx_part_nosimplify (rtx from, rtx to, rtx *where,
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rtx_insn *insn)
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{
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@ -953,7 +953,7 @@ struct validate_replace_src_data
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{
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rtx from; /* Old RTX */
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rtx to; /* New RTX */
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rtx_insn *insn; /* Insn in which substitution is occurring. */
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rtx_insn *insn; /* Insn in which substitution is occurring. */
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};
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static void
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@ -2705,13 +2705,13 @@ extract_constrain_insn_cached (rtx_insn *insn)
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}
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/* Do cached constrain_operands on INSN and complain about failures. */
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int
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bool
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constrain_operands_cached (rtx_insn *insn, int strict)
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{
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if (which_alternative == -1)
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return constrain_operands (strict, get_enabled_alternatives (insn));
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else
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return 1;
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return true;
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}
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/* Analyze INSN and fill in recog_data. */
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@ -3029,7 +3029,7 @@ struct funny_match
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int this_op, other;
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};
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int
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bool
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constrain_operands (int strict, alternative_mask alternatives)
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{
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const char *constraints[MAX_RECOG_OPERANDS];
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@ -3042,7 +3042,7 @@ constrain_operands (int strict, alternative_mask alternatives)
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which_alternative = 0;
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if (recog_data.n_operands == 0 || recog_data.n_alternatives == 0)
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return 1;
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return true;
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for (c = 0; c < recog_data.n_operands; c++)
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constraints[c] = recog_data.constraints[c];
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@ -3051,7 +3051,7 @@ constrain_operands (int strict, alternative_mask alternatives)
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{
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int seen_earlyclobber_at = -1;
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int opno;
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int lose = 0;
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bool lose = false;
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funny_match_index = 0;
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if (!TEST_BIT (alternatives, which_alternative))
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@ -3074,7 +3074,7 @@ constrain_operands (int strict, alternative_mask alternatives)
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machine_mode mode = GET_MODE (op);
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const char *p = constraints[opno];
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int offset = 0;
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int win = 0;
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bool win = false;
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int val;
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int len;
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@ -3101,7 +3101,7 @@ constrain_operands (int strict, alternative_mask alternatives)
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/* An empty constraint or empty alternative
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allows anything which matched the pattern. */
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if (*p == 0 || *p == ',')
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win = 1;
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win = true;
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do
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switch (c = *p, len = CONSTRAINT_LEN (c, p), c)
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@ -3167,7 +3167,7 @@ constrain_operands (int strict, alternative_mask alternatives)
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matching_operands[match] = opno;
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if (val != 0)
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win = 1;
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win = true;
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/* If output is *x and input is *--x, arrange later
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to change the output to *--x as well, since the
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@ -3192,7 +3192,7 @@ constrain_operands (int strict, alternative_mask alternatives)
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&& (strict <= 0
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|| (strict_memory_address_p
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(recog_data.operand_mode[opno], op))))
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win = 1;
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win = true;
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break;
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/* No need to check general_operand again;
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@ -3209,10 +3209,10 @@ constrain_operands (int strict, alternative_mask alternatives)
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|| (reload_in_progress
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&& REGNO (op) >= FIRST_PSEUDO_REGISTER)
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|| reg_fits_class_p (op, GENERAL_REGS, offset, mode))
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win = 1;
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win = true;
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}
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else if (strict < 0 || general_operand (op, mode))
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win = 1;
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win = true;
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break;
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default:
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@ -3228,11 +3228,11 @@ constrain_operands (int strict, alternative_mask alternatives)
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|| (strict == 0 && GET_CODE (op) == SCRATCH)
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|| (REG_P (op)
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&& reg_fits_class_p (op, cl, offset, mode)))
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win = 1;
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win = true;
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}
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else if (constraint_satisfied_p (op, cn))
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win = 1;
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win = true;
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else if ((insn_extra_memory_constraint (cn)
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|| insn_extra_relaxed_memory_constraint (cn))
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@ -3247,11 +3247,11 @@ constrain_operands (int strict, alternative_mask alternatives)
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/* During reload, accept a pseudo */
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|| (reload_in_progress && REG_P (op)
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&& REGNO (op) >= FIRST_PSEUDO_REGISTER)))
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win = 1;
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win = true;
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else if (insn_extra_address_constraint (cn)
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/* Every address operand can be reloaded to fit. */
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&& strict < 0)
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win = 1;
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win = true;
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/* Cater to architectures like IA-64 that define extra memory
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constraints without using define_memory_constraint. */
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else if (reload_in_progress
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@ -3261,7 +3261,7 @@ constrain_operands (int strict, alternative_mask alternatives)
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&& reg_equiv_mem (REGNO (op)) != 0
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&& constraint_satisfied_p
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(reg_equiv_mem (REGNO (op)), cn))
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win = 1;
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win = true;
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break;
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}
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}
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@ -3271,7 +3271,7 @@ constrain_operands (int strict, alternative_mask alternatives)
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/* If this operand did not win somehow,
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this alternative loses. */
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if (! win)
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lose = 1;
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lose = true;
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}
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/* This alternative won; the operands are ok.
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Change whichever operands this alternative says to change. */
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@ -3302,7 +3302,7 @@ constrain_operands (int strict, alternative_mask alternatives)
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recog_data.operand[eopno]))
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&& ! safe_from_earlyclobber (recog_data.operand[opno],
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recog_data.operand[eopno]))
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lose = 1;
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lose = true;
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if (! lose)
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{
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@ -3328,14 +3328,14 @@ constrain_operands (int strict, alternative_mask alternatives)
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if (strchr (recog_data.constraints[opno], '<') == NULL
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&& strchr (recog_data.constraints[opno], '>')
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== NULL)
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return 0;
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return false;
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break;
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default:
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break;
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}
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}
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return 1;
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return true;
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}
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}
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@ -3349,7 +3349,7 @@ constrain_operands (int strict, alternative_mask alternatives)
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if (strict == 0)
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return constrain_operands (-1, alternatives);
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else
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return 0;
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return false;
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}
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/* Return true iff OPERAND (assumed to be a REG rtx)
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||||
|
@ -3517,7 +3517,7 @@ split_all_insns (void)
|
|||
/* Same as split_all_insns, but do not expect CFG to be available.
|
||||
Used by machine dependent reorg passes. */
|
||||
|
||||
unsigned int
|
||||
void
|
||||
split_all_insns_noflow (void)
|
||||
{
|
||||
rtx_insn *next, *insn;
|
||||
|
@ -3547,7 +3547,6 @@ split_all_insns_noflow (void)
|
|||
split_insn (insn);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct peep2_insn_data
|
||||
|
@ -3596,7 +3595,7 @@ peep2_next_insn (int n)
|
|||
/* Return true if REGNO is dead before the Nth non-note insn
|
||||
after `current'. */
|
||||
|
||||
int
|
||||
bool
|
||||
peep2_regno_dead_p (int ofs, int regno)
|
||||
{
|
||||
gcc_assert (ofs < MAX_INSNS_PER_PEEP2 + 1);
|
||||
|
@ -3610,7 +3609,7 @@ peep2_regno_dead_p (int ofs, int regno)
|
|||
|
||||
/* Similarly for a REG. */
|
||||
|
||||
int
|
||||
bool
|
||||
peep2_reg_dead_p (int ofs, rtx reg)
|
||||
{
|
||||
gcc_assert (ofs < MAX_INSNS_PER_PEEP2 + 1);
|
||||
|
@ -3622,8 +3621,8 @@ peep2_reg_dead_p (int ofs, rtx reg)
|
|||
unsigned int end_regno = END_REGNO (reg);
|
||||
for (unsigned int regno = REGNO (reg); regno < end_regno; ++regno)
|
||||
if (REGNO_REG_SET_P (peep2_insn_data[ofs].live_before, regno))
|
||||
return 0;
|
||||
return 1;
|
||||
return false;
|
||||
return true;
|
||||
}
|
||||
|
||||
/* Regno offset to be used in the register search. */
|
||||
|
@ -3673,7 +3672,8 @@ peep2_find_free_register (int from, int to, const char *class_str,
|
|||
|
||||
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
||||
{
|
||||
int raw_regno, regno, success, j;
|
||||
int raw_regno, regno, j;
|
||||
bool success;
|
||||
|
||||
/* Distribute the free registers as much as possible. */
|
||||
raw_regno = search_ofs + i;
|
||||
|
@ -3689,38 +3689,38 @@ peep2_find_free_register (int from, int to, const char *class_str,
|
|||
if (!targetm.hard_regno_mode_ok (regno, mode))
|
||||
continue;
|
||||
|
||||
success = 1;
|
||||
success = true;
|
||||
for (j = 0; success && j < hard_regno_nregs (regno, mode); j++)
|
||||
{
|
||||
/* Don't allocate fixed registers. */
|
||||
if (fixed_regs[regno + j])
|
||||
{
|
||||
success = 0;
|
||||
success = false;
|
||||
break;
|
||||
}
|
||||
/* Don't allocate global registers. */
|
||||
if (global_regs[regno + j])
|
||||
{
|
||||
success = 0;
|
||||
success = false;
|
||||
break;
|
||||
}
|
||||
/* Make sure the register is of the right class. */
|
||||
if (! TEST_HARD_REG_BIT (reg_class_contents[cl], regno + j))
|
||||
{
|
||||
success = 0;
|
||||
success = false;
|
||||
break;
|
||||
}
|
||||
/* And that we don't create an extra save/restore. */
|
||||
if (! crtl->abi->clobbers_full_reg_p (regno + j)
|
||||
&& ! df_regs_ever_live_p (regno + j))
|
||||
{
|
||||
success = 0;
|
||||
success = false;
|
||||
break;
|
||||
}
|
||||
|
||||
if (! targetm.hard_regno_scratch_ok (regno + j))
|
||||
{
|
||||
success = 0;
|
||||
success = false;
|
||||
break;
|
||||
}
|
||||
|
||||
|
@ -3729,14 +3729,14 @@ peep2_find_free_register (int from, int to, const char *class_str,
|
|||
|| regno + j == HARD_FRAME_POINTER_REGNUM)
|
||||
&& (! reload_completed || frame_pointer_needed))
|
||||
{
|
||||
success = 0;
|
||||
success = false;
|
||||
break;
|
||||
}
|
||||
|
||||
if (TEST_HARD_REG_BIT (*reg_set, regno + j)
|
||||
|| TEST_HARD_REG_BIT (live, regno + j))
|
||||
{
|
||||
success = 0;
|
||||
success = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -4244,7 +4244,7 @@ store_data_bypass_p_1 (rtx_insn *out_insn, rtx in_set)
|
|||
data not the address operand(s) of the store. IN_INSN and OUT_INSN
|
||||
must be either a single_set or a PARALLEL with SETs inside. */
|
||||
|
||||
int
|
||||
bool
|
||||
store_data_bypass_p (rtx_insn *out_insn, rtx_insn *in_insn)
|
||||
{
|
||||
rtx in_set = single_set (in_insn);
|
||||
|
@ -4276,7 +4276,7 @@ store_data_bypass_p (rtx_insn *out_insn, rtx_insn *in_insn)
|
|||
or multiple set; IN_INSN should be single_set for truth, but for convenience
|
||||
of insn categorization may be any JUMP or CALL insn. */
|
||||
|
||||
int
|
||||
bool
|
||||
if_test_bypass_p (rtx_insn *out_insn, rtx_insn *in_insn)
|
||||
{
|
||||
rtx out_set, in_set;
|
||||
|
@ -4618,7 +4618,8 @@ public:
|
|||
|
||||
unsigned int execute (function *) final override
|
||||
{
|
||||
return split_all_insns_noflow ();
|
||||
split_all_insns_noflow ();
|
||||
return 0;
|
||||
}
|
||||
|
||||
}; // class pass_split_for_shorten_branches
|
||||
|
|
30
gcc/recog.h
30
gcc/recog.h
|
@ -184,22 +184,22 @@ inline insn_propagation::insn_propagation (rtx_insn *insn)
|
|||
|
||||
extern void init_recog (void);
|
||||
extern void init_recog_no_volatile (void);
|
||||
extern int check_asm_operands (rtx);
|
||||
extern bool check_asm_operands (rtx);
|
||||
extern int asm_operand_ok (rtx, const char *, const char **);
|
||||
extern bool validate_change (rtx, rtx *, rtx, bool);
|
||||
extern bool validate_unshare_change (rtx, rtx *, rtx, bool);
|
||||
extern bool validate_change_xveclen (rtx, rtx *, int, bool);
|
||||
extern bool canonicalize_change_group (rtx_insn *insn, rtx x);
|
||||
extern int insn_invalid_p (rtx_insn *, bool);
|
||||
extern int verify_changes (int);
|
||||
extern bool insn_invalid_p (rtx_insn *, bool);
|
||||
extern bool verify_changes (int);
|
||||
extern void confirm_change_group (void);
|
||||
extern int apply_change_group (void);
|
||||
extern bool apply_change_group (void);
|
||||
extern int num_validated_changes (void);
|
||||
extern void cancel_changes (int);
|
||||
extern void temporarily_undo_changes (int);
|
||||
extern void redo_changes (int);
|
||||
extern int constrain_operands (int, alternative_mask);
|
||||
extern int constrain_operands_cached (rtx_insn *, int);
|
||||
extern bool constrain_operands (int, alternative_mask);
|
||||
extern bool constrain_operands_cached (rtx_insn *, int);
|
||||
extern bool memory_address_addr_space_p (machine_mode, rtx, addr_space_t);
|
||||
#define memory_address_p(mode,addr) \
|
||||
memory_address_addr_space_p ((mode), (addr), ADDR_SPACE_GENERIC)
|
||||
|
@ -207,10 +207,10 @@ extern bool strict_memory_address_addr_space_p (machine_mode, rtx,
|
|||
addr_space_t);
|
||||
#define strict_memory_address_p(mode,addr) \
|
||||
strict_memory_address_addr_space_p ((mode), (addr), ADDR_SPACE_GENERIC)
|
||||
extern int validate_replace_rtx_subexp (rtx, rtx, rtx_insn *, rtx *);
|
||||
extern int validate_replace_rtx (rtx, rtx, rtx_insn *);
|
||||
extern int validate_replace_rtx_part (rtx, rtx, rtx *, rtx_insn *);
|
||||
extern int validate_replace_rtx_part_nosimplify (rtx, rtx, rtx *, rtx_insn *);
|
||||
extern bool validate_replace_rtx_subexp (rtx, rtx, rtx_insn *, rtx *);
|
||||
extern bool validate_replace_rtx (rtx, rtx, rtx_insn *);
|
||||
extern bool validate_replace_rtx_part (rtx, rtx, rtx *, rtx_insn *);
|
||||
extern bool validate_replace_rtx_part_nosimplify (rtx, rtx, rtx *, rtx_insn *);
|
||||
extern void validate_replace_rtx_group (rtx, rtx, rtx_insn *);
|
||||
extern void validate_replace_src_group (rtx, rtx, rtx_insn *);
|
||||
extern bool validate_simplify_insn (rtx_insn *insn);
|
||||
|
@ -232,7 +232,7 @@ extern int recog (rtx, rtx_insn *, int *);
|
|||
inline int recog_memoized (rtx_insn *insn);
|
||||
#endif
|
||||
extern void add_clobbers (rtx, int);
|
||||
extern int added_clobbers_hard_reg_p (int);
|
||||
extern bool added_clobbers_hard_reg_p (int);
|
||||
extern void insn_extract (rtx_insn *);
|
||||
extern void extract_insn (rtx_insn *);
|
||||
extern void extract_constrain_insn (rtx_insn *insn);
|
||||
|
@ -243,16 +243,16 @@ extern void preprocess_constraints (int, int, const char **,
|
|||
extern const operand_alternative *preprocess_insn_constraints (unsigned int);
|
||||
extern void preprocess_constraints (rtx_insn *);
|
||||
extern rtx_insn *peep2_next_insn (int);
|
||||
extern int peep2_regno_dead_p (int, int);
|
||||
extern int peep2_reg_dead_p (int, rtx);
|
||||
extern bool peep2_regno_dead_p (int, int);
|
||||
extern bool peep2_reg_dead_p (int, rtx);
|
||||
#ifdef HARD_CONST
|
||||
extern rtx peep2_find_free_register (int, int, const char *,
|
||||
machine_mode, HARD_REG_SET *);
|
||||
#endif
|
||||
extern rtx_insn *peephole2_insns (rtx, rtx_insn *, int *);
|
||||
|
||||
extern int store_data_bypass_p (rtx_insn *, rtx_insn *);
|
||||
extern int if_test_bypass_p (rtx_insn *, rtx_insn *);
|
||||
extern bool store_data_bypass_p (rtx_insn *, rtx_insn *);
|
||||
extern bool if_test_bypass_p (rtx_insn *, rtx_insn *);
|
||||
|
||||
extern void copy_frame_info_to_split_insn (rtx_insn *, rtx_insn *);
|
||||
|
||||
|
|
|
@ -3795,7 +3795,7 @@ extern void setup_reg_classes (int, enum reg_class, enum reg_class,
|
|||
enum reg_class);
|
||||
|
||||
extern void split_all_insns (void);
|
||||
extern unsigned int split_all_insns_noflow (void);
|
||||
extern void split_all_insns_noflow (void);
|
||||
|
||||
#define MAX_SAVED_CONST_INT 64
|
||||
extern GTY(()) rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
|
||||
|
|
Loading…
Add table
Reference in a new issue