From bc2fc1f3b84472865724b7e91b540ca0fadedd1b Mon Sep 17 00:00:00 2001 From: Vladimir Makarov Date: Wed, 6 Apr 2016 16:48:36 +0000 Subject: [PATCH] re PR rtl-optimization/70398 (gcc.dg/vect/slp-multitypes-9.c FAILs with -fno-tree-loop-optimize -fno-tree-ter) 2016-04-06 Vladimir Makarov PR rtl-optimization/70398 * lra-constraints.c (process_address_1): Check zero scale and code for reloading with zero scale. 2016-04-06 Vladimir Makarov PR rtl-optimization/70398 * testsuite/gcc.target/aarch64/pr70398.c: New. From-SVN: r234792 --- gcc/ChangeLog | 6 +++++ gcc/lra-constraints.c | 16 +++++++++++-- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/aarch64/pr70398.c | 26 ++++++++++++++++++++++ 4 files changed, 51 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/pr70398.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 16633de2a08..ecbac2e7dc7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2016-04-06 Vladimir Makarov + + PR rtl-optimization/70398 + * lra-constraints.c (process_address_1): Check zero scale and code + for reloading with zero scale. + 2016-04-06 Uros Bizjak * config/i386/sse.md (shuffletype): Add V32HI and V4TI modes. diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c index 4883eefc532..c00afe766cf 100644 --- a/gcc/lra-constraints.c +++ b/gcc/lra-constraints.c @@ -2914,6 +2914,7 @@ process_address_1 (int nop, bool check_only_p, { struct address_info ad; rtx new_reg; + HOST_WIDE_INT scale; rtx op = *curr_id->operand_loc[nop]; const char *constraint = curr_static_id->operand[nop].constraint; enum constraint_num cn = lookup_constraint (constraint); @@ -3161,14 +3162,14 @@ process_address_1 (int nop, bool check_only_p, *ad.inner = simplify_gen_binary (PLUS, GET_MODE (new_reg), new_reg, *ad.index); } - else if (get_index_scale (&ad) == 1) + else if ((scale = get_index_scale (&ad)) == 1) { /* The last transformation to one reg will be made in curr_insn_transform function. */ end_sequence (); return false; } - else + else if (scale != 0) { /* base + scale * index => base + new_reg, case (1) above. @@ -3180,6 +3181,17 @@ process_address_1 (int nop, bool check_only_p, *ad.inner = simplify_gen_binary (PLUS, GET_MODE (new_reg), *ad.base_term, new_reg); } + else + { + enum reg_class cl = base_reg_class (ad.mode, ad.as, + SCRATCH, SCRATCH); + rtx addr = *ad.inner; + + new_reg = lra_create_new_reg (Pmode, NULL_RTX, cl, "addr"); + /* addr => new_base. */ + lra_emit_move (new_reg, addr); + *ad.inner = new_reg; + } *before = get_insns (); end_sequence (); return true; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index be3c82af35c..bc9eed1d290 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-04-06 Vladimir Makarov + + PR rtl-optimization/70398 + * testsuite/gcc.target/aarch64/pr70398.c: New. + 2016-04-06 Eric Botcazou * gcc.c-torture/execute/20101011-1.c (__VISIUM__): Set DO_TEST to 0. diff --git a/gcc/testsuite/gcc.target/aarch64/pr70398.c b/gcc/testsuite/gcc.target/aarch64/pr70398.c new file mode 100644 index 00000000000..dbe5ad1b24f --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr70398.c @@ -0,0 +1,26 @@ +/* { dg-do run } */ +/* { dg-options "-O -fno-tree-loop-optimize -fno-tree-ter -static" } */ +unsigned int in[8 * 8] = + { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, + 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63 }; + +unsigned char out[8 * 8]; + +int +main (void) +{ + int i; + for (i = 0; i < 8 * 4; i++) + { + out[i * 2] = (unsigned char) in[i * 2] + 1; + out[i * 2 + 1] = (unsigned char) in[i * 2 + 1] + 2; + } + __asm__("":::"memory"); + for (i = 0; i < 8 * 4; i++) + { + if (out[i * 2] != in[i * 2] + 1 + || out[i * 2 + 1] != in[i * 2 + 1] + 2) + __builtin_abort (); + } + return 0; +}