AArch64: Add inline memmove expansion
Add support for inline memmove expansions. The generated code is identical as for memcpy, except that all loads are emitted before stores rather than being interleaved. The maximum size is 256 bytes which requires at most 16 registers. gcc/ChangeLog: * config/aarch64/aarch64.opt (aarch64_mops_memmove_size_threshold): Change default. * config/aarch64/aarch64.md (cpymemdi): Add a parameter. (movmemdi): Call aarch64_expand_cpymem. * config/aarch64/aarch64.cc (aarch64_copy_one_block): Rename function, simplify, support storing generated loads/stores. (aarch64_expand_cpymem): Support expansion of memmove. * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem): Add bool arg. gcc/testsuite/ChangeLog: * gcc.target/aarch64/memmove.c: Add new test. * gcc.target/aarch64/memmove2.c: Likewise.
This commit is contained in:
Wilco Dijkstra
parent
5ddf651ad9
commit
bbdb72ba29
6 changed files with 122 additions and 112 deletions
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@ -770,7 +770,7 @@ tree aarch64_vector_load_decl (tree);
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rtx aarch64_gen_callee_cookie (aarch64_feature_flags, arm_pcs);
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void aarch64_expand_call (rtx, rtx, rtx, bool);
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bool aarch64_expand_cpymem_mops (rtx *, bool);
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bool aarch64_expand_cpymem (rtx *);
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bool aarch64_expand_cpymem (rtx *, bool);
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bool aarch64_expand_setmem (rtx *);
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bool aarch64_float_const_zero_rtx_p (rtx);
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bool aarch64_float_const_rtx_p (rtx);
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@ -25428,52 +25428,40 @@ aarch64_progress_pointer (rtx pointer)
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return aarch64_move_pointer (pointer, GET_MODE_SIZE (GET_MODE (pointer)));
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}
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/* Copy one MODE sized block from SRC to DST, then progress SRC and DST by
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MODE bytes. */
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typedef auto_vec<std::pair<rtx, rtx>, 12> copy_ops;
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/* Copy one block of size MODE from SRC to DST at offset OFFSET. */
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static void
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aarch64_copy_one_block_and_progress_pointers (rtx *src, rtx *dst,
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machine_mode mode)
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aarch64_copy_one_block (copy_ops &ops, rtx src, rtx dst,
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int offset, machine_mode mode)
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{
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/* Handle 256-bit memcpy separately. We do this by making 2 adjacent memory
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address copies using V4SImode so that we can use Q registers. */
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if (known_eq (GET_MODE_BITSIZE (mode), 256))
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/* Emit explict load/store pair instructions for 32-byte copies. */
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if (known_eq (GET_MODE_SIZE (mode), 32))
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{
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mode = V4SImode;
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rtx src1 = adjust_address (src, mode, offset);
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rtx src2 = adjust_address (src, mode, offset + 16);
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rtx dst1 = adjust_address (dst, mode, offset);
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rtx dst2 = adjust_address (dst, mode, offset + 16);
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rtx reg1 = gen_reg_rtx (mode);
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rtx reg2 = gen_reg_rtx (mode);
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/* "Cast" the pointers to the correct mode. */
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*src = adjust_address (*src, mode, 0);
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*dst = adjust_address (*dst, mode, 0);
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/* Emit the memcpy. */
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emit_insn (aarch64_gen_load_pair (mode, reg1, *src, reg2,
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aarch64_progress_pointer (*src)));
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emit_insn (aarch64_gen_store_pair (mode, *dst, reg1,
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aarch64_progress_pointer (*dst), reg2));
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/* Move the pointers forward. */
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*src = aarch64_move_pointer (*src, 32);
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*dst = aarch64_move_pointer (*dst, 32);
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rtx load = aarch64_gen_load_pair (mode, reg1, src1, reg2, src2);
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rtx store = aarch64_gen_store_pair (mode, dst1, reg1, dst2, reg2);
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ops.safe_push ({ load, store });
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return;
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}
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rtx reg = gen_reg_rtx (mode);
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/* "Cast" the pointers to the correct mode. */
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*src = adjust_address (*src, mode, 0);
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*dst = adjust_address (*dst, mode, 0);
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/* Emit the memcpy. */
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emit_move_insn (reg, *src);
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emit_move_insn (*dst, reg);
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/* Move the pointers forward. */
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*src = aarch64_progress_pointer (*src);
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*dst = aarch64_progress_pointer (*dst);
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rtx load = gen_move_insn (reg, adjust_address (src, mode, offset));
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rtx store = gen_move_insn (adjust_address (dst, mode, offset), reg);
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ops.safe_push ({ load, store });
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}
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/* Expand a cpymem/movmem using the MOPS extension. OPERANDS are taken
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from the cpymem/movmem pattern. IS_MEMMOVE is true if this is a memmove
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rather than memcpy. Return true iff we succeeded. */
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bool
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aarch64_expand_cpymem_mops (rtx *operands, bool is_memmove = false)
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aarch64_expand_cpymem_mops (rtx *operands, bool is_memmove)
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{
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if (!TARGET_MOPS)
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return false;
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@ -25492,55 +25480,51 @@ aarch64_expand_cpymem_mops (rtx *operands, bool is_memmove = false)
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return true;
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}
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/* Expand cpymem, as if from a __builtin_memcpy. Return true if
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we succeed, otherwise return false, indicating that a libcall to
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memcpy should be emitted. */
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/* Expand cpymem/movmem, as if from a __builtin_memcpy/memmove.
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OPERANDS are taken from the cpymem/movmem pattern. IS_MEMMOVE is true
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if this is a memmove rather than memcpy. Return true if we succeed,
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otherwise return false, indicating that a libcall should be emitted. */
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bool
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aarch64_expand_cpymem (rtx *operands)
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aarch64_expand_cpymem (rtx *operands, bool is_memmove)
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{
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int mode_bits;
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int mode_bytes;
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rtx dst = operands[0];
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rtx src = operands[1];
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unsigned align = UINTVAL (operands[3]);
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rtx base;
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machine_mode cur_mode = BLKmode;
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bool size_p = optimize_function_for_size_p (cfun);
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machine_mode cur_mode = BLKmode, next_mode;
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/* Variable-sized or strict-align copies may use the MOPS expansion. */
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if (!CONST_INT_P (operands[2]) || (STRICT_ALIGNMENT && align < 16))
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return aarch64_expand_cpymem_mops (operands);
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return aarch64_expand_cpymem_mops (operands, is_memmove);
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unsigned HOST_WIDE_INT size = UINTVAL (operands[2]);
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bool use_ldpq = TARGET_SIMD && !(aarch64_tune_params.extra_tuning_flags
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& AARCH64_EXTRA_TUNE_NO_LDP_STP_QREGS);
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/* Try to inline up to 256 bytes. */
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unsigned max_copy_size = 256;
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unsigned mops_threshold = aarch64_mops_memcpy_size_threshold;
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/* Set inline limits for memmove/memcpy. MOPS has a separate threshold. */
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unsigned max_copy_size = use_ldpq ? 256 : 128;
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unsigned mops_threshold = is_memmove ? aarch64_mops_memmove_size_threshold
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: aarch64_mops_memcpy_size_threshold;
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/* Reduce the maximum size with -Os. */
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if (optimize_function_for_size_p (cfun))
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max_copy_size /= 4;
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/* Large copies use MOPS when available or a library call. */
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if (size > max_copy_size || (TARGET_MOPS && size > mops_threshold))
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return aarch64_expand_cpymem_mops (operands);
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return aarch64_expand_cpymem_mops (operands, is_memmove);
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int copy_bits = 256;
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unsigned copy_max = 32;
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/* Default to 256-bit LDP/STP on large copies, however small copies, no SIMD
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support or slow 256-bit LDP/STP fall back to 128-bit chunks.
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/* Default to 32-byte LDP/STP on large copies, however small copies, no SIMD
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support or slow LDP/STP fall back to 16-byte chunks.
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??? Although it would be possible to use LDP/STP Qn in streaming mode
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(so using TARGET_BASE_SIMD instead of TARGET_SIMD), it isn't clear
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whether that would improve performance. */
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if (size <= 24
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|| !TARGET_SIMD
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|| (aarch64_tune_params.extra_tuning_flags
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& AARCH64_EXTRA_TUNE_NO_LDP_STP_QREGS))
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copy_bits = 128;
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/* Emit an inline load+store sequence and count the number of operations
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involved. We use a simple count of just the loads and stores emitted
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rather than rtx_insn count as all the pointer adjustments and reg copying
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in this function will get optimized away later in the pipeline. */
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start_sequence ();
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unsigned nops = 0;
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if (size <= 24 || !use_ldpq)
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copy_max = 16;
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base = copy_to_mode_reg (Pmode, XEXP (dst, 0));
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dst = adjust_automodify_address (dst, VOIDmode, base, 0);
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@ -25548,69 +25532,55 @@ aarch64_expand_cpymem (rtx *operands)
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base = copy_to_mode_reg (Pmode, XEXP (src, 0));
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src = adjust_automodify_address (src, VOIDmode, base, 0);
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/* Convert size to bits to make the rest of the code simpler. */
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int n = size * BITS_PER_UNIT;
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copy_ops ops;
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int offset = 0;
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while (n > 0)
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while (size > 0)
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{
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/* Find the largest mode in which to do the copy in without over reading
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or writing. */
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opt_scalar_int_mode mode_iter;
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FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
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if (GET_MODE_BITSIZE (mode_iter.require ()) <= MIN (n, copy_bits))
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if (GET_MODE_SIZE (mode_iter.require ()) <= MIN (size, copy_max))
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cur_mode = mode_iter.require ();
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gcc_assert (cur_mode != BLKmode);
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mode_bits = GET_MODE_BITSIZE (cur_mode).to_constant ();
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mode_bytes = GET_MODE_SIZE (cur_mode).to_constant ();
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/* Prefer Q-register accesses for the last bytes. */
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if (mode_bits == 128 && copy_bits == 256)
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if (mode_bytes == 16 && copy_max == 32)
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cur_mode = V4SImode;
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aarch64_copy_one_block_and_progress_pointers (&src, &dst, cur_mode);
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/* A single block copy is 1 load + 1 store. */
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nops += 2;
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n -= mode_bits;
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aarch64_copy_one_block (ops, src, dst, offset, cur_mode);
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size -= mode_bytes;
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offset += mode_bytes;
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/* Emit trailing copies using overlapping unaligned accesses
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(when !STRICT_ALIGNMENT) - this is smaller and faster. */
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if (n > 0 && n < copy_bits / 2 && !STRICT_ALIGNMENT)
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(when !STRICT_ALIGNMENT) - this is smaller and faster. */
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if (size > 0 && size < copy_max / 2 && !STRICT_ALIGNMENT)
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{
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machine_mode next_mode = smallest_mode_for_size (n, MODE_INT);
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int n_bits = GET_MODE_BITSIZE (next_mode).to_constant ();
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gcc_assert (n_bits <= mode_bits);
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src = aarch64_move_pointer (src, (n - n_bits) / BITS_PER_UNIT);
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dst = aarch64_move_pointer (dst, (n - n_bits) / BITS_PER_UNIT);
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n = n_bits;
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next_mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
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int n_bytes = GET_MODE_SIZE (next_mode).to_constant ();
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gcc_assert (n_bytes <= mode_bytes);
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offset -= n_bytes - size;
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size = n_bytes;
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}
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}
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rtx_insn *seq = get_insns ();
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end_sequence ();
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/* MOPS sequence requires 3 instructions for the memory copying + 1 to move
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the constant size into a register. */
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unsigned mops_cost = 3 + 1;
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/* If MOPS is available at this point we don't consider the libcall as it's
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not a win even on code size. At this point only consider MOPS if
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optimizing for size. For speed optimizations we will have chosen between
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the two based on copy size already. */
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if (TARGET_MOPS)
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/* Memcpy interleaves loads with stores, memmove emits all loads first. */
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int nops = ops.length();
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int inc = is_memmove ? nops : nops == 4 ? 2 : 3;
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for (int i = 0; i < nops; i += inc)
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{
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if (size_p && mops_cost < nops)
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return aarch64_expand_cpymem_mops (operands);
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emit_insn (seq);
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return true;
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int m = MIN (nops, i + inc);
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/* Emit loads. */
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for (int j = i; j < m; j++)
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emit_insn (ops[j].first);
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/* Emit stores. */
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for (int j = i; j < m; j++)
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emit_insn (ops[j].second);
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}
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/* A memcpy libcall in the worst case takes 3 instructions to prepare the
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arguments + 1 for the call. When MOPS is not available and we're
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optimizing for size a libcall may be preferable. */
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unsigned libcall_cost = 4;
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if (size_p && libcall_cost < nops)
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return false;
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emit_insn (seq);
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return true;
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}
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@ -1768,7 +1768,7 @@
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(match_operand:DI 3 "immediate_operand")]
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""
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{
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if (aarch64_expand_cpymem (operands))
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if (aarch64_expand_cpymem (operands, false))
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DONE;
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FAIL;
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}
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@ -1812,17 +1812,9 @@
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(match_operand:BLK 1 "memory_operand")
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(match_operand:DI 2 "general_operand")
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(match_operand:DI 3 "immediate_operand")]
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"TARGET_MOPS"
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""
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{
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rtx sz_reg = operands[2];
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/* For constant-sized memmoves check the threshold.
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FIXME: We should add a non-MOPS memmove expansion for smaller,
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constant-sized memmove to avoid going to a libcall. */
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if (CONST_INT_P (sz_reg)
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&& INTVAL (sz_reg) < aarch64_mops_memmove_size_threshold)
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FAIL;
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if (aarch64_expand_cpymem_mops (operands, true))
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if (aarch64_expand_cpymem (operands, true))
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DONE;
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FAIL;
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}
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@ -345,7 +345,7 @@ Target Joined UInteger Var(aarch64_mops_memcpy_size_threshold) Init(256) Param
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Constant memcpy size in bytes above which to start using MOPS sequence.
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-param=aarch64-mops-memmove-size-threshold=
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Target Joined UInteger Var(aarch64_mops_memmove_size_threshold) Init(0) Param
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Target Joined UInteger Var(aarch64_mops_memmove_size_threshold) Init(256) Param
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Constant memmove size in bytes above which to start using MOPS sequence.
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-param=aarch64-mops-memset-size-threshold=
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24
gcc/testsuite/gcc.target/aarch64/memmove.c
Normal file
24
gcc/testsuite/gcc.target/aarch64/memmove.c
Normal file
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@ -0,0 +1,24 @@
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/* { dg-do compile } */
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/* { dg-options "-O2" } */
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#pragma GCC target "+nomops"
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void
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copy1 (int *x, int *y)
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{
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__builtin_memmove (x, y, 12);
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}
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void
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copy2 (int *x, int *y)
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{
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__builtin_memmove (x, y, 128);
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}
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void
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copy3 (int *x, int *y)
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{
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__builtin_memmove (x, y, 255);
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}
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/* { dg-final { scan-assembler-not {\tb\tmemmove} } } */
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24
gcc/testsuite/gcc.target/aarch64/memmove2.c
Normal file
24
gcc/testsuite/gcc.target/aarch64/memmove2.c
Normal file
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@ -0,0 +1,24 @@
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/* { dg-do compile } */
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/* { dg-options "-O2 -mstrict-align" } */
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#pragma GCC target "+nomops"
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void
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copy1 (int *x, int *y)
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{
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__builtin_memmove (x, y, 12);
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}
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void
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copy2 (int *x, int *y)
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{
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__builtin_memmove (x, y, 128);
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}
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void
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copy3 (int *x, int *y)
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{
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__builtin_memmove (x, y, 255);
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}
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/* { dg-final { scan-assembler-times {\tb\tmemmove} 3 } } */
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