Add GFNI command line options and macros
gcc/ * common/config/i386/i386-common.c (OPTION_MASK_ISA_GFNI_SET, (OPTION_MASK_ISA_GFNI_UNSET): New. (ix86_handle_option): Handle OPT_mgfni. * config/i386/cpuid.h (bit_GFNI): New. * config/i386/driver-i386.c (host_detect_local_cpu): Detect gfni. * config/i386/i386-c.c (ix86_target_macros_internal): Define __GFNI__. * config/i386/i386.c (ix86_target_string): Add -mgfni. (ix86_valid_target_attribute_inner_p): Add OPT_mgfni. * config/i386/i386.h (TARGET_GFNI, TARGET_GFNI_P): New. * config/i386/i386.opt: Add mgfni. From-SVN: r253922
This commit is contained in:
Julia Koval
Kirill Yukhin
parent
793c096d45
commit
b8cca31c48
8 changed files with 43 additions and 1 deletions
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@ -1,3 +1,16 @@
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2017-10-20 Julia Koval <julia.koval@intel.com>
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* common/config/i386/i386-common.c (OPTION_MASK_ISA_GFNI_SET,
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(OPTION_MASK_ISA_GFNI_UNSET): New.
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(ix86_handle_option): Handle OPT_mgfni.
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* config/i386/cpuid.h (bit_GFNI): New.
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* config/i386/driver-i386.c (host_detect_local_cpu): Detect gfni.
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* config/i386/i386-c.c (ix86_target_macros_internal): Define __GFNI__.
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* config/i386/i386.c (ix86_target_string): Add -mgfni.
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(ix86_valid_target_attribute_inner_p): Add OPT_mgfni.
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* config/i386/i386.h (TARGET_GFNI, TARGET_GFNI_P): New.
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* config/i386/i386.opt: Add mgfni.
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2017-10-20 Orlando Arias <oarias@knights.ucf.edu>
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* config/msp430/msp430.c (msp430_option_override): Disable
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@ -137,6 +137,7 @@ along with GCC; see the file COPYING3. If not see
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#define OPTION_MASK_ISA_CLZERO_SET OPTION_MASK_ISA_CLZERO
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#define OPTION_MASK_ISA_PKU_SET OPTION_MASK_ISA_PKU
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#define OPTION_MASK_ISA_RDPID_SET OPTION_MASK_ISA_RDPID
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#define OPTION_MASK_ISA_GFNI_SET OPTION_MASK_ISA_GFNI
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/* Define a set of ISAs which aren't available when a given ISA is
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disabled. MMX and SSE ISAs are handled separately. */
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@ -202,6 +203,7 @@ along with GCC; see the file COPYING3. If not see
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#define OPTION_MASK_ISA_CLZERO_UNSET OPTION_MASK_ISA_CLZERO
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#define OPTION_MASK_ISA_PKU_UNSET OPTION_MASK_ISA_PKU
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#define OPTION_MASK_ISA_RDPID_UNSET OPTION_MASK_ISA_RDPID
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#define OPTION_MASK_ISA_GFNI_UNSET OPTION_MASK_ISA_GFNI
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/* SSE4 includes both SSE4.1 and SSE4.2. -mno-sse4 should the same
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as -mno-sse4.1. */
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@ -484,6 +486,19 @@ ix86_handle_option (struct gcc_options *opts,
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}
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return true;
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case OPT_mgfni:
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if (value)
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{
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opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_GFNI_SET;
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opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_GFNI_SET;
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}
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else
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{
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opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_GFNI_UNSET;
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opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_GFNI_UNSET;
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}
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return true;
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case OPT_mavx5124fmaps:
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if (value)
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{
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@ -97,6 +97,7 @@
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#define bit_AVX512VBMI (1 << 1)
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#define bit_PKU (1 << 3)
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#define bit_OSPKE (1 << 4)
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#define bit_GFNI (1 << 8)
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#define bit_AVX512VPOPCNTDQ (1 << 14)
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#define bit_RDPID (1 << 22)
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@ -415,6 +415,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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unsigned int has_avx512vbmi = 0, has_avx512ifma = 0, has_clwb = 0;
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unsigned int has_mwaitx = 0, has_clzero = 0, has_pku = 0, has_rdpid = 0;
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unsigned int has_avx5124fmaps = 0, has_avx5124vnniw = 0;
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unsigned int has_gfni = 0;
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bool arch;
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@ -504,6 +505,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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has_avx512vbmi = ecx & bit_AVX512VBMI;
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has_pku = ecx & bit_OSPKE;
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has_rdpid = ecx & bit_RDPID;
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has_gfni = ecx & bit_GFNI;
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has_avx5124vnniw = edx & bit_AVX5124VNNIW;
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has_avx5124fmaps = edx & bit_AVX5124FMAPS;
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@ -1048,6 +1050,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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const char *clzero = has_clzero ? " -mclzero" : " -mno-clzero";
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const char *pku = has_pku ? " -mpku" : " -mno-pku";
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const char *rdpid = has_rdpid ? " -mrdpid" : " -mno-rdpid";
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const char *gfni = has_gfni ? " -mgfni" : " -mno-gfni";
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options = concat (options, mmx, mmx3dnow, sse, sse2, sse3, ssse3,
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sse4a, cx16, sahf, movbe, aes, sha, pclmul,
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popcnt, abm, lwp, fma, fma4, xop, bmi, sgx, bmi2,
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@ -1057,7 +1060,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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avx512cd, avx512pf, prefetchwt1, clflushopt,
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xsavec, xsaves, avx512dq, avx512bw, avx512vl,
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avx512ifma, avx512vbmi, avx5124fmaps, avx5124vnniw,
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clwb, mwaitx, clzero, pku, rdpid, NULL);
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clwb, mwaitx, clzero, pku, rdpid, gfni, NULL);
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}
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done:
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@ -457,6 +457,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
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def_or_undef (parse_in, "__PKU__");
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if (isa_flag2 & OPTION_MASK_ISA_RDPID)
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def_or_undef (parse_in, "__RDPID__");
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if (isa_flag2 & OPTION_MASK_ISA_GFNI)
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def_or_undef (parse_in, "__GFNI__");
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if (TARGET_IAMCU)
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{
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def_or_undef (parse_in, "__iamcu");
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@ -2595,6 +2595,7 @@ ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2,
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ISAs come first. Target string will be displayed in the same order. */
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static struct ix86_target_opts isa2_opts[] =
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{
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{ "-mgfni", OPTION_MASK_ISA_GFNI },
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{ "-mrdpid", OPTION_MASK_ISA_RDPID },
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{ "-msgx", OPTION_MASK_ISA_SGX },
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{ "-mavx5124vnniw", OPTION_MASK_ISA_AVX5124VNNIW },
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@ -5121,6 +5122,7 @@ ix86_valid_target_attribute_inner_p (tree args, char *p_strings[],
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IX86_ATTR_ISA ("mpx", OPT_mmpx),
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IX86_ATTR_ISA ("clwb", OPT_mclwb),
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IX86_ATTR_ISA ("rdpid", OPT_mrdpid),
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IX86_ATTR_ISA ("gfni", OPT_mgfni),
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/* enum options */
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IX86_ATTR_ENUM ("fpmath=", OPT_mfpmath_),
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@ -103,6 +103,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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#define TARGET_SGX_P(x) TARGET_ISA_SGX_P(x)
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#define TARGET_RDPID TARGET_ISA_RDPID
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#define TARGET_RDPID_P(x) TARGET_ISA_RDPID_P(x)
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#define TARGET_GFNI TARGET_ISA_GFNI
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#define TARGET_GFNI_P(x) TARGET_ISA_GFNI_P(x)
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#define TARGET_BMI TARGET_ISA_BMI
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#define TARGET_BMI_P(x) TARGET_ISA_BMI_P(x)
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#define TARGET_BMI2 TARGET_ISA_BMI2
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@ -753,6 +753,10 @@ mrdpid
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Target Report Mask(ISA_RDPID) Var(ix86_isa_flags2) Save
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Support RDPID built-in functions and code generation.
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mgfni
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Target Report Mask(ISA_GFNI) Var(ix86_isa_flags2) Save
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Support GFNI built-in functions and code generation.
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mbmi
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Target Report Mask(ISA_BMI) Var(ix86_isa_flags) Save
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Support BMI built-in functions and code generation.
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