re PR target/82848 (ICE in expand_expr_real_2, at expr.c:8715)
PR target/82848 * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Don't fold builtins not enabled in the currently selected ISA. * gcc.target/powerpc/pr82848.c: New test. From-SVN: r255148
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2017-11-25 Jakub Jelinek <jakub@redhat.com>
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PR target/82848
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* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Don't fold
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builtins not enabled in the currently selected ISA.
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2017-11-24 Jackson Woodruff <jackson.woodruff@arm.com>
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PR tree-optimization/71026
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@ -16143,6 +16143,12 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
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if (!gimple_call_lhs (stmt) && !rs6000_builtin_valid_without_lhs (fn_code))
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return false;
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/* Don't fold invalid builtins, let rs6000_expand_builtin diagnose it. */
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HOST_WIDE_INT mask = rs6000_builtin_info[uns_fncode].mask;
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bool func_valid_p = (rs6000_builtin_mask & mask) == mask;
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if (!func_valid_p)
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return false;
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switch (fn_code)
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{
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/* Flavors of vec_add. We deliberately don't expand
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@ -1,3 +1,8 @@
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2017-11-25 Jakub Jelinek <jakub@redhat.com>
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PR target/82848
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* gcc.target/powerpc/pr82848.c: New test.
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2017-11-24 Jackson Woodruff <jackson.woodruff@arm.com>
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PR tree-optimization/71026
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13
gcc/testsuite/gcc.target/powerpc/pr82848.c
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13
gcc/testsuite/gcc.target/powerpc/pr82848.c
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/* PR target/82848 */
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/* { dg-do compile } */
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/* { dg-options "-mno-altivec -mno-vsx -Wno-psabi" } */
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#define C 3.68249351546114573519399405666776E-44f
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#define vector __attribute__ ((altivec (vector__)))
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vector float
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foo (vector float a)
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{
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vector float b = __builtin_vec_madd (b, a, (vector float) { C, C, C, C }); /* { dg-error "requires the '-maltivec' option" } */
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return b;
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}
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